JPS6060770A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS6060770A JPS6060770A JP16965983A JP16965983A JPS6060770A JP S6060770 A JPS6060770 A JP S6060770A JP 16965983 A JP16965983 A JP 16965983A JP 16965983 A JP16965983 A JP 16965983A JP S6060770 A JPS6060770 A JP S6060770A
- Authority
- JP
- Japan
- Prior art keywords
- silicon nitride
- film
- silicon oxide
- nitride film
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 39
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 37
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000001257 hydrogen Substances 0.000 claims abstract description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 17
- 230000015654 memory Effects 0.000 abstract description 17
- 230000003647 oxidation Effects 0.000 abstract description 5
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 5
- 229910052782 aluminium Inorganic materials 0.000 abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 2
- 239000001301 oxygen Substances 0.000 abstract description 2
- 229910052760 oxygen Inorganic materials 0.000 abstract description 2
- LPQOADBMXVRBNX-UHFFFAOYSA-N ac1ldcw0 Chemical compound Cl.C1CN(C)CCN1C1=C(F)C=C2C(=O)C(C(O)=O)=CN3CCSC1=C32 LPQOADBMXVRBNX-UHFFFAOYSA-N 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 56
- 230000014759 maintenance of location Effects 0.000 description 15
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 10
- 230000006866 deterioration Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 230000001590 oxidative effect Effects 0.000 description 4
- 230000005641 tunneling Effects 0.000 description 4
- 238000001947 vapour-phase growth Methods 0.000 description 4
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910000473 manganese(VI) oxide Inorganic materials 0.000 description 2
- 241000233855 Orchidaceae Species 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000007087 memory ability Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000004793 poor memory Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はＭＯＮＯ３（金属−酸化シリコン膜−窒化シリ
コン膜−酸化シリコン膜−半導体）型の電界効果トラン
ジスタからなる半導体記憶装置における不揮発性能、特
に記憶保持特性のすぐれた高性能の半導体記憶装置の構
造に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to non-volatile performance, particularly memory retention, in a semiconductor memory device comprising a MONO3 (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) type field effect transistor. The present invention relates to the structure of a high-performance semiconductor memory device with excellent characteristics.
従来例の構成とその問題点
従来、半導体記憶装置の１つとしてトンネリング媒体と
なりうる薄い酸化シリコン膜上に他の絶縁膜、たとえば
窒化シリコン膜を成長させ、その上に金属電極を形成し
たＭＮＯＳ構造の電界効果型半導体記憶装置が知られて
いる。近年、このＭＮＯ３型半導体記憶装置のプログラ
ム電圧の低電圧化を実現するために、窒化シリコン膜−
酸化シリコン脱より力るゲート絶縁膜のうち窒化シリコ
ン膜を薄膜化すると同時に、この窒化シリコン膜の表面
を熱酸化して薄い酸化シリコン膜を形成したもの、すな
わち、前記窒化シリコン膜上にも酸化シリコン膜を有す
るＭＯＮＯ３（金属−酸化シ１ノコン膜−窒化シリコン
膜−酸化シリコン膜−半導体）構造の半導体４記憶装置
が知られている。Conventional Structure and Problems Conventionally, as a semiconductor memory device, an MNOS structure has been developed in which another insulating film, such as a silicon nitride film, is grown on a thin silicon oxide film that can be used as a tunneling medium, and a metal electrode is formed on top of the thin silicon oxide film. A field-effect semiconductor memory device is known. In recent years, silicon nitride films have been developed to reduce the programming voltage of MNO3 semiconductor memory devices.
The silicon nitride film of the gate insulating film to be removed from silicon oxide is thinned, and at the same time, the surface of this silicon nitride film is thermally oxidized to form a thin silicon oxide film, that is, the silicon nitride film is also oxidized. A semiconductor memory device having a MONO3 (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) structure having a silicon film is known.
しかしながら、ＭＯＮＯ３構造においては、窒化７リコ
ン膜を熱酸化する際に、通常９００’Ｃ以上の高温を必
要とするので、この過程で窒化シリコンの膜質の変化が
起こり、メモリ特性、特に記憶保持特性の悪化をまねく
問題点を有していた。However, in the MONO3 structure, when thermally oxidizing the silicon nitride film, a high temperature of 900'C or higher is usually required, so the quality of the silicon nitride film changes during this process, resulting in poor memory properties, especially memory retention properties. There were problems that led to deterioration of the situation.
ＭＯＮＯ３型の半導体記憶装置は、従来のＭＮＯＳ型の
半導体記憶装置と同様、窒化シリコン膜と半導体側の極
薄の酸化シリコン膜の界面、又は窒化／リコン膜バルク
中に分布するトラップに、半導体側から極薄の酸化シリ
コン膜を介して行なわれる電荷のトンネリング注入と、
その蓄積によりトランジスタのしきい値電圧（ｖｔ ｈ
）を変化させ、情報を記憶させるものであり、その記
憶保持特性の確保が最大の課題であり、窒化シリコン膜
上を熱酸化する場合の記憶保持特性の悪化は、実用上の
最大の問題となっていた。MONO3 type semiconductor memory devices, like conventional MNOS type semiconductor memory devices, have traps distributed on the semiconductor side at the interface between a silicon nitride film and an ultra-thin silicon oxide film on the semiconductor side, or in the bulk of the nitride/licon film. tunneling injection of charge through an ultrathin silicon oxide film from
Due to its accumulation, the threshold voltage of the transistor (vt h
) to store information, and ensuring the memory retention properties is the biggest challenge, and the deterioration of the memory retention properties when thermally oxidizing a silicon nitride film is the biggest practical problem. It had become.
発明の目的
本発明の目的は、かかる問題に鑑み、ＭＯＮＯ３型電界
トランジスタからなる半導体記憶装置における不揮発性
能、特に記憶保持特性のすぐれた高性能の半導体記憶装
置を提供することにある。OBJECTS OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a high-performance semiconductor memory device comprising MONO3 field transistors that has excellent non-volatile performance, particularly excellent memory retention characteristics.
発明の構成
上記目的を達成するために、本発明はゲート絶縁膜が、
化学組成比あるいは化学組成の異なる積層もしくは化学
組成変化の連続的な絶縁膜から構成されるＭＯＩＯ８構
造の電界効果型半導体装置であり、これにより、記憶保
持特性の変化がほとんどなくなる。Structure of the Invention In order to achieve the above object, the present invention provides that the gate insulating film is
This is a field-effect semiconductor device having a MOIO8 structure, which is composed of a continuous insulating film having a different chemical composition ratio or a laminated layer having a different chemical composition, or a continuous insulating film having a chemical composition change, thereby almost eliminating changes in memory retention characteristics.
実施例の説明
絶縁膜として、窒化シリコン膜を用いる場合、同窒化シ
リコン膜の熱酸化による記憶保持特性の悪化は、窒化シ
リコン膜中に含まれる水素、特に５ｉ−Ｈ結合の含有量
に関係があり、５ｔ−Ｈ結合の多い窒化シリコン膜は、
９００’Ｃ以上の温度で熱酸化を行なうことによぢ、５
ｔ−Ｈ結合が少なくなり不安定なトラップが附加増大さ
れ、記憶保持特性の悪化が起こる。他方、Ｓ ｉ−Ｈ結
合の少ない窒化シリコン膜は、９ｏＯ°Ｃ以上の温度で
熱酸化を行なっても、前記不安定なトラップの生成がほ
とんどないので、記憶保持特性の変化が少ガい０さらへ
、検討によれば、窒化シリコン膜中の水素含有量は、７
ランとアンモニアを用いる気相成長の際の温度に強く依
存し、次のようなことが見い出された。Description of Examples When a silicon nitride film is used as an insulating film, deterioration of memory retention characteristics due to thermal oxidation of the silicon nitride film is related to hydrogen contained in the silicon nitride film, particularly the content of 5i-H bonds. Yes, silicon nitride film with many 5t-H bonds is
By performing thermal oxidation at a temperature of 900'C or higher, 5
As the number of t-H bonds decreases, unstable traps are added and increased, resulting in deterioration of memory retention characteristics. On the other hand, even if a silicon nitride film with few Si-H bonds is thermally oxidized at a temperature of 90°C or higher, there is almost no generation of the unstable traps, so there is little change in memory retention characteristics. Furthermore, according to studies, the hydrogen content in the silicon nitride film is 7.
The following was found to be strongly dependent on the temperature during vapor phase growth using orchid and ammonia.
（１）成長温度が高いほど全水素含有量、および５ｔ−
Ｈ結合が少なくなる傾向にある。(1) The higher the growth temperature, the higher the total hydrogen content and 5t-
H-bonds tend to decrease.
（′；４ 成長温度が９００″Ｃ以上になると、５ｉ−
Ｈ結合は、はとんど存在しなくなる。(';4 When the growth temperature is 900''C or higher, 5i-
H-bonds almost never exist.
本発明は、上記の事実に基づきなされたもので薄い酸化
シリコン膜上に、比較的低温（７００〜９００″Ｃ）で
５ｉ−Ｈ結合の多い第１層窒化シリコン膜を形成させ、
次いでこの第１層窒化シリコン膜上に高温（９００〜１
０００″Ｃ）で５ｉ−Ｈ結合の少ない第２層窒化シリコ
ン膜を積層させた構成であり、これにより、第２層目の
成長時に、第１層目の窒化シリコン膜が高処理され、有
効なトラップを生じさせることができる。The present invention was made based on the above fact, and includes forming a first layer silicon nitride film with many 5i-H bonds on a thin silicon oxide film at a relatively low temperature (700 to 900''C),
Next, a high temperature (900 to 1
It has a structure in which a second layer silicon nitride film with few 5i-H bonds is laminated at 000"C). As a result, during the growth of the second layer, the first layer silicon nitride film is highly processed, making it effective. can create a trap.
寸だ、かかる本発明のような構造にすることにより、Ｍ
ＯＮＯ３の記憶特性として必要なしきい値電圧の窓の大
きさくΔｖｔｈ ）を適当に大きくとることができると
同時に、窒化シリコン膜形成後、窒化シリコン膜上を熱
酸化しても、記憶保持特性はほとんど悪化しないことが
見い出された。By creating the structure of the present invention, M
The size of the threshold voltage window (Δvth) required for ONO3 memory characteristics can be made appropriately large, and at the same time, even if the silicon nitride film is thermally oxidized after the silicon nitride film is formed, the memory retention characteristics are almost unchanged. It was found that there was no deterioration.
次に本発明の具体的な実施例を図面を用いて説明する。Next, specific embodiments of the present invention will be described using the drawings.
第１図は本発明の一実施例であるＭＯＮＯ３型半導体記
憶装置の断面構造を示す図である６、図において１は半
導体基板、２および３はソース、ドレイン領域、４はト
ンネリング媒体となりうる薄い酸化・シリコン膜、５は
５ｉ−Ｈ結合の多い窒化シリコン膜、６は５ｉ−Ｈ結合
の少ない窒化シリコン膜、７は窒化シリコン膜６を酸化
して形成した酸化シリコン膜、８はゲート電極である。FIG. 1 is a diagram showing a cross-sectional structure of a MONO3 type semiconductor memory device which is an embodiment of the present invention.6 In the figure, 1 is a semiconductor substrate, 2 and 3 are source and drain regions, and 4 is a thin film that can be used as a tunneling medium. Oxide/silicon film, 5 is a silicon nitride film with many 5i-H bonds, 6 is a silicon nitride film with few 5i-H bonds, 7 is a silicon oxide film formed by oxidizing the silicon nitride film 6, 8 is a gate electrode. be.
第１図において、トンネリング媒体となりうる酸化シリ
コン膜４は、公知のシリコン基板の酸素雰囲気中での熱
酸化により形成した○トンネリング効果を有効に利用す
るには、酸化シリコン膜４の厚さは１０〜３０人にする
必要がある。In FIG. 1, a silicon oxide film 4, which can serve as a tunneling medium, is formed by thermal oxidation of a silicon substrate in an oxygen atmosphere as is known in the art. It is necessary to have ~30 people.
酸化シリコン膜４上に、５ｉ−Ｈ結合の多い窒化シリコ
ン膜６と、５ｉ−Ｈ結合の少ない窒化シリコン膜６を積
層させる方法として、例えば窒化シリコン膜を気相成長
法によって形成する際の成長温度を変えて作製する。本
実施例では、酸化シリコン膜４」二に７ラン（Ｓ Ｉ
Ｈ４） とアンモニア（ＮＨ３）の化学反応に基づく気
相成長法により、ＮＨ３／５ＩＨ４−１０ｏ１７５ｏ′
Ｃの条件で窒化シリコン膜５を約５０人形成させる。さ
らに引き続き窒化シリ−ｙ７膜５」二に、ＮＨ３／Ｓ
ｉ Ｈ４＝１０００ 、９５０°Ｃの条件下の気相成長
法により窒化シリコン膜６を約２００人形成させた。As a method for laminating a silicon nitride film 6 with many 5i-H bonds and a silicon nitride film 6 with few 5i-H bonds on the silicon oxide film 4, for example, a growth method when a silicon nitride film is formed by vapor phase growth method is used. Manufactured by changing the temperature. In this example, a silicon oxide film 4'' second run (S I
NH3/5IH4-10o175o' by a vapor phase growth method based on the chemical reaction between H4) and ammonia (NH3).
About 50 people formed the silicon nitride film 5 under the conditions of C. Furthermore, the silicon nitride-y7 film 5'2, NH3/S
About 200 people formed the silicon nitride film 6 by vapor phase growth under conditions of i H4 = 1000 and 950°C.
次いで、窒化シリコン膜６を酸化する方法として、本実
施例では９ｏ○°Ｃ１水蒸気雰囲気中で約６０分熱酸化
し、約２６人の酸化シリコン膜γを形成した。Next, as a method of oxidizing the silicon nitride film 6, in this example, thermal oxidation was performed for about 60 minutes in a 9°C1 steam atmosphere to form about 26 silicon oxide films γ.
ゲート電極８としては、アルミニウム電極を通常の真空
蒸着法により１μｍ程度被着させ形成した。The gate electrode 8 was formed by depositing an aluminum electrode to a thickness of about 1 μm using a normal vacuum evaporation method.
以上の如くして得られたＭＯＮＯ８型半導体記憶装置の
記憶保持特性の一例を第２図に示す。横軸は書き込み消
去直後のしきい値電圧、縦軸は蓄積された電荷の減衰率
（δＶｔｈ／ｆ？ｌｏｇｔ；Ｖｔｈ： Ｌきい値電圧、
ｔ：時間）を示している。この図の直線の傾きが小さい
ほど記憶保持特性が優れていることを示している。第２
図に示すように、本発明の半導体記憶装置の記憶保持特
性（直線１０）は、従来のＡＩゲートＭＮＯ３型半導体
記憶装置のうち最も良い記憶保持特性（直線１１）と比
較しても、直線の傾きにほとんど差がなく、同程度の記
憶能力をもつものを作製することができた。￥ｔ：た、
本発明の他の実施例として、厚さ方向で水素含有量を連
続的に変え、基板シリコン側で５ｔ−Ｈ結合が多く、ゲ
ート電極側で５Ｌ−Ｈ結合の少ない窒化シリコノ膜を用
いたものでも同様の結果が得られる。FIG. 2 shows an example of the memory retention characteristics of the MONO8 type semiconductor memory device obtained as described above. The horizontal axis is the threshold voltage immediately after writing and erasing, and the vertical axis is the decay rate of the accumulated charge (δVth/f?logt; Vth: L threshold voltage,
t: time). The smaller the slope of the straight line in this figure, the better the memory retention characteristics are. Second
As shown in the figure, the memory retention characteristic (straight line 10) of the semiconductor memory device of the present invention is even compared with the best memory retention characteristic (straight line 11) of the conventional AI gate MNO3 type semiconductor memory device. We were able to create a device with almost no difference in slope and the same level of memory ability. ¥t: Ta,
As another embodiment of the present invention, a silicon nitride film is used in which the hydrogen content is continuously changed in the thickness direction, and there are many 5t-H bonds on the silicon substrate side and few 5L-H bonds on the gate electrode side. But you can get similar results.
本実施例では、ゲート電極としてアルミニウム電極を用
いたＡｌゲート型のＭＯＮＯ３型半導体記憶装置を形成
する場合について説明を行なってきたが、ゲート電極と
して、ポリシリコン等の高融点電極材料を用いてよいこ
とは言うまでもない。In this embodiment, a case has been described in which an Al gate type MONO3 semiconductor memory device is formed using an aluminum electrode as the gate electrode, but a high melting point electrode material such as polysilicon may be used as the gate electrode. Needless to say.
発明の効果
以上のように、本発明はＭＯＮＯ３型の電界トランジス
タからなる半導体記憶装置において、ゲートの絶縁膜を
水素含有量の異なる２以上の窒化シリコン膜により構成
させることにより、記憶保持特性の悪化のない優れた半
導体記憶装置を作製することができ、ＭＯＮＯ３型半導
体記憶装置の高性能化に大きく寄与するものである。Effects of the Invention As described above, the present invention solves the problem of deterioration of memory retention characteristics by configuring the gate insulating film of two or more silicon nitride films with different hydrogen contents in a semiconductor memory device consisting of a MONO3 type field transistor. This makes it possible to manufacture an excellent semiconductor memory device free of defects, and greatly contributes to improving the performance of MONO3 type semiconductor memory devices.
第１図は本発明装置の一実施例を説明するための断面図
、第２図は本発明の詳細な説明するだめの特性図である
。
１・・・・・シリコン基板、２，３・・・山ソースおよ
びドレイン領域、４・・・・・・酸化シリコン膜、５．
６・・・・・窒化シリコン膜、７・・・・・・酸化シリ
コン膜、８・・・・・・ゲート電極。
代理人の氏名 弁理士 中 尾 敏 男 はが１名第
１ 図FIG. 1 is a sectional view for explaining one embodiment of the device of the present invention, and FIG. 2 is a characteristic diagram for explaining the present invention in detail. 1... Silicon substrate, 2, 3... Mountain source and drain region, 4... Silicon oxide film, 5.
6... Silicon nitride film, 7... Silicon oxide film, 8... Gate electrode. Name of agent: Patent attorney Toshio Nakao Haga 1st person
1 figure
Claims (1)
化シリコン−半導体）構造の電界効果型半導体装置にお
いて、前記絶縁膜が化学組成比あるいは化学組成の異な
る積層もしくは化学組成変化の連続的な絶縁膜から構成
されることを特徴とする半導体記憶装置。 （勢 絶縁膜が水素含有量の異なる窒化シリコン膜から
構成されることを特徴とする特許請余鈍囲第１項記載の
半導体記憶装置〇 （３）絶縁膜が５ｉ−Ｈ結合を含有する窒化シリコン膜
と、Ｓｉ〜Ｈ結合をほとんど含有しない窒化シリコン膜
とから構成されることを特徴とする特許請ｇｋ囲第１項
記載の半導体記憶装置。[Claims] (1) In a field effect semiconductor device having a MOIO3 (metal-silicon oxide-insulator-silicon oxide-semiconductor) structure, the insulating film has a chemical composition ratio, a stack of layers with different chemical compositions, or a chemical composition change. A semiconductor memory device comprising a continuous insulating film. (3) The semiconductor memory device according to claim 1, wherein the insulating film is composed of silicon nitride films having different hydrogen contents. The semiconductor memory device according to claim 1, characterized in that it is composed of a silicon film and a silicon nitride film containing almost no Si--H bonds.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16965983A JPS6060770A (en) | 1983-09-14 | 1983-09-14 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16965983A JPS6060770A (en) | 1983-09-14 | 1983-09-14 | Semiconductor memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6060770A true JPS6060770A (en) | 1985-04-08 |
| JPH0259632B2 JPH0259632B2 (en) | 1990-12-13 |
Family
ID=15890551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16965983A Granted JPS6060770A (en) | 1983-09-14 | 1983-09-14 | Semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6060770A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214474A (en) * | 1985-07-12 | 1987-01-23 | Agency Of Ind Science & Technol | Semiconductor nonvolatile storage device |
| JPH069155U (en) * | 1992-11-09 | 1994-02-04 | 工業技術院長 | Semiconductor non-volatile memory device |
| WO2002035610A1 (en) * | 2000-10-26 | 2002-05-02 | Sony Corporation | Nonvolatile semiconductor storage and method for manufacturing the same |
| US7372113B2 (en) | 2002-05-29 | 2008-05-13 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
| US7851296B2 (en) | 2007-03-23 | 2010-12-14 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile semiconductor memory device |
-
1983
- 1983-09-14 JP JP16965983A patent/JPS6060770A/en active Granted
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214474A (en) * | 1985-07-12 | 1987-01-23 | Agency Of Ind Science & Technol | Semiconductor nonvolatile storage device |
| JPH069155U (en) * | 1992-11-09 | 1994-02-04 | 工業技術院長 | Semiconductor non-volatile memory device |
| WO2002035610A1 (en) * | 2000-10-26 | 2002-05-02 | Sony Corporation | Nonvolatile semiconductor storage and method for manufacturing the same |
| US6906390B2 (en) | 2000-10-26 | 2005-06-14 | Sony Corporation | Nonvolatile semiconductor storage and method for manufacturing the same |
| US7259433B2 (en) * | 2000-10-26 | 2007-08-21 | Sony Corporation | Non-volatile semiconductor memory device and method for producing same |
| US7372113B2 (en) | 2002-05-29 | 2008-05-13 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
| US7851296B2 (en) | 2007-03-23 | 2010-12-14 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile semiconductor memory device |
| US8350313B2 (en) | 2007-03-23 | 2013-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0259632B2 (en) | 1990-12-13 |
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