JPS6060742A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS6060742A JPS6060742A JP58169652A JP16965283A JPS6060742A JP S6060742 A JPS6060742 A JP S6060742A JP 58169652 A JP58169652 A JP 58169652A JP 16965283 A JP16965283 A JP 16965283A JP S6060742 A JPS6060742 A JP S6060742A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- lead
- nickel
- resin
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49586—Insulating layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は樹脂封止型半導体装置に用いられるリードフレ
ームの改良に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to improvements in lead frames used in resin-sealed semiconductor devices.
従来例の構成とその問題点
樹脂封止型半導体装置に用いられるリードフレームは一
般に、４２アロイ（鉄・ニッケル合金）コバール（鉄・
ニッケル・コバ及ｌ−合金）、Ｍあるいは銅を主体とす
る合金からなるフレームに、必要に応じて、素子載置部
やワイヤーポンディング部に金、銀等のメッキを選択的
に施したものが広く用いられて１いる。かかるリードフ
レームを用いた従来の半導体装置は完成後、第１図の断
面図のようになるが、リード１のインナーリード部と封
止樹脂２との界面を通して水分や不純物が侵入し、半導
体素子３の表面の配線金属が腐食したｐ、同素子３の特
性が変化するなどの問題があった。Conventional structure and its problems Lead frames used in resin-sealed semiconductor devices are generally made of 42 alloy (iron/nickel alloy) Kovar (iron/nickel alloy).
A frame made of an alloy mainly composed of nickel/copper and l-alloy), M, or copper, with selective plating of gold, silver, etc. applied to the element mounting area and wire bonding area as necessary. is widely used1. When a conventional semiconductor device using such a lead frame is completed, it looks like the cross-sectional view shown in FIG. There were problems such as corrosion of the wiring metal on the surface of the element 3 and changes in the characteristics of the element 3.
また、リード１が外力を受けたり、装置がはんだ処理等
で熱衝撃をうけた後では、リード１と封止樹脂２との接
着がルーズとなるため、この問題は一層おこりやすかっ
た。なお、第１図中、４はワイヤー、６は素子載置部で
ある。Further, after the lead 1 is subjected to external force or the device is subjected to thermal shock due to soldering or the like, the bond between the lead 1 and the sealing resin 2 becomes loose, and this problem is more likely to occur. In addition, in FIG. 1, 4 is a wire, and 6 is an element mounting part.
発、明の目的
本発明は以上述べたような問題点を解消するもので、樹
脂接着性ならびに耐水性のよいリードフレームを提供す
るものである。OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems and provides a lead frame with good resin adhesion and water resistance.
発明の構成
本発明のリードフレームは、インナーリート部の封止樹
脂に接触する部分の表面に、金属酸化物の被膜を選択的
に設けたリードフレームで、これ（（よれば、リードと
封止樹脂との密着がより良好となり、水分や不純物の侵
入が発生し難い樹脂封止型半導体装置を得ることができ
る。Structure of the Invention The lead frame of the present invention is a lead frame in which a metal oxide coating is selectively provided on the surface of the inner lead portion in contact with the sealing resin. It is possible to obtain a resin-sealed semiconductor device that has better adhesion with the resin and is less susceptible to moisture and impurities entering.
実施例の説明
第２図に本発明によるリードフレームの一例を示すリー
ド部１を含むリードフレーム構体部６は従来のように、
４２７０イ、コバール、銅あるいは銅合金などの材料で
つくり必要に応じて金、銀などのメッキを選択的に施す
。つぎにリード部１の封止後樹脂と接する面のボンディ
ング部を除く部分に、リードフレーム構体材料よシ酸化
されやすい金属、たとえばニッケルをめっき形成してお
き、次にこのリードフレームを高温の酸化雰囲気中にさ
らしてニッケル層表面を酸化し、酸化二ソケル破膜７を
形成する。この際ニッケルめっきされた部分以外の表面
はほとんど酸化されない。このリードフレームを用いて
、従来同様半導体素子３を載置部ら上に固定しワイヤー
ボンディングを行ない、樹脂で封止すれば半導体装置が
完成する。DESCRIPTION OF EMBODIMENTS FIG. 2 shows an example of a lead frame according to the present invention.A lead frame structure 6 including a lead portion 1 is constructed as in the conventional manner.
It is made of materials such as 4270 I, Kovar, copper, or copper alloy, and is selectively plated with gold, silver, etc. as necessary. Next, the surface of the lead part 1 that contacts the resin after sealing, excluding the bonding part, is plated with a metal that is easily oxidized by the lead frame structure material, such as nickel, and then this lead frame is oxidized at high temperature. The surface of the nickel layer is oxidized by exposing it to an atmosphere, and a broken disokel oxide film 7 is formed. At this time, the surface other than the nickel-plated portion is hardly oxidized. Using this lead frame, the semiconductor element 3 is fixed on the mounting part as in the conventional case, wire bonding is performed, and the lead frame is sealed with resin to complete the semiconductor device.
その断面図を第３図に示す。同装置において水分や不純
物の侵入経路はニッケルの酸化膜７と封止樹脂２との界
面を含む。ところが、ニッケルの酸化膜７と封止樹脂２
との密着性は、従来の４２７０イ、コバール、銅、ある
いは銅合金と封止間服の密着性に比べて、すぐれている
ため水分や不純物の侵入が発生し難い。なお、ニッケル
などのメッキおよび酸化膜の範囲が樹脂から突出したＩ
Ｊ−ド表面の一部にまで及んでも、本発明の効果をさ捷
たげるものではなく、本発明の範囲に含まれる。A sectional view thereof is shown in FIG. In this device, the entry route for moisture and impurities includes the interface between the nickel oxide film 7 and the sealing resin 2. However, the nickel oxide film 7 and the sealing resin 2
The adhesion between the sealant and the sealant is superior to that between the conventional 4270I, Kovar, copper, or copper alloy, making it difficult for moisture or impurities to enter. In addition, the range of plating and oxide film such as nickel protrudes from the resin.
Even if it extends to a part of the J-do surface, it does not impair the effects of the present invention and is included within the scope of the present invention.
また、本実施例では、装置内に中空を有しない、いわゆ
るポストモールド型の半導体装置に用いるリードフレー
ムの例を示したが、本発明はこれに限られず、外囲構体
にリードと樹脂の界面を有するような半導体装置に用い
るリードフレームすべてに応用でき、たとえばリードフ
レームと樹脂から、あらかじめ外囲器基台を構成し、素
子載置、ワイヤーボンディングの後、上面を別の蓋部材
で封じてなる、いわゆるプリモールド型の装置に用いる
リードフレームに適用しても有効である。Further, in this embodiment, an example of a lead frame used in a so-called post-molded semiconductor device that does not have a hollow space inside the device is shown, but the present invention is not limited to this. It can be applied to all lead frames used in semiconductor devices with It is also effective to apply it to a lead frame used in a so-called pre-molded device.
発明の効果
本発明によるリードフレームを用いることによって、封
止樹脂とリード部との接着性かよく、また、水分や不純
物の侵入の発生し難い、したがつて高信頼度の樹脂封止
型半導体装置を実現できる。Effects of the Invention By using the lead frame according to the present invention, the adhesiveness between the encapsulating resin and the lead portion is good, and the intrusion of moisture and impurities is difficult to occur, so that a highly reliable resin-encapsulated semiconductor can be obtained. The device can be realized.
第１図は従来のリードフレームを用いた樹脂封止型半導
体装置の断面図、Ｉ第２図は本発明リードフレームの部
分斜視図、第３図は本発明リードフレームを用いた半導
体装置の断面図である。
１・・・・リード部、２・・・・・封止樹脂、３・・・
・半導体素子、４・・・ワイヤー、５・・・・・素子載
置部、６・・ ・リードフレーム構体Ｌ ７・・・ ・
ニッケルメッキの表面酸化被膜。FIG. 1 is a cross-sectional view of a resin-sealed semiconductor device using a conventional lead frame, FIG. 2 is a partial perspective view of the lead frame of the present invention, and FIG. 3 is a cross-sectional view of a semiconductor device using the lead frame of the present invention. It is a diagram. 1...Lead part, 2...Sealing resin, 3...
・Semiconductor element, 4... Wire, 5... Element mounting part, 6... ・Lead frame structure L 7... ・
Nickel plated surface oxide film.
Claims (1)
金属酸化物の被膜を選択的に設けたリードフレーム。On the surface of the part of the inner sword part that comes into contact with the sealing resin,
A lead frame with a selective metal oxide coating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58169652A JPS6060742A (en) | 1983-09-14 | 1983-09-14 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58169652A JPS6060742A (en) | 1983-09-14 | 1983-09-14 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6060742A true JPS6060742A (en) | 1985-04-08 |
Family
ID=15890436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58169652A Pending JPS6060742A (en) | 1983-09-14 | 1983-09-14 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6060742A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0867935A3 (en) * | 1997-03-25 | 2000-03-15 | Mitsui Chemicals, Inc. | Plastic package, semiconductor device, and method of manufacturing plastic package |
| JP2007266047A (en) * | 2006-03-27 | 2007-10-11 | Denso Corp | Resin-sealed semiconductor device and method of manufacturing same |
| US7939378B2 (en) * | 1999-12-10 | 2011-05-10 | Texas Instruments Incorporated | Palladium-spot leadframes for high adhesion semiconductor devices and method of fabrication |
| JP2017010985A (en) * | 2015-06-17 | 2017-01-12 | 富士電機株式会社 | Semiconductor device and semiconductor device manufacturing method |
| JP2017188534A (en) * | 2016-04-04 | 2017-10-12 | 株式会社デンソー | Electronic device and method of manufacturing the same |
| WO2020027209A1 (en) * | 2018-08-01 | 2020-02-06 | 東洋鋼鈑株式会社 | Base material for electronic parts transport jig |
-
1983
- 1983-09-14 JP JP58169652A patent/JPS6060742A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0867935A3 (en) * | 1997-03-25 | 2000-03-15 | Mitsui Chemicals, Inc. | Plastic package, semiconductor device, and method of manufacturing plastic package |
| US7939378B2 (en) * | 1999-12-10 | 2011-05-10 | Texas Instruments Incorporated | Palladium-spot leadframes for high adhesion semiconductor devices and method of fabrication |
| JP2007266047A (en) * | 2006-03-27 | 2007-10-11 | Denso Corp | Resin-sealed semiconductor device and method of manufacturing same |
| JP4556895B2 (en) * | 2006-03-27 | 2010-10-06 | 株式会社デンソー | Resin-sealed semiconductor device |
| JP2017010985A (en) * | 2015-06-17 | 2017-01-12 | 富士電機株式会社 | Semiconductor device and semiconductor device manufacturing method |
| JP2017188534A (en) * | 2016-04-04 | 2017-10-12 | 株式会社デンソー | Electronic device and method of manufacturing the same |
| WO2017175542A1 (en) * | 2016-04-04 | 2017-10-12 | 株式会社デンソー | Electronic device and method for manufacturing same |
| CN108604579A (en) * | 2016-04-04 | 2018-09-28 | 株式会社电装 | Electronic device and its manufacturing method |
| CN108604579B (en) * | 2016-04-04 | 2022-03-18 | 株式会社电装 | Electronic device and method for manufacturing the same |
| WO2020027209A1 (en) * | 2018-08-01 | 2020-02-06 | 東洋鋼鈑株式会社 | Base material for electronic parts transport jig |
| TWI705888B (en) * | 2018-08-01 | 2020-10-01 | 日商東洋鋼鈑股份有限公司 | Base material for electronic parts transport rack |
| JPWO2020027209A1 (en) * | 2018-08-01 | 2021-08-19 | 東洋鋼鈑株式会社 | Base material for jigs for transporting electronic components |
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