JPS6060060U - Dual mode dropout compensation circuit - Google Patents
Dual mode dropout compensation circuitInfo
- Publication number
- JPS6060060U JPS6060060U JP15193683U JP15193683U JPS6060060U JP S6060060 U JPS6060060 U JP S6060060U JP 15193683 U JP15193683 U JP 15193683U JP 15193683 U JP15193683 U JP 15193683U JP S6060060 U JPS6060060 U JP S6060060U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- dropout
- output
- level
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、本考案のデュアルモードドロップアウト補償
回路の一実施例を示す回路構成図、第2図A、 Bは、
それぞれドロップアウト補償前、m ゛償後の信号
波形図である。FIG. 1 is a circuit configuration diagram showing an embodiment of the dual mode dropout compensation circuit of the present invention, and FIGS. 2A and B are:
They are signal waveform diagrams before and after dropout compensation, respectively.
Claims (1)
検出回路と、前記ドロップアウトを含む゛ 信号が供
給され、前記ドロップアウト検出回路のドロップアウト
検出出力により作動し、ドロップアウト部分を前値ホー
ルドした信号により置換する前値ホールド回路と、該前
置ホールド回路の出力が供給され、外部からの制御信号
により作動したときにミューティングするミューティン
グ回路と、該ミューティング回路の出力レベルを検出し
、該出力レベルが所定レベル以下となったときに作動す
るレベル検出回路と、該レベル検出回路の出力と前記ド
ロップアウト検出回路のドロップアウト検出出力が供給
され、両出力の論理積出力を制御信号として前記ミュー
ティング回路に供給するゲート回路とから構成してなる
デュアルモードドロップアウト補償回路。a dropout detection circuit that detects a dropout in an input signal; and a dropout detection circuit that is supplied with a signal that includes the dropout, is activated by the dropout detection output of the dropout detection circuit, and is activated by a signal that holds the dropout portion at its previous value. A pre-value hold circuit to be replaced, a muting circuit that mutes when activated by an external control signal, which is supplied with the output of the pre-hold circuit, and detects the output level of the muting circuit, and detects the output level of the muting circuit. A level detection circuit that operates when the level becomes a predetermined level or less, an output of the level detection circuit, and a dropout detection output of the dropout detection circuit are supplied, and the AND output of both outputs is used as a control signal to A dual-mode dropout compensation circuit consisting of a gate circuit that supplies a gate circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15193683U JPS6060060U (en) | 1983-09-30 | 1983-09-30 | Dual mode dropout compensation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15193683U JPS6060060U (en) | 1983-09-30 | 1983-09-30 | Dual mode dropout compensation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6060060U true JPS6060060U (en) | 1985-04-26 |
JPH0115027Y2 JPH0115027Y2 (en) | 1989-05-02 |
Family
ID=30336553
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15193683U Granted JPS6060060U (en) | 1983-09-30 | 1983-09-30 | Dual mode dropout compensation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6060060U (en) |
-
1983
- 1983-09-30 JP JP15193683U patent/JPS6060060U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0115027Y2 (en) | 1989-05-02 |
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