JPS6059799A - Composite layer printed circuit board and method of producing same - Google Patents

Composite layer printed circuit board and method of producing same

Info

Publication number
JPS6059799A
JPS6059799A JP59171699A JP17169984A JPS6059799A JP S6059799 A JPS6059799 A JP S6059799A JP 59171699 A JP59171699 A JP 59171699A JP 17169984 A JP17169984 A JP 17169984A JP S6059799 A JPS6059799 A JP S6059799A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
holes
multilayer printed
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59171699A
Other languages
Japanese (ja)
Inventor
ゴールドン レスリー トンプソン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ICL PLC
Original Assignee
ICL PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ICL PLC filed Critical ICL PLC
Publication of JPS6059799A publication Critical patent/JPS6059799A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0154Polyimide
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/0949Pad close to a hole, not surrounding the hole
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1394Covering open PTHs, e.g. by dry film resist or by metal disc
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17Post-manufacturing processes
    • H05K2203/176Removing, replacing or disconnecting component; Easily removable component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はプリント回路板、特に、構成部品の取はずし、
交換が容易であるプリント回路板に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a printed circuit board, and more particularly, to a method for removing components,
It relates to a printed circuit board that is easy to replace.

プリント回路板に複雑な電子植成部品を取付けるのに構
成部品のピンをプリント回路板のめっきした貫通孔に通
し、所定個所ではんだ付けするのは普通のことである。
It is common practice to attach complex electronic implants to printed circuit boards by passing the component pins through plated holes in the printed circuit board and soldering them in place.

めっきした貫通孔は、普通、プリン1〜回路板の種々の
レベルで、ピンと回路の一部をなす導電性材料とを接続
する。
Plated through holes typically connect pins and conductive materials forming part of the circuit at various levels of the circuit board.

成る構成部品を取はずす必要がある場合、たとえば、そ
れが故障したために交換する必要がある場合、はんだを
溶かすために用いた熱でプリント回路板が膨張し、回路
に損傷を与える傾向があることがわかっている。この問
題は、いわゆるピン・グリッド・アレイ・パッケージに
装着した超大規模集積回路部品にとって特にきびしい。
If a component needs to be removed, for example if it has failed and needs to be replaced, the heat used to melt the solder will tend to cause the printed circuit board to expand and damage the circuitry. I know. This problem is particularly severe for very large scale integrated circuit components mounted in so-called pin grid array packages.

多数の、アレイ状に密集したピン(普通は100本以上
)の場合、作業が不当に長くならないように、すべての
ピンのはんだを同時に溶かさなければならない。こうし
て加えられた大量の熱や、多数の接続を行なう必要があ
るためにプリント回路板の厚さが比較的大きいというこ
とにより、膨張問題はさらに悪化し、プリント回路板の
損iも大きくなる。しかも、これらの構成部品が高価で
あるため、プリント回路板を廃棄せずに修理することが
あらゆる点で望ましい。
In the case of a large number of closely packed pins in an array (usually 100 or more), the solder on all the pins must be melted at the same time to avoid an unduly long operation. The large amount of heat thus applied and the relatively large thickness of the printed circuit board due to the large number of connections that need to be made further exacerbate the expansion problem and increase the loss i of the printed circuit board. Moreover, due to the high cost of these components, it is desirable in every respect to repair the printed circuit board rather than discard it.

実際に、この問題を解決する唯一の方法はプリント回路
板にはんだ付けしたソケットを使用することであること
が示唆されていた。構成部品をソケットにはめ込むので
あるが、この方法では、プリント回路板のコストが高ま
ると共にその嵩が大きくなり、さらに、信頼性や電気的
性能の低下を招く。
In fact, it has been suggested that the only way to solve this problem is to use sockets soldered to printed circuit boards. The components are fitted into sockets, which increases the cost and bulk of the printed circuit board, and reduces reliability and electrical performance.

本発明は、複層プリント回路板であって、エポキシ・ガ
ラスと導電性材料の交互の層と、プリント回路板の片面
にあるポリイミド・ガラス層と、このポリイミド・ガラ
ス層の外側面にあって構成部品接続ピンに接続するよう
になっている導電性パッドとを包含し、装着済みの構成
部品の取はずし、交換のときにプ、リント回路板に損傷
を与える可能性を減らすような配置となっていることを
特徴とするプリント回路板を提供する。
The present invention is a multilayer printed circuit board comprising alternating layers of epoxy glass and conductive material, a polyimide glass layer on one side of the printed circuit board, and an outer surface of the polyimide glass layer. conductive pads adapted to connect to component connection pins, arranged and arranged to reduce the possibility of damage to the printed circuit board during removal or replacement of installed components; To provide a printed circuit board characterized by:

また、本発明は、複層プリント回路板組立体を製造する
方法であって、導電性部分を支持している複数のエポキ
シ・ガラス層と外面に導電性パッドを包含する導電性区
域を有するポリイミド・ガラスの上層とを相互に接合し
て積重体を形成し、プリン1〜回路板上に接続ピンを有
する構成部品を置いて接続ピンのうち少なくともいくつ
かを前記導電性パッドと係合させ、ピンをパッドにはん
だ付けすることからなることを特徴とする方法を提供す
る。
The present invention also provides a method of manufacturing a multilayer printed circuit board assembly comprising a polyimide layer having a plurality of epoxy glass layers supporting conductive portions and a conductive area including conductive pads on the outer surface. bonding the top layer of glass to each other to form a stack, placing components with connecting pins on the printed circuit board and engaging at least some of the connecting pins with the conductive pads; A method is provided, characterized in that it consists of soldering a pin to a pad.

導電性材料のほぼ完全な層がポリイミド・ガラス層と隣
接したエポキシ・ガラス層の間に延在するとよい。
Preferably, a substantially complete layer of conductive material extends between the polyimide glass layer and the adjacent epoxy glass layer.

好ましくは、ポリイミド・ガラス、エポキシ・ガラスの
各層は手研化され、これらの層の間にはさんだプレプレ
グのシートの硬化を完了させることによって接合される
。1つのプレプレグ・シートは前記はぼ完全な導電性材
料層に隣接する。
Preferably, the polyimide glass and epoxy glass layers are hand-sanded and joined by completing the curing of a sheet of prepreg sandwiched between the layers. One prepreg sheet is adjacent to the nearly complete layer of conductive material.

以下1本発明によって構成したプリント回路板を添付図
面を参照しながら一層詳しく説明する。
Hereinafter, a printed circuit board constructed according to the present invention will be described in more detail with reference to the accompanying drawings.

第1図、第2図を参照して、全体的に参照数字1で示す
プリント回路板は構成部品2を支持しているように示し
である。この構成部品2は多数のピン(たとえば、13
5本か179本)を有するピン・グリッド・アレイ・パ
ッケージである。これらのピンのうち一本だけが3で示
しである。
Referring to FIGS. 1 and 2, a printed circuit board, generally designated by the reference numeral 1, is shown supporting a component 2. Referring to FIGS. This component 2 has a large number of pins (for example 13
5 or 179 pin grid array packages. Only one of these pins is designated 3.

プリント回路板1は複層板(前部の層は図示しない)で
あり、周知のように、めっきした貫通孔によって相互接
続された内部層に導電材料を使っている。このような貫
通孔が4で示してあり、これはめっき部5を有する。
The printed circuit board 1 is a multilayer board (the front layer is not shown), using conductive materials in the inner layers interconnected by plated through holes, as is well known. Such a through hole is indicated at 4 and has a plated portion 5.

内部層は、電圧(すなわち、アースまたはパワー)平面
あるいは信号平面であってもよい。
The internal layer may be a voltage (ie, ground or power) plane or a signal plane.

平面6は電圧平面の一例であり、これは導電材料のほぼ
均一な層からなり、いくつかの貫通孔と接触しているが
、接触をなすことなく他の物も通せるように孔があけで
ある。信号平面は種々の導電軌道を含み、たとえば、こ
こでは、軌道7が孔4のめっき部5と接触している例と
して示しである。その他多くの層をピン・グリッド・ア
レイ・パッケージを支えている回路板に設けることがあ
る°ことは了解できよう。
Plane 6 is an example of a voltage plane, which consists of a nearly uniform layer of conductive material, in contact with some through holes, but with holes drilled to allow other objects to pass through without making contact. It is. The signal plane includes various conductive tracks, for example track 7 is shown here as an example in contact with plating 5 of hole 4. It will be appreciated that many other layers may be provided on the circuit board supporting the pin grid array package.

孔4のようなめつきした貫通孔は構成部品のピンを支持
していない。代りに、これらのピンは孔8のような孔、
図ではピン3を支持している孔に支えられる。これらの
孔はその内壁面にめっきを施していない。
Plated through holes such as hole 4 do not support component pins. Instead, these pins can be inserted into holes such as hole 8,
In the figure, it is supported by a hole that supports pin 3. The inner walls of these holes are not plated.

孔8の、構成部品2とは反対側のプリント回路板1の面
にある開口部はパッド9で囲んである。パッド9は表面
軌道10によって、NOフッド1に接続してあり、この
パッド11は孔4の開口部を囲み、そのめっき部5に接
続しである。この実施例では、他のめつきしてない孔は
、各々、めっきした貫通孔に同様に接続しである。
The opening of the hole 8 on the side of the printed circuit board 1 opposite the component 2 is surrounded by a pad 9. The pad 9 is connected to the NO hood 1 by a surface track 10, which pad 11 surrounds the opening of the hole 4 and is connected to the plating 5 thereof. In this embodiment, each of the other unplated holes similarly connects to a plated through hole.

耐はんだ性の層12がめつきした貫通孔のすべてを覆っ
て設けであるが、パッド9および非めっき孔のまわりの
他のパッドのすべては露出したままとしである。
A solder resistant layer 12 is provided over all of the plated through holes, but leaves pad 9 and all other pads around the non-plated holes exposed.

プリント回路板の大部分は導電層を設けたエポキシ・ガ
ラスで構成しである。エポキシ・ガラスの境界は電圧平
面6であり、その反対側にはポリイミド・ガラス層13
が設けである・ 構成部品を取付けるには、そのピンをめっきしてない孔
に挿入し、パッド9および同様なパッドを含む面を錫・
鉛はんだウェーブに対して動かし、パッド9をピン3に
連結するはんだのすみ肉14を残す。このすみ肉は他の
ピンをもプリント回路板に同様に連結する。
Most printed circuit boards are constructed of epoxy glass with a conductive layer. The boundary of the epoxy glass is a voltage plane 6, and on the opposite side there is a polyimide glass layer 13.
To install the component, insert its pin into the unplated hole and tin the surface containing pad 9 and similar pads.
Move against the lead solder wave, leaving a solder fillet 14 connecting pad 9 to pin 3. This fillet similarly connects other pins to the printed circuit board.

はんだは非めっき孔には決して侵入せず、耐はんだ層1
2によってめっき貫通孔にも侵入しない。この耐はんだ
Ml、2は熱バリヤとしても作用する。
Solder never penetrates into non-plated holes, and solder-resistant layer 1
2, it does not enter the plating through hole. This solder resistor Ml,2 also acts as a thermal barrier.

構成部品を取外したい場合には、プリント回路板を錫・
鉛はんだウェーブ上方に吊り下げ、この構成部品のすべ
てのピンのはんだを溶かし、この構成部品を取外す。そ
の後、孔にまたがっているはんだを穏やかに吹き払いそ
の後、暖めた空気を使って固化させる。孔をき九いにし
てから、交換部品を挿入し、所定位置ではんだ付けする
。必要に応じて、所定の位置の構成部品を何回も変更で
きる。こうして、プリント回路板を経済的かつ容易に修
理あるいは改造することができる。
If you want to remove the components, you can remove the printed circuit board with tin.
Suspend above the lead solder wave, melt the solder on all pins of this component, and remove this component. Then, gently blow away the solder that spans the holes, and then use warm air to solidify it. After drilling the holes, insert the replacement part and solder it in place. Components in a given position can be changed as many times as needed. In this way, printed circuit boards can be repaired or modified economically and easily.

成るピン・グリッド・アレイ・パッケージのはんだを溶
かし、取外すのに3ないし5秒であり、プリント回路板
への損傷も無視し得る程度であることがわかった。これ
は、全体的に絶縁体としてエポキシ・ガラスを用いて構
成したプリント回路板のめっき貫通孔にパッケージのピ
ンをはんだ付けする場合に匹敵する。はんだを溶かすの
に数十秒かかることがわかっており、各ピンのはんだを
個別に溶かし、吸引作用で除去する場合でも、がなりの
数の孔のところで損傷が生じるのがわかっている。この
損傷は、通常、パワI(の周縁が剥離し、内部導電層と
孔めっき部の結合が破壊される可能性があることを意味
する。これが起きるのは溶融錫・釦はんだの温度(22
0℃から250°C)にプリント回路板がさらされる時
間と孔内のはんだの与える熱伝達経路とが結びついて、
プリン1〜回路板内部のエポキシ・ガラス材料の温度が
120℃のその転移温度以上に上昇するからである。こ
の温度以」二では、プリント回路板の膨張率が急激に高
まり、プリント回路板を横ぎる方向のエポキシ・ガラス
材料の膨張が導電材料の膨張より大きくなる。同時に導
電性材料(普通は銅)とエポキシ・ガラス材料の結合力
もかなり減少する。
It has been found that it takes 3 to 5 seconds to melt the solder and remove the pin grid array package, with negligible damage to the printed circuit board. This is comparable to soldering package pins to plated through holes in a printed circuit board constructed entirely of epoxy glass as an insulator. It is known that it takes several tens of seconds to melt the solder, and even if the solder on each pin is melted individually and removed using suction, it is known that damage occurs at a large number of holes. This damage usually means that the periphery of the Power I (POWER I) may peel off and the bond between the internal conductive layer and the hole plating may be broken. This occurs at the temperature of the molten tin/button solder (22
The time the printed circuit board is exposed to temperatures (0°C to 250°C) combined with the heat transfer path provided by the solder in the holes;
This is because the temperature of the epoxy glass material inside the circuit board rises above its transition temperature of 120°C. Above this temperature, the rate of expansion of the printed circuit board increases rapidly such that the expansion of the epoxy glass material across the board is greater than the expansion of the conductive material. At the same time, the bonding strength between the conductive material (usually copper) and the epoxy glass material is significantly reduced.

次に、ポリイミド・ガラス層13の機能を説明する。ポ
リイミド・ガラス材料の転移温度は260℃から280
℃である。したがって、はんだウェーブの220℃から
250℃の温度ではパッドとの結合力の損失が最低であ
り、パッドがポリイミド・ガラス層に結合する状態が良
好に保たれる。その結果、パッドが予め結合していた内
部めっき部ともはや結合していなくても、バットが認識
できる程度に剥離することはない。しかも、プリント回
路板の大部分がエポキシ・ガラスで作られており、これ
はポリイミド・ガラスよりも安いので、プリント回路板
全体のコストも低減できる。
Next, the function of the polyimide glass layer 13 will be explained. The transition temperature of polyimide glass material is from 260℃ to 280℃
It is ℃. Therefore, at a temperature of 220° C. to 250° C. of the solder wave, the loss of bonding force with the pad is minimal and the bonding of the pad to the polyimide glass layer is maintained well. As a result, the bat will not appreciably delaminate even though the pad is no longer bonded to the internal plating to which it was previously bonded. Moreover, the printed circuit board is largely made of epoxy glass, which is cheaper than polyimide glass, reducing the overall cost of the printed circuit board.

銅被着ポリイミド・ガラス積層体は市販製品である。し
たがって、第1図のプリン1−回路板を簡単な方法で作
ることができる。必要なエポキシ・ガラス積層体は複層
プリント回路板の製造で使用する普通の要領で作ること
ができる。同様にして、ポリイミド・ガラス積層体に電
圧平面6のパターンを設けることができる。これらの積
層体は平面6を内側に向けて1つの外側層としてポリイ
ミド・ガラス積層体となるように重ねて組み立てられる
Copper-coated polyimide glass laminates are commercially available products. Therefore, the printer 1 circuit board of FIG. 1 can be made in a simple manner. The necessary epoxy glass laminates can be made using conventional procedures used in the manufacture of multilayer printed circuit boards. Similarly, a pattern of voltage planes 6 can be provided in the polyimide glass laminate. These laminates are assembled one on top of the other with the plane 6 facing inward as one outer layer to form a polyimide glass laminate.

積層体はプレプレグのシート(部分的に硬化したエポキ
シ・ガラス)ではさみ、加熱して全体的に相互に接合し
て硬化を完全にする。
The laminate is sandwiched between sheets of prepreg (partially cured epoxy glass) and heated to fully bond them together and fully cure.

これに要する温度、時間は少なくてもよく、ポリイミド
・ガラスに必要な温度、時間よりもエポキシ・ガラスに
適している。平面6をこうしてプレプレグシートの一方
に接合し、エポキシ・ガラスとポリイミド・ガラスのほ
とんどの部分が互いに接触せず、したがって、これらの
材料の結合状態に依存している場合に生しる可能性のあ
る問題を解決できることに注目されたい。次に、外側導
電パターンを措成し、めっきすべき孔をあける。次に、
プリント回路板をめっきし、その後、非めっき孔を穿ち
、耐はんだ層を設ける。
The temperature and time required for this may be small and are more suitable for epoxy glass than the temperature and time required for polyimide glass. The possibility arises if the plane 6 is thus joined to one of the prepreg sheets, and most parts of the epoxy glass and polyimide glass do not touch each other and are therefore dependent on the bonding state of these materials. Note that it can solve certain problems. Next, an outer conductive pattern is formed and holes to be plated are drilled. next,
The printed circuit board is plated and then unplated holes are drilled and a solder resistant layer is applied.

第3図は4つの同心の正方形に配置したピンを有するピ
ン・グリッド・アレイ・パッケージのための孔の配置の
一例を示す。これらのピンのみめの、孔8に類似した非
めっき孔20は孔4に類似した貫通孔22に区域21の
内外いずれかで接続しである。これらの孔のうち、はん
の少しの孔しか第3図に示してないことは了解されたい
。組織的な設計の観点から各非めっき孔をリンクによっ
てめっき貫通孔に接続するのが好ましいが、望むならば
、1つの非めっき孔(すなわち、ピン)から別のもの、
たとえば、他の構成部品あるいは縁コネクタまでまっす
ぐに軌道を設けてもよい。
FIG. 3 shows an example of hole placement for a pin grid array package with pins arranged in four concentric squares. Only these pins have non-plated holes 20, similar to holes 8, connected to through holes 22, similar to holes 4, either inside or outside the area 21. It should be appreciated that only a few of these holes in the solder are shown in FIG. Although it is preferable from an organizational design point of view to connect each non-plated hole to a plated through-hole by a link, it is possible to connect one non-plated hole (i.e. pin) to another, if desired.
For example, tracks may be provided straight to other components or edge connectors.

適切な寸法の例として、プリント回路板の厚さ0.11
4インチ(2,896mm)、ポリイミド届のノ4さ0
.005インチ(0,127mm)、導電層の厚さ0.
0014インチ(0,0356mm) 、耐はんだ層の
厚さ0.002から0.003インチ(0,0508か
ら0.0762mm)である。ピンはプリント回路板9
表面から0.040がらo、oaoインチ(1,01,
6から2.032−mm)突出してもよい。
An example of suitable dimensions is a printed circuit board thickness of 0.11
4 inches (2,896 mm), polyimide material 4 x 0
.. 0.005 inches (0.127 mm), conductive layer thickness 0.005 inches (0.127 mm), conductive layer thickness 0.
0.0014 inch (0.0356 mm), and the thickness of the solder-resistant layer is 0.002 to 0.003 inch (0.0508 to 0.0762 mm). Pin is printed circuit board 9
0.040 o, oao inch (1,01,
6 to 2.032-mm).

発明者等は、上に説明したような、ポリイミド・ガラス
の外側層を持つエポキシ・ガラスの複合プリント回路板
が、たとえ、ピンをめっき貫通孔にはんだ付けした場合
でも成る構成部品を取外すときに全体がエポキシ・ガラ
スで作られているプリン1〜回路板の場合よりも損傷が
少ないことを見出した。成る種の用途ては、特にプリン
ト回路板が比較的薄く例えば、0.006インチ(0,
1524mm)である場合、個々のピンからはんだを吸
引することによって4W成部品を取外すことができ、許
容できない程の損傷を与えることもない。
The inventors have discovered that a composite printed circuit board of epoxy glass with an outer layer of polyimide glass, such as that described above, is capable of disassembling components even when pins are soldered to plated through holes. It has been found that there is less damage than in the case of circuit boards made entirely of epoxy glass. In some applications, especially when printed circuit boards are relatively thin, e.g.
1524 mm), the 4W components can be removed by suctioning the solder from the individual pins without causing unacceptable damage.

耐はんだ/温度バリヤはプリン1へ回路板の保全性を高
めるが、孔内側の接続部の信頼性が重要でないならば省
略してもよい。
The anti-solder/temperature barrier increases the integrity of the circuit board to the print 1, but may be omitted if the reliability of the connections inside the hole is not important.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、プリント回路板の一部を通る断面図であり、
装着した構成部品の一部を示す図である。 第2図は、第1図に示すプリンi〜回路板の部分を、構
成部品を省略して、上から見た平面図である。 第3図は、個々の構成部品と組み合わせたプリント回路
板区域にある孔の配置を示す概略図である。 [主要部分の符合の説明]
FIG. 1 is a cross-sectional view through a portion of a printed circuit board;
FIG. 3 is a diagram showing some of the installed components. FIG. 2 is a top plan view of the circuit board shown in FIG. 1, with component parts omitted. FIG. 3 is a schematic diagram showing the arrangement of holes in the printed circuit board area in combination with the individual components. [Explanation of the signs of the main parts]

Claims (1)

【特許請求の範囲】 1、エポキシ・ガラスと導電性材料の交互の層と、プリ
ント回路板の片面にあるポリイミド・ガラス僧と、この
ポリイミド・ガラス層の外側面にあって構成部品接続ピ
ンに接続するようになっている導電性パッドとを包含し
、装着済みの構成部品の取外し、交換のときにプリント
回路板に損傷を与える可能性を減らすような配置となっ
ていることを特徴とする複層プリント回路板。 2、特許請求の範囲第1項記載の複層プリント回路板に
おいて、プリント回路板の層を貫いて成るパターンの孔
が設けてあり、これらの孔が接続ピンを受け入れるよう
に配置してあり、これらの孔の少なくともいくつかが前
記導電性パッドを貫通していることを特徴とする複層プ
リント回路板。 3、特許請求の範囲第1項または第2項に記載の複層プ
リント回路板において、はぼ完全な導電性材料層がポリ
イミド・ガラス層と隣接したエポキシ・ガラス層との間
に延在していることを特徴とする複層プリント回路板。 4、複層プリント回路板組立体を製造する方法であって
、導電性部分を支持している複数のエポキシ・ガラス層
と外面に導電性パッドを包含する導電性区域を有するポ
リイミド・ガラスの上層とを相互に接合して積重体を形
成し、プリント回路板上に接続ピンを有する構成部品を
置いて接続ピンのうち少なくともいくつかを前記導電性
パッドと係合させ、ピンをパッドにはんだ付けすること
からなることを特徴とする方法。 5、特許請求の範囲第4項記載の複層プリント回路板組
立体を製造する方法において、さらに、前記接続ピンを
受け入れるように接合した層を貫いて孔を形成し、これ
らの孔の少なくともいくつかが前記導電性パッドを貫通
するようにし、プリン1〜回路板上に構成部品を1どき
、接続ピンが孔を通り、ピンの、、端を、′ 性パッドから突出させ、ピンの突出端をパッドにはんだ
付けすることからなることを特徴とする方法。 6、添付図面を参照しながら説明する゛ように構成した
複層プリント回路板。 7、添付図面を参照しながら説明するよう・ に複層プ
リント回路板組立体を製造する方法。
[Claims] 1. Alternating layers of epoxy glass and conductive material, a polyimide glass layer on one side of the printed circuit board, and component connecting pins on the outer side of the polyimide glass layer. conductive pads adapted to be connected and arranged to reduce the possibility of damage to the printed circuit board during removal or replacement of installed components. Multilayer printed circuit board. 2. A multilayer printed circuit board according to claim 1, wherein a pattern of holes is provided through the layers of the printed circuit board, and these holes are arranged to receive connection pins, A multilayer printed circuit board characterized in that at least some of these holes pass through the conductive pads. 3. A multilayer printed circuit board according to claim 1 or 2, wherein a nearly complete layer of conductive material extends between a polyimide glass layer and an adjacent epoxy glass layer. A multilayer printed circuit board characterized by: 4. A method of manufacturing a multilayer printed circuit board assembly, the method comprising: a plurality of epoxy glass layers supporting conductive portions and a top layer of polyimide glass having a conductive area including conductive pads on the outer surface; are bonded together to form a stack, placing a component having connecting pins on a printed circuit board to engage at least some of the connecting pins with the conductive pads, and soldering the pins to the pads. A method characterized by: 5. The method of manufacturing a multilayer printed circuit board assembly according to claim 4, further comprising forming holes through the bonded layers to receive the connecting pins, and at least some of these holes. 1 through the conductive pad, place the component on the circuit board, the connecting pin passes through the hole, the end of the pin protrudes from the conductive pad, and the protruding end of the pin A method comprising: soldering to a pad. 6. A multilayer printed circuit board constructed as described with reference to the accompanying drawings. 7. A method of manufacturing a multilayer printed circuit board assembly as described with reference to the accompanying drawings.
JP59171699A 1983-08-20 1984-08-20 Composite layer printed circuit board and method of producing same Pending JPS6059799A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8322474 1983-08-20
GB838322474A GB8322474D0 (en) 1983-08-20 1983-08-20 Printed circuit boards

Publications (1)

Publication Number Publication Date
JPS6059799A true JPS6059799A (en) 1985-04-06

Family

ID=10547638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59171699A Pending JPS6059799A (en) 1983-08-20 1984-08-20 Composite layer printed circuit board and method of producing same

Country Status (7)

Country Link
JP (1) JPS6059799A (en)
AU (1) AU571886B2 (en)
DE (1) DE3428812A1 (en)
FR (1) FR2550906B1 (en)
GB (2) GB8322474D0 (en)
NL (1) NL8402527A (en)
ZA (1) ZA846089B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2551618B1 (en) * 1983-09-02 1989-12-01 Inf Milit Spatiale Aeronaut METHOD FOR MANUFACTURING A PRINTED CIRCUIT WITH BURIED LAYERS AND PRINTED CIRCUIT OBTAINED BY SUCH A METHOD
GB2207558B (en) * 1987-07-11 1991-10-30 Abdul Hamed Printed circuit boards
TW526693B (en) 2000-06-15 2003-04-01 Murata Manufacturing Co Multilayer circuit component and method for manufacturing the same
DE102015111432A1 (en) * 2015-07-15 2017-01-19 Knorr-Bremse Systeme für Nutzfahrzeuge GmbH Method for processing a mechatronic system for a commercial vehicle and a mechatronic system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2650348A1 (en) * 1976-11-03 1978-05-11 Bosch Gmbh Robert Electric component soldered on printed circuit board - using layer of nickel covered by gold to ensure strong soldered joint
BR8008696A (en) * 1979-05-24 1981-04-14 Fujitsu Ltd MULTIPLE LAYER PRINTED CIRCUIT PANEL, HOLLOW, AND PROCESS FOR MANUFACTURING THE SAME
FR2476428A1 (en) * 1980-02-15 1981-08-21 Tech Electro Cie Indle METHOD FOR FASTENING ELECTRONIC COMPONENTS ON A PRINTED CIRCUIT AND PRODUCT OBTAINED THEREBY
JPS5724775U (en) * 1980-07-17 1982-02-08

Also Published As

Publication number Publication date
GB2145574A (en) 1985-03-27
NL8402527A (en) 1985-03-18
AU571886B2 (en) 1988-04-28
GB8322474D0 (en) 1983-09-21
GB2145574B (en) 1986-04-09
DE3428812A1 (en) 1985-03-07
GB8421094D0 (en) 1984-09-26
FR2550906B1 (en) 1992-09-04
AU3204684A (en) 1985-02-21
FR2550906A1 (en) 1985-02-22
ZA846089B (en) 1985-03-27

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