JPS605559A - Electrode structure of semiconductor element - Google Patents
Electrode structure of semiconductor elementInfo
- Publication number
- JPS605559A JPS605559A JP58113158A JP11315883A JPS605559A JP S605559 A JPS605559 A JP S605559A JP 58113158 A JP58113158 A JP 58113158A JP 11315883 A JP11315883 A JP 11315883A JP S605559 A JPS605559 A JP S605559A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- layer
- type
- semiconductor
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- 239000012535 impurity Substances 0.000 claims abstract description 11
- 238000002844 melting Methods 0.000 claims abstract description 7
- 230000008018 melting Effects 0.000 claims abstract description 6
- 229910052719 titanium Inorganic materials 0.000 abstract description 5
- 229910052697 platinum Inorganic materials 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 229910052725 zinc Inorganic materials 0.000 abstract description 4
- 239000012299 nitrogen atmosphere Substances 0.000 abstract description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000010438 heat treatment Methods 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 229910001020 Au alloy Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000005275 alloying Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- Ceramic Engineering (AREA)
- Optics & Photonics (AREA)
- Electromagnetism (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、発光ダイオード（以下Ｉ、ＥＤと呼ぶ）や、
半導体レーザ等の半導体素子の電極構造の改良に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention provides light emitting diodes (hereinafter referred to as I and ED),
This invention relates to improvements in the electrode structure of semiconductor devices such as semiconductor lasers.
ＬＥＤや、半導体レーザは、光通信システムの光源とし
て研究開発が進んでいる。これらの半導体素子にとりて
、長寿命であることは、実用上極めて重要である。素子
劣化の原因はいくつかあるが、中でも電極に起因するも
のが大きな比重を占めて〜・る。電極に起因した半導体
素子劣化は、特に活性部に近い側の電極金属と、半導体
の反応によるところが太きい。例えばＡｕ合金のような
半導体と合金化反応をする金属より、ＴｉＰｔのような
半導体との反応の小さい高融点金属の方が電極金属とし
て信頼性が高い可能性を有して（・る。Research and development is progressing on LEDs and semiconductor lasers as light sources for optical communication systems. For these semiconductor devices, it is extremely important for practical use that they have a long life. There are several causes of element deterioration, but among them, those caused by electrodes account for a large percentage. Semiconductor element deterioration caused by electrodes is largely due to the reaction between the electrode metal near the active region and the semiconductor. For example, a high melting point metal such as TiPt, which has a small reaction with a semiconductor, may be more reliable as an electrode metal than a metal such as an Au alloy, which undergoes an alloying reaction with a semiconductor.
そこで従来、信頼性上電極金属の選択に重点が置かれお
り、種々の試みがなされている。しかしながら、電極金
属を、例えばＡｕ合金系からＴｊＰｔに変えるだけでは
必ずしも素子の信頼性改善に結びつかなかった。高融点
金属電極を用いた半導体素子は、半導体と合金化反応す
る金属電極を用いた素子より劣化の小さいものもあるが
、信Ｆ性の改善のみられない場合も多く、歩留りが高く
なかった０
本発明の目的は、従来の半導体素子に係るこのような欠
点を除いた、信頼性が高くかつ捷留りの高い半導体素子
が得られる電極の提供にある。本発明者は、半導体と反
応の小さい金属を電４：Ｊ（に用いることは、＠頼性の
高い半導体素子なＪ、？’ｉる一つの条件であるが、そ
れだけでは充分ではな（、電極金属と半導体界面近傍で
のエネルギー消費な減らすことが、半導体素子の動作時
における金属と半導体の反応の進行を抑えイ６頼性を高
めるとの考えで種々の実験を行なった結果、ＺｎやＢｅ
なと、半導体に入りＰ型不純物となる金属と’ｒｔ、ｗ
、ｐｔ。Therefore, conventionally, emphasis has been placed on the selection of electrode metals from the viewpoint of reliability, and various attempts have been made. However, simply changing the electrode metal from, for example, an Au alloy system to TjPt does not necessarily lead to an improvement in the reliability of the device. Semiconductor devices using high melting point metal electrodes may have less deterioration than devices using metal electrodes that undergo an alloying reaction with the semiconductor, but in many cases there is no improvement in reliability and the yield is not high. An object of the present invention is to provide an electrode that eliminates the above-mentioned drawbacks of conventional semiconductor devices and allows a semiconductor device to be obtained with high reliability and high retention. The present inventor believes that using a metal that has a low reaction with semiconductors for electric current is one of the conditions for achieving highly reliable semiconductor devices, but it is not sufficient on its own. As a result of various experiments, we have conducted various experiments with the idea that reducing energy consumption near the interface between the electrode metal and the semiconductor will suppress the progress of the reaction between the metal and the semiconductor during the operation of the semiconductor element, and will improve reliability. Be
The metal that enters the semiconductor and becomes a P-type impurity and 'rt,w
, pt.
ＭＯｌＰｄなとの高融点金属とを含む金属層により形成
された電極を用いることにより信頼性の高い半導体素子
が得られるという実験結果を得、それに基づいて本発明
がなされたものである。The present invention was developed based on experimental results showing that a highly reliable semiconductor device can be obtained by using an electrode formed of a metal layer containing a high melting point metal such as MOIPd.
Ｐ型不純物となる金属を含んだ場合に高い歩留りで信頼
性の高い半導体素子が得られる理由として、オーミック
電極形成の熱処理工程によって、半導体中にＰ型不純物
として導入され表面濃度が高くなることにより電極金属
との界面近傍の半導体層の空乏層幅が小さくなり金属か
ら半導体へのトンネリングが容易になることや、半導体
層での拡がり抵抗が小さくなることにより、電極金属と
半導体層との界面近傍での電位勾配が小さくなり、発熱
が低減し、電極金属の電界による移動や、熱による金属
の拡散、界面付近に存在する欠陥の移動等が抑えられる
ためと考えられる。The reason why semiconductor devices with high yield and high reliability can be obtained when metals that serve as P-type impurities are included is that they are introduced as P-type impurities into the semiconductor during the heat treatment process for forming ohmic electrodes, increasing the surface concentration. The width of the depletion layer in the semiconductor layer near the interface with the electrode metal becomes smaller, making tunneling from the metal to the semiconductor easier, and the spreading resistance in the semiconductor layer becomes smaller. This is thought to be because the potential gradient at the interface becomes smaller, heat generation is reduced, and movement of the electrode metal due to the electric field, diffusion of the metal due to heat, movement of defects near the interface, etc. are suppressed.
さらに、Ｐ型不純物となる金属を含むことの利点として
は、次の様な点がある。半導体表面濃度を高くする目的
では結晶成長時にドーピング量を大きくしたり、不純物
拡散をすること等が考えられる。しかし、結晶成長時に
ドーピング量を大きくすると、高温での結晶成長工程に
、不純物が他の成長層に入り易く、又、局所的な高濃度
領域の形成が困難といった欠点がある。７２又、拡散に
よる場合も、高温熱処理を含む複雑な工程を要するとい
った欠点がある。これらに対し、Ｐ型不純物となる金属
を電極金属として含む本発明の構造は例えば真空蒸着の
ような簡単な工程でＰ型不純物金属層を形成することが
でき、又、例えば適当なマスクをすることにより局所的
な高濃度領域の形成が容易に出来るといった利点もある
。Furthermore, there are the following advantages of including a metal serving as a P-type impurity. In order to increase the semiconductor surface concentration, it is possible to increase the amount of doping during crystal growth or to diffuse impurities. However, if the doping amount is increased during crystal growth, impurities tend to enter other growth layers during the crystal growth process at high temperatures, and it is difficult to form localized high concentration regions. 72 Furthermore, the method using diffusion also has the drawback of requiring complicated steps including high-temperature heat treatment. In contrast, the structure of the present invention, which includes a metal serving as a P-type impurity as an electrode metal, allows a P-type impurity metal layer to be formed by a simple process such as vacuum evaporation. This also has the advantage that local high concentration regions can be easily formed.
即ち、本発明は半導体中でＰ型不純物となる金属と高融
点金属とを少なくとも含む金属層により形成されたこと
を特徴とする半導体素子の電極構造である。That is, the present invention is an electrode structure for a semiconductor device, characterized in that it is formed of a metal layer containing at least a metal that becomes a P-type impurity in a semiconductor and a high melting point metal.
次に、ＩｎＧａＡａＰ 、ＩｎＰダブルへテロ構造面発
光型ＬＥＤの実施例に基づき詳細に説明する。Next, a detailed explanation will be given based on an example of an InGaAaP, InP double heterostructure surface-emitting LED.
第１図は、 ＩｎＧａＡ′￥ＩｎＰダブルへテロ構造面
発光型ＬＥＤの一実施例を示す「メ「面図である。FIG. 1 is a "front view" showing an embodiment of an InGaA'\InP double heterostructure surface-emitting LED.
ｎ型ＩｎＰ基板上１１の上に、ｎ型ＩｎＰ層、１２（ｎ
−１Ｘ １０” ｃｔ、”厚さ１〜５μ風）、活性層と
なるｎ型 ＩｎＧａＡｓＰ 層１３ （ｎ〜３Ｘ１０′
７ｃｒｉ’、厚さ１〜２ μｍ） 、Ｐｇ ＩｎＰ Ｎ
４１４ （Ｐ〜３Ｘ１６ｇｃｍ、厚さ１〜２μＴｎ）、
Ｐ型ＩｎＧａＡｓＰ層１５（Ｐ〜ｌＸ１０ａＩｔ、厚さ
〜１μｍ）をＩｌｌに形成する。次に、Ｐ型ＩｎＧａＡ
ｓＰ層１５の表面にＣＶＤによりＳｉＯ＊膜１６膜形６
した後、フォトレジストによりパターン形成し直径３０
μ簿の円形状に５ｉｎｓを除去する。Ｐ型ＩｎＧａＡｓ
Ｐ層１５及びＳｉＯ＊膜１６膜形６上にＺｎ、Ｔｉ、Ｐ
ｔを順に蒸着し金属膜１７を形成した後、Ｎ２又はＮ、
雰囲気で熱処理しＰ型オーミック電極１７とする。この
実施例ではＺｎ、Ｔｉ、Ｐｔを順にｌ’１ｆｌｉしたが
ＺｎやＴｉ、Ｐｔを含む合金を蒸着してもよい。この金
属膜１７の上にＡｕ蒸着膜１８を形成する。続いてｎ型
ＩｎＰ基板１１を研■して約１００μ鶏の厚さにした後
、との表面に、Ａ ｕ Ｇ ｅ Ｎ ｉ蒸着膜１９を形
成する。On the n-type InP substrate 11, an n-type InP layer, 12 (n
-1X 10" ct, "thickness 1~5μ), n-type InGaAsP layer 13 (n~3X10') serving as the active layer
7cri', thickness 1-2 μm), PgInPN
414 (P~3X16gcm, thickness 1~2μTn),
A P-type InGaAsP layer 15 (P~1X10aIt, thickness ~1 μm) is formed on Ill. Next, P-type InGaA
A SiO* film 16 film type 6 is formed on the surface of the sP layer 15 by CVD.
After that, a pattern was formed using photoresist and the diameter was 30 mm.
Remove 5ins in the circular shape of the μ book. P-type InGaAs
Zn, Ti, P on the P layer 15 and SiO* film 16 film type 6.
After forming the metal film 17 by sequentially evaporating t, N2 or N,
Heat treatment is performed in an atmosphere to form a P-type ohmic electrode 17. In this embodiment, Zn, Ti, and Pt were deposited in this order, but an alloy containing Zn, Ti, and Pt may be deposited. An Au vapor deposition film 18 is formed on this metal film 17. Subsequently, the n-type InP substrate 11 is polished to a thickness of approximately 100 μm, and then an AuGeNi vapor deposited film 19 is formed on the surface thereof.
ｓｔｏｗ膜１６の円形パターンと同心状にＡｕＧｅＮｉ
膜１９上に膜片９上ジストによりパターン形成し直径１
２０μ落の円形状にＡ ｕ Ｇ ｅ Ｎ ｉを除去し、
光取出し窓２０を形成する。最後にＨ，又はＮ２ 雰囲
気中で熱処理し、ｎ型オーミック霜、極１９とする。AuGeNi is placed concentrically with the circular pattern of the stow film 16.
A pattern is formed on the film 19 by a resist on the film piece 9 to form a pattern with a diameter of 1
Remove A u G e N i in a circular shape with a thickness of 20μ,
A light extraction window 20 is formed. Finally, heat treatment is performed in an H or N2 atmosphere to form n-type ohmic frost, pole 19.
第２図は、従来のＡｕ召合金系金属らなる電極、Ｔ ｉ
Ｐ ｔ ’［ｉ極、本発明の一実施例のＺｎ−Ｔｉ−
Ｐｔ電極の３種の電極構造の通電試駆結果、即ち、光出
力の時間変化、ダークスポット欠陥の発生数の時間変化
を示した図である。図に示されている様に本発明の電極
構造によりＬＥＤのイド頼性が著しく改善された。Figure 2 shows a conventional electrode made of Au-alloy metal, Ti
P t ' [i-pole, Zn-Ti- of one embodiment of the present invention
FIG. 4 is a diagram showing the results of current test driving of three types of electrode structures of Pt electrodes, that is, the time change in optical output and the time change in the number of dark spot defects. As shown in the figure, the electrode structure of the present invention significantly improves the LED reliability.
本発明の！ ’？ＲＩｎ造はＬＥＩ）のみならずレーザ
ダイオード、フォトダイオード、トランジスタ等にも適
用でき、ＩｎＰ−ＩｎＧａＡｓＰ系の他にＧａＡｓ−Ａ
ｌＧａＡｓ系をはじへ他のｉ−ｖ族化合物半導体材料か
らなる半導体素子にも同様に適用することができる。The invention! '? RIn structure can be applied not only to LEI) but also to laser diodes, photodiodes, transistors, etc. In addition to InP-InGaAsP, GaAs-A
The present invention can be similarly applied to semiconductor devices made of other IV group compound semiconductor materials as well as lGaAs-based materials.
上記実施例では高融点金属としてＴｉ、Ｐｔを用いたが
、この他Ｗ、 Ｍｏ、 Ｐｄ、笠の金属でも実施例と同
様の結果が得られる。Although Ti and Pt were used as high-melting point metals in the above embodiments, the same results as in the embodiments can be obtained using other metals such as W, Mo, Pd, and Kasa.
以上、い′−シク述べてきた様に、本発明により、信頼
性が高くかつ歩留りの高い半導体素子を得ることができ
た。As described above, according to the present invention, a semiconductor device with high reliability and high yield can be obtained.
第１図及び第２図は、本発明の一実施例を示す図である
。図中１１から１５は半導体層を、１７は電極金属層を
示して〜・る。
Ｑフ人弁理士 内１県 晋
オ １ 図FIG. 1 and FIG. 2 are diagrams showing one embodiment of the present invention. In the figure, 11 to 15 indicate semiconductor layers, and 17 indicates an electrode metal layer. Q Japanese patent attorney 1 prefecture Shino 1 Figure
Claims (1)
なくとも含む金属層により形成されたことを特徴とする
半導体素子の電極構造。An electrode structure for a semiconductor device, characterized in that it is formed of a metal layer containing at least a metal that becomes a P-type impurity in a semiconductor and a high melting point metal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58113158A JPS605559A (en) | 1983-06-23 | 1983-06-23 | Electrode structure of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58113158A JPS605559A (en) | 1983-06-23 | 1983-06-23 | Electrode structure of semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS605559A true JPS605559A (en) | 1985-01-12 |
Family
ID=14605024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58113158A Pending JPS605559A (en) | 1983-06-23 | 1983-06-23 | Electrode structure of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS605559A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5077599A (en) * | 1989-06-16 | 1991-12-31 | Sumitomo Electric Industries, Ltd. | Electrode structure for iii-v compound semiconductor element and method of manufacturing the same |
| US5179041A (en) * | 1989-06-16 | 1993-01-12 | Sumitomo Electric Industries, Ltd. | Method for manufacturing an electrode structure for III-V compound semiconductor element |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5042786A (en) * | 1973-05-18 | 1975-04-18 | ||
| JPS523383A (en) * | 1975-06-24 | 1977-01-11 | Nec Corp | Manufacturing method of semiconductor device electrode |
-
1983
- 1983-06-23 JP JP58113158A patent/JPS605559A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5042786A (en) * | 1973-05-18 | 1975-04-18 | ||
| JPS523383A (en) * | 1975-06-24 | 1977-01-11 | Nec Corp | Manufacturing method of semiconductor device electrode |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5077599A (en) * | 1989-06-16 | 1991-12-31 | Sumitomo Electric Industries, Ltd. | Electrode structure for iii-v compound semiconductor element and method of manufacturing the same |
| US5179041A (en) * | 1989-06-16 | 1993-01-12 | Sumitomo Electric Industries, Ltd. | Method for manufacturing an electrode structure for III-V compound semiconductor element |
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