JPS6049655A - Forming method of bump for leadless chip carrier - Google Patents

Forming method of bump for leadless chip carrier

Info

Publication number
JPS6049655A
JPS6049655A JP15700983A JP15700983A JPS6049655A JP S6049655 A JPS6049655 A JP S6049655A JP 15700983 A JP15700983 A JP 15700983A JP 15700983 A JP15700983 A JP 15700983A JP S6049655 A JPS6049655 A JP S6049655A
Authority
JP
Japan
Prior art keywords
bump
chip carrier
metallic
pads
leadless chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15700983A
Inventor
Yasuo Kawamura
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15700983A priority Critical patent/JPS6049655A/en
Publication of JPS6049655A publication Critical patent/JPS6049655A/en
Application status is Pending legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Abstract

PURPOSE:To form a cored bump having uniform quality by slight man-hours by using a metallic mask when the cored bump is formed on the surface of a substrate for a leadless chip carrier. CONSTITUTION:Substrates 1 for a leadless chip carrier are arranged regularly on a metallic tray 21 while upward directing the surfaces on which pads are disposed. Windows 27 for metallic masks formed made to correspond to the pads on the substrates 1 are arranged so as to be positioned on the pads. When a large number of solder balls having large diameters are placed on the metallic masks in the tray 21 and shaken, the solder balls naturally fall into circular sections 24. When a large number of core sections having small diameters are entered and shaken, the core sections fall into circular sections 25 in the windows. The tray 21 is fed into an electric furnace, and heated and cooled.
JP15700983A 1983-08-26 1983-08-26 Forming method of bump for leadless chip carrier Pending JPS6049655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15700983A JPS6049655A (en) 1983-08-26 1983-08-26 Forming method of bump for leadless chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15700983A JPS6049655A (en) 1983-08-26 1983-08-26 Forming method of bump for leadless chip carrier

Publications (1)

Publication Number Publication Date
JPS6049655A true JPS6049655A (en) 1985-03-18

Family

ID=15640181

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15700983A Pending JPS6049655A (en) 1983-08-26 1983-08-26 Forming method of bump for leadless chip carrier

Country Status (1)

Country Link
JP (1) JPS6049655A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62112355A (en) * 1985-11-12 1987-05-23 Ngk Spark Plug Co Ltd Chip carrier
JPH02144945A (en) * 1988-11-28 1990-06-04 Sumitomo Bakelite Co Ltd Board for semiconductor mounting and its manufacture
JPH0462865A (en) * 1990-06-25 1992-02-27 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH05183067A (en) * 1991-06-20 1993-07-23 Iwaki Electron Corp Ltd External electrode structure of leadless package and manufacturing method thereof
CN106216791A (en) * 2016-08-08 2016-12-14 北方电子研究院安徽有限公司 Space welding and assembling method bottom the one of LCCC device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62112355A (en) * 1985-11-12 1987-05-23 Ngk Spark Plug Co Ltd Chip carrier
JPH02144945A (en) * 1988-11-28 1990-06-04 Sumitomo Bakelite Co Ltd Board for semiconductor mounting and its manufacture
JPH0462865A (en) * 1990-06-25 1992-02-27 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH05183067A (en) * 1991-06-20 1993-07-23 Iwaki Electron Corp Ltd External electrode structure of leadless package and manufacturing method thereof
CN106216791A (en) * 2016-08-08 2016-12-14 北方电子研究院安徽有限公司 Space welding and assembling method bottom the one of LCCC device

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