JPH0344050A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To enable connection without using a bump and the like, and reduce mounting cost, by a method wherein, after an excised part is formed in an inner lead part, bonding material is stuck in the above excised part by a bonding means provided with a bonding material supplying part, and the inner lead is connected with a semiconductor element. CONSTITUTION:A semiconductor device is constituted of the following: a lead composed of an inner lead part 22 formed on the circuit forming surface of a semiconductor element 1 and connected with the semiconductor element 1 via a pad 7 and an outer lead part 21, an insulative substrate 3, and mold resin 4 for resin-sealing the semiconductor element 1 and the inner lead part 22. After a through hole 6 is formed in the inner lead part 22, a wire ball (e.g. gold) 10 is stuck in the through hole 6 by a capillary 8 used in the case of usual wire bonding and the like, and thus the inner lead part 22 can be connected with the semiconductor element 1. Thereby the inner lead part 22 can be easily connected with the semiconductor element 1 without using a bump as in the case of conventional TAB system.

Description

DETAILED DESCRIPTION OF THE INVENTION In recent years, as semiconductor integrated circuits have become more highly integrated and multifunctional, semiconductor elements have become larger and there has been a tendency for semiconductor devices to have more input/output terminals. Therefore, in order to provide a small-sized semiconductor device, a packaging technology is required to package semiconductor elements with high density.

2. Description of the Related Art As a conventional technique for mounting semiconductor elements, for example, a semiconductor device using a so-called flat bank surface mounting method will be described. This is to further reduce the mounting density on the printed board, and for example, narrow the width between the terminals (outer lead portions 41b to be described later) protruding from the molded resin such as epoxy resin. It is of a type in which the opposite sides (or four sides) of the molding 1' resin are exposed and flattened onto the print handle 5o, as shown in FIG. 16, which will be described later.

That is, as shown in FIG. 16, for example, the lead 41 provided on the vano gauge 45 consists of an inner lead part 41a and an outer lead part 41b.

The inner lead part 41a is electrically connected to the semiconductor element 47 by a bonding wire (for example, gold) 49 to a band 48 on a semiconductor element (for example, an IC chip including a RAM, etc.) mounted on the mount part 44. The entire structure is then molded with resin (for example, epoxy resin) 46 by transfer molding.

Further, as shown in the figure, the outer lead portion 41b has a bent bottom shape, and its end portion is electrically connected to the C11 conductor pattern 42 on the printed circuit board 50 by, for example, solder. is fixed.

As described above, according to the IC package structure shown in FIG. 16, the IC chip 47 is mounted on the mounting I-L portion 44, and each bonding pad 48 of the IC chip 47 is mounted on the corresponding inner lead portion 41a. They are individually bonded with wires 49 and further packaged as a whole with a resin mold 46.

However, in this wirehonting method, with the increase in the number of Ic bins in 4.5, Ic
It becomes very difficult to connect the chip and the leads. That is, mainly the inner reed part 41a and the outer reed part 41b
There is a physical limit to the minimum pitch of the leads 41 due to manufacturing and wire bonding considerations. For this reason, even if the active region itself formed on the IC chip 47 is small, the distance between the bonding pads 48 cannot be made small, and as a result, the area of the IC chip 47 cannot be made small. Furthermore, if an attempt is made to reduce the area of the chip 47, the distance between the band 48 and the inner lead portion 41a becomes longer, and the wire 49 becomes drooping or becomes more likely to be cut when the resin is poured.

Moreover, according to the IC package and cage (116 structure) shown in FIG. There is also the possibility that the wire 49 may be cut by touching the edge of the tip 47.

In order to solve these problems, so-called TA B (Tape Automate) as shown in FIG.
dBonding) method is generally known. This TAB is an excellent packaging method because it allows fine patterning, can realize a large number of pins, and can freely provide patterns.

That is, in the package structure using the TAB method, as shown in FIG. 17, leads 61 are formed in a predetermined pattern on a volley SF film substrate 60, and inner lead portions 62 of the leads 61 are formed in character holes. 6
Each of them protrudes within 3. The semiconductor element 64 is arranged within the character ball 63, and a hump 65 is provided in a predetermined bonding area 20 on the circuit forming surface of the semiconductor element 64.
is connected to the inner lead portion 62 by thermocompression bonding or the like. After that, the semiconductor element 64 and each inner lead part 62
is sealed with resin 66 by botting.

Therefore, in the case of a package structure using TAB, a special inner lead bonder such as a hump 65 is required for 21ζ bonding between the inner lead part and the IC chip.
Moreover, the hump 65 requires various steps (such as exposure and etching steps) to form the bump 65 in the bonding region 20 on the semiconductor element 64. For this reason, semiconductor devices using the TAB method have the disadvantage that they are expensive because the wafer process described above is increased during their manufacture, and that their application is limited to special uses such as driver ICs for liquid crystal displays and LSI pancakes for wristwatches. .

C.1 Objective of the Invention An object of the present invention is to provide a semiconductor device and a method for manufacturing the same that reduce the cost required for packaging, eliminate the inconveniences caused by wire bonding, etc., and have high packaging density and reliability.

20 Structure of the Invention That is, the present invention has an outer lead part and an inner lead part to be connected to a semiconductor element, and the inner lead part has a cutout part in a joining area of the semiconductor element and the inner lead part. The present invention relates to a semiconductor device in which the semiconductor element and the inner two portion are connected by a bonding material applied to the cut portion.

The present invention also provides a step of manufacturing the semiconductor device, and supplying a bonding material to the bonding region of the semiconductor element and the inner lid part by a bonding means having a bonding material supplying part to form the semiconductor element and the bonding material of the semiconductor device. A method of manufacturing a semiconductor device is also proposed, which includes a step of bonding the inner lead portion.

E, Example The present invention will be explained in detail below.

1 to 9 show a first embodiment of the present invention.

First, the main structure of the semiconductor device according to this example will be explained with reference to FIGS. 1 to 4. Here, FIG. 1 is a cross-sectional view showing the structure of a semiconductor device according to this example (however, for convenience of explanation, certain parts are appropriately enlarged in this figure, and I-I line in FIG. 2, which will be described later). ), Figure 2 is a plan view of Figure 1 showing the state before resin sealing (however, the bonding pad is omitted in this figure), and Figure 3 is a plan view of the inner lead part with the pad attached. FIG. 4 is a partially cutaway perspective view showing a state before the inner reed portion is bonded to the pad. FIG.

As shown in FIGS. 1 and 2, the semiconductor device according to this embodiment includes a semiconductor element (IC chip) 1 (not shown) in which a predetermined circuit is formed by a plurality of circuit elements, and a circuit of the semiconductor element 1. A lead 2 consisting of an inner lead part 22 and an alicouple 1 part 21 arranged on the forming surface 2 and connected to the semiconductor element 1 via the path 1-7 in the bonding region 20, an insulating substrate 3, the semiconductor element 1 and It is composed of a mold resin 4 and the like that seals the inner lead portion 22 with resin.

In the case of this embodiment, the insulating substrate 3 is made of Boliimi IX resin with excellent heat resistance and flexibility, and a predetermined rectangular opening 5 is formed in the center by punching or etching. It is formed.

The leads 2 can be formed using a film forming process in the normal TAB method. That is, the leads 2 are formed into a predetermined pattern by etching a copper foil laminated on an insulating substrate 3 via an epoxy adhesive, and gold plating (not shown) is applied to the main parts of the copper foil. Ru. The outer lead portions 21 of the lead 2 are each supported by the insulating substrate 3 on their lower surfaces (the surfaces facing the semiconductor element 1 side), and the inner lead portions 22 are respectively provided to protrude into the opening 5 of the insulating substrate 3. ing.

As shown in FIG. 3, the inner lead portion 22 has a width A of about 60 μm, a thickness T of 18 μm, and a pitch interval of about 90 μm, and a predetermined area at the tip of the inner lead portion 22. A through hole 6 with a radius of about 10 μm is formed in each of the holes. This through hole 6 is formed as described above or at the same time as the etching of the tool 2. Further, the bonding pad (for example, Af in this example) 7 has a square shape, and its negative side B is about 60 μm.

Then, as shown in FIGS. 1 and 4, by applying a bonding material 10 such as gold to the through hole 6 by thermocompression bonding or the like, the inner reed portion 22 is bonded in the bonding region 20.
and the semiconductor element 1 (bano F' 7 ) are connected to each other. That is, in the bonding region 20, alloy bonding (Au to Af
The bonding material 10 is adhered to the through hole 6 of the inner lead portion 22 in a so-called caulked state and is firmly fixed using a thermocompression bonding cap.

Here, although omitted in the two consecutive figures and their explanation, in this example, in order to obtain a suitable gap between the inner lead part 22 and the bonding pad 7, the semiconductor element 1 including the pad 7 is Insulating film 3, such as a voluptuous layer on the surface
After coating 4 to a predetermined thickness, the bonding pad 1'' 7 of the semiconductor element 1 is etched using a well-known etching technique in order to expose the surface of the bonding pad 7. As described above, the inner lead portion 22 and the bonding band 7 are joined by the caulking structure described above.
Even if the inner lead portion 22 comes into contact with the semiconductor element 1, no problem will occur because the semiconductor element 1 has already been insulated.

As described above, the semiconductor device according to the present example includes the outer lead portion 21 and the inner lead portion 22 to be connected to the semiconductor element 1, and the bonding area 20 between the semiconductor element 1 and the inner lead portion 22. In this case, the through hole 6 is formed in the inner lead part 22, and the semiconductor element 1 and the inner lead part 22 are connected by the bonding material (gold in this example) 10 applied to the through hole 6. 1
The conventional TAB method pancage structure (1
1) The inner lead portion 22 and the semiconductor element 1 can be easily connected using a bonding material such as gold (AIJ) 10b without using a specially prepared hump 65 as in a semiconductor device having the following. .

Furthermore, as in the semiconductor device having the fland pack type pancage structure shown in FIG. 17 mentioned above, connections are not made by the wire bonding method. (Moreover, the necessary length inside the package can also be secured sufficiently.) In fact, compared to semiconductor devices using conventional wire bonding connections, the molding size is freed from the constraints imposed by conventional lead frames and allows for designs that are dominated by semiconductor elements. In a semiconductor device having a pancage structure shown in FIG.
The outer periphery of the package can be about 0.5 mm (conventionally about 1.7 mm) from the outer periphery. Further, a bonding pinch 901Im(12) (conventionally 160 μm) can be realized.

Therefore, as described above, according to the semiconductor device according to the present example, the above-mentioned wafer process is required to form the hump 65, which inevitably increases the cost.

), it is possible to take advantage of the features of the TAB method and the like while reducing the cost required for its implementation. Furthermore, it is possible to eliminate the disadvantages in wire bonding described in -1- and provide a semiconductor device with high packaging density.

Next, a main method of manufacturing the semiconductor device shown in FIG. 1 will be explained with reference to FIGS. 5 to 9.

FIGS. 8 and 9 show a so-called thermosonic bonding method, which is one of the wire bonding methods, and an apparatus therefor. The bonding cage a of this thermosonic bonder 23 consists of an
5, a transporter 26 that transports the insulating substrate 3, a guide rail 27 that holds the insulating substrate 3 on this I-transporter, and a lead frame during bonding. 2 and a device clamp 28 that presses and fixes the insulating substrate 3 from above, and a semiconductor IC chip.

The tip of the ultrasonic horn 31 is formed by the heater block 29 that is brought into contact with the bottom surface of the stage 1 and the driving device 30 that moves the heater block up and down. :li, that is, the bonding wire 9 is passed through the capillary 8 and subjected to bonding (hole bonding).

Further, the electrical element (semiconductor IC chip) 1 is connected to an insulating substrate 3.
At the same time, it is transported to the bonding stage by the transponder 26, and its position is fixedly held by the device clamp 28 or the like.

During bonding, heat energy necessary for bonding is supplied by bringing heater block 29 into contact with semiconductor TC chip 1 from below. After performing a position correction called alignment, the X-Y stage 24 is operated to move the bonding to a proper position, and the bonding wire 9 attached to the second stage 25 is moved to the semiconductor element (14). 1 (not shown in FIG. 8) (details of the bonding ink will be described later). At this time, sufficient bonding (bonding) strength is obtained by vibration energy supplied from the Z-axis ultrasonic horn 31, thermal energy supplied from the heater block 29, and the like. Next, the stages 24 and 25 are operated in three axial directions, and the bonding head is directly moved to the leet 2 side, where bonding is performed again and then the wire 9 is cut. By repeating these operations, all the bonding at the target locations is completed.

Then, release the fixation by the device clamp 28 etc.,
After the contact with the heater block 29 is released, the lead frame 2 and the insulating substrate 1 are generally taken out from the Honda stage by the transporter 26.

To explain the main manufacturing method of the semiconductor device shown in FIG. 1 described above in FIG. As shown in FIG. 5A, the semiconductor element 1 is inserted into the opening 5 of the insulating substrate 3 using the heater block 29 or the like, and the inner lead portion is formed in the bonding area 20 as described above. 22 and the semiconductor element 1 with a predetermined gap, and each bonding pad 7 on the semiconductor element 1 is located almost directly below the through hole 6 provided at the end 'JW part of each inner lead part 22. Position it accordingly. Next, a gold wire 9 (about 25 mm in diameter) is fed out from the lower end of the bonding capillary 8 of the ball bonding device 23.
As shown in FIG.
(approximately 0 μm) is formed by electrical discharge machining. Then the fifth
As shown in Figure B, the capillary 8 is lowered to a predetermined bonding position (i.e., above the pad of the IC chip),
The ball 10 is gradually crushed as shown in FIG. 5C while being heated to about 300 degrees by the heater stand 29 and under the action of ultrasonic waves.

(16) As a result, the Au pole 10 is filled into the through hole 6, and the gold protruding from the through hole 6 is bonded to the surface of the bonding band 7 by thermocompression, as shown in FIG. 5D. After the connection by pressing the Au ball 10 is completed, in order to connect the next inner lead part, the capillary 8 is moved back and forth or left and right, and at the same time the Au ball 10 is connected to the gold wire 9.
(See Figure 6).

After completing the connection of all the inner lead parts 22 to the semiconductor IC chip by repeating each of the two consecutive operations, the whole is sealed with mold resin 4, thereby completing the semiconductor device shown in FIG.

As is clear from the manufacturing method described above, according to the semiconductor device and its manufacturing method according to the present example, after the through hole 6 is provided in the inner lead portion 22, the capillary 8 used for normal wire bonding etc. A wire ball (gold in this example) 10 is adhered to the through hole 6 to connect the semiconductor element (actually the pad 7) 1 and the inner lead portion 22.
Since it is possible to connect (17), there is no need to use bumps as in the conventional TAB method, and the semiconductor element 1 and the inner lead portion 22 can be easily connected. As a result, the cost required for the bump formation process described above can be reduced.

Further, the above-mentioned connection can be easily made in one operation using the wire ball 10 supplied by the capillary 8 without using the wire bonding method. Therefore, the above-mentioned inconvenience caused by wire bonding can be solved and
It is possible to easily improve the packaging density while taking advantage of the features such as the method.

Furthermore, as described above, since the through hole 6 is provided in the inner lead portion 22, the bonding area of the bonding material (wire ball) 10 during bonding can be increased, and sufficient bonding strength can be ensured. Highly reliable implementation is possible.

10 and 11 show other embodiments of the present invention.

That is, in Fig. 10A, the shape of the through hole is 35 (rectangular (18) shape), and in Fig. 10E1, the shape of the through hole is circular as in the above example, but the diameter is smaller than in the above example. The number of through holes 36 is modified as shown in (in this example, four). Further, the example shown in FIG. 10C is one in which a semicircular notch 7 is provided at the tip of the inner lead portion 22, instead of providing a through hole as in the above-mentioned example.
In the example shown in FIG. 10C, a notch 37 similar to that shown in FIG. 10C is recessed 2 mm laterally at the end of the inner lead portion 22. In the example shown in FIG. 10E, a notch 38 is provided at the end of the inner lead portion 22 so that the width of the inner lead portion 22 becomes narrower toward the tip.

Therefore, it is clear that each of the above-mentioned sides also has the above-mentioned advantages, and the contact area between the bonding material 10 and the inner lead portion 22 can be made larger. Note that FIG. 11 is a sectional view taken along the line XI-XI of FIG. 10D.

FIGS. 12 and 13 show still another example of the present invention, in which, as shown in FIG. The through hole 6 provided in the inner lead part 22 (by applying the bonding material 39 in advance, it is possible to
Guyang bonding (-blanket bonding) can be performed as in the second method.

Therefore, this example also has the same advantages on each side of the duplex and can facilitate bonding automation in the same way as the TAB method.

Fig. 14 is somewhat different from the above-mentioned bonding device,
This is an example using the bonding method and device disclosed in Japanese Patent Application Laid-Open No. 130532/1983 by the present applicant. That is, as shown in the figure, selective heating is performed by irradiating a heating beam such as a laser beam 72 to a predetermined location to be bonded using a predetermined beam irradiation means 73. Incidentally, the same parts as in the example of the double bonding apparatus are given the same reference numerals for convenience of explanation, and it goes without saying that they may be used in combination.

Therefore, by using the above-described bonding method and its device, thermal energy can be supplied locally and in a short time to only a predetermined location (20) in a non-contact manner, and temperature irregularities caused by contact conditions, which are mechanical conditions, can be avoided. Na(naru,
This is very advantageous for the present invention because highly reliable joining can be performed.

15A to 15C are cross-sectional views showing examples in which the semiconductor device according to the present invention is mounted on a printed circuit board or the like.

FIG. 15A shows an example in which the semiconductor device according to the example of FIG. 1 described above is mounted on a glass epoxy board,
This semiconductor device is made of glass epoxy board 5 made of thermosetting resin 51 that is cured in an atmosphere at a temperature of about 170 degrees.
Then, the outer lead portion 21 is supported by the insulating substrate (polyimide substrate) 3, bent inward into a substantially U-shape, and elastically contacted with the solder plating 52 on the pattern 53.

In this state, hot air made of inert gas is supplied to the vicinity of the bonded portion between the outer lead portion 21 and the solder plating 52. As a result, solder reflow is performed and the semiconductor device is mounted as shown in the figure.

Note that solder cream has adhesive properties, so this (21)
) When using the thermosetting resin 51, it is not necessary to use the thermosetting resin 51.

In the above-described mounting example, the outer lead portion 21 is urged against the pattern 53 by the polyimide substrate 3, reinforcing the strength of the outer lead portion, and allowing good flow mounting.

FIG. 158 shows a state in which the semiconductor device of FIG. 1 is mounted on a glass epoxy board in the same way as FIG. 15A described above, but this example differs from the example of FIG. With the semiconductor device turned upside down, the outer lead portion 21 is bent at two places as shown in the figure, and connected to the wiring pattern 53 on the board 50 through the solder plating 52, as in the above example. This is what is being done. This type of implementation is the so-called gullwing type.

FIG. 15C shows another method of mounting a semiconductor device according to the present invention. Note that the same reference numerals are used for the same parts as in the double example.

In this example, as shown in the figure, the second glass substrate 50J (22
) This shows a hem-lead semiconductor device, in which the semiconductor element 1 is connected to a pattern 53 formed on a substrate 50 via an outer lead part 21, and is molded by the same botting as in the example of FIG. 18 described above. It is sealed with resin 63. Therefore, when using the mounting method as in this example, so-called COG (chip on glazing)
A higher-density implementation called ss) is possible.

Although the present invention has been exemplified above, the examples shown in - to j can be further modified based on the technical use of the present invention.

For example, the shape, number, position, etc. of the cutout portions such as through holes in the inner lead portion described above may be set as appropriate, and the bonding material applied to the cutout portions may be other than gold, such as aluminum, etc. It may be solder or copper. When forming balls using aluminum or the like, it is desirable to do so in an inert gas atmosphere to prevent oxidation, and it is desirable to connect the balls by an ultrasonic connection method.

Further, although polyimide resin is used for the insulating substrate formed in the outer lead portion described above, (23) instead of this, a flexible heat-resistant resin or a metal heath may be used. Furthermore, various materials can be used for the other parts.

Furthermore, any suitable double bonding means can be used, and the ambient temperature during bonding may be room temperature, preferably around 220 degrees.

1. Effects of the Invention As described above, the present invention forms a cutout part in an inner lead part and then applies a bonding material to the cutout part using a bonding means having a bonding material supplying part to form a semiconductor element. Since the inner lead portion is connected, there is no need to use a hump or the like as in the conventional TAB method. Therefore, the above connection can be easily made using a bonding means used for ordinary wire bonding, etc., and the cost required for mounting can be reduced.

Further, as described above, since the above-mentioned connection is not performed by wire bonding method or the like, this inconvenience can be eliminated and the packaging density can be improved.

(24) Furthermore, since the inner lead portion is provided with the upper cutout, the bonding area can be increased, and a highly reliable semiconductor device and its manufacturing method that can ensure sufficient bonding strength can be provided. .

[Brief explanation of drawings]

1 to 15 show embodiments of the present invention, and FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention (a cross-sectional view taken along line I-1 in FIG. 2, which will be described later). (However, in this figure, parts such as the bonding material 10 are shown on an enlarged scale.), Fig. 2 is a plan view showing the state before resin sealing in Fig. 1, and Fig. 3 is a plan view showing the state before resin sealing in Fig. 1. Figure 4 is an enlarged perspective view of the main parts showing the state before applying the bonding material, Figure 4 is an enlarged perspective view of the main parts similar to Figure 3 showing the state after applying the bonding material, Figures 5A, 5B, and 5C. , FIG. 5D are cross-sectional views sequentially showing the main steps of the manufacturing method of the semiconductor device shown in FIG. 1, (25) FIG. 6 is an enlarged cross-sectional view of the main part of the semiconductor device shown in FIG. is an enlarged view of the main parts during ball formation, Fig. 8 is a perspective view of the main parts of the thermosonic bonder, Fig. 9 is a schematic side view of the bonder, Figs. 10A, 10B, 10C, and 10D. , 10E are plan views of main parts showing other examples of the present invention, FIG. 11 is a sectional view taken along the line xr-xr of FIG. 10D, and FIG. 12 is a semiconductor device showing still another example of the present invention. FIG. 13 is an enlarged cross-sectional view of the main part showing the state before mounting, FIG. 13 is a cross-sectional view illustrating the process of pre-applying the bonding material to the through hole of the inner reed part in FIG. 12, and FIG. 15A is a cross-sectional view showing a mounting form of the semiconductor device on a printed circuit board according to the example of FIG. 1, and FIG. 15B is a schematic diagram of the main part for explaining the bonding method. (26) is a cross-sectional view showing the mounting form. 16 and 17 show conventional examples. FIG. 16 is a sectional view showing a semiconductor device using a conventional flat pack type package, and FIG. 17 is a sectional view showing a semiconductor device using a conventional TAB method. It is. In addition, in the symbols shown in the drawings, 1... Semiconductor element 2... Lead 3... Insulating substrate 4... ...Mold resin 6.37.38...Through hole or notch 7...Pounding pad 8...
...... Capillary 9.10 ...... Bonding material 20 ...... Bonding area (27) 21 ...... Outer lead portion 22...・・・
. . . Inner lead portion 23 . . . A bonding device.

Claims (1)

[Scope of Claims] 1. It has an outer lead part and an inner lead part to be connected to a semiconductor element, and a cutout part is formed in the inner lead part in a joining area of the semiconductor element and the inner lead part, A semiconductor device, wherein the semiconductor element and the inner lead portion are connected by a bonding material applied to the cut portion. 2. A step of forming an outer lead part and an inner lead part to be connected to the semiconductor element in a predetermined pattern, and supplying a bonding material to the bonding area of the semiconductor element and the inner lead part by a bonding means having a bonding material supplying part. A method for manufacturing a semiconductor device, comprising the step of bonding the semiconductor element and the inner lead portion by using a method.