JPS6043829A - Dry etching method - Google Patents

Dry etching method

Info

Publication number
JPS6043829A
JPS6043829A JP15143683A JP15143683A JPS6043829A JP S6043829 A JPS6043829 A JP S6043829A JP 15143683 A JP15143683 A JP 15143683A JP 15143683 A JP15143683 A JP 15143683A JP S6043829 A JPS6043829 A JP S6043829A
Authority
JP
Japan
Prior art keywords
gas
etching
polysilicon film
film
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15143683A
Other languages
Japanese (ja)
Other versions
JPH0426209B2 (en
Inventor
Tsutomu Tsukada
勉 塚田
Hideki Takahashi
高橋 秀輝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Anelva Corp
Original Assignee
Canon Anelva Corp
Anelva Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Anelva Corp, Anelva Corp filed Critical Canon Anelva Corp
Priority to JP15143683A priority Critical patent/JPS6043829A/en
Publication of JPS6043829A publication Critical patent/JPS6043829A/en
Publication of JPH0426209B2 publication Critical patent/JPH0426209B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Abstract

PURPOSE:To enable to perform an anisotropic etching on a polysilicon film while maintaining a large selectivity ratio against the under layer oxide film and photoresist by a method wherein a dry etching is performed using CCl2F2 gas wherein N2 gas is mixed. CONSTITUTION:A reactive ion etching process is performed on the polysilicon film 201, having a photoresist 204 as an etching mask, located on a silicon oxide film 203 grown on a silicon wafer 202. An etching is performed using the mixture of CCl2F2 gas and N2 gas. Consequently, an anisotropic etching, wherein undercut is not generated at all on the interface 205 of the polysilicon film 201 and the silicon oxide film 203, can be performed. It is desirable that the mixing quantity of N2 gas is set within the range of 5-80% in the flow rate of the total quantity of flow of CCl2F2 gas and N2 gas.

Description

【発明の詳細な説明】 本発明はポリシリコン膜のドライエツチング方法に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for dry etching polysilicon films.

シリコン半導体集積回路の製造,特にMOS型集積回路
の製造においては,ケ゛−1・電極材料としてポリシリ
コン膜を使用している場合が多いので。
In the manufacture of silicon semiconductor integrated circuits, particularly in the manufacture of MOS type integrated circuits, polysilicon film is often used as the electrode material.

ポリシリコン膜のエツチングが非常に重要な技術になっ
ている。
Etching of polysilicon films has become a very important technology.

従来,ポリシリコン膜をドライエツチングする場合,反
応性ガスとしてCF4ガスを主に用いる70ロセスは,
、I?ポリシリコン膜マスク制として使用されるホトレ
ジストの下に大きなアングカノトが入るため,パターン
の微細化が要求される超LSIの・母ターン形成におけ
るポリシリコン膜上,チング工程としては不適であった
Conventionally, when dry etching a polysilicon film, the 70 process mainly uses CF4 gas as the reactive gas.
,I? Because a large angular drop is placed under the photoresist used as a polysilicon film mask system, it is unsuitable for use as a etch process on a polysilicon film in the formation of main turns of ultra-LSIs that require finer patterns.

これに対し,反応性ガスとして塩素を含むガス系の反応
性イオンエツチング技術により,異方性エツチング特性
が得られるようになったが,反応性ガスとして塩素を含
むガス系では、パターン精度の点や、下地の酸化膜に対
する選択比などの点で不十分な点が多かった。例えば2
反応性ガスとしてCC44ガスを主に用いるエツチング
では、ホトレノストに対する選択比が低かったり、下地
の酸化膜上に残渣を残したりしだ。又、CCt3Fガス
を用いるエツチングでは、エツチングの終了後下地に多
くの残渣が残る場合があった。又、 ct2ソtスを含
む系でのエツチングでは、 Ct2ガスの量を七分制御
しないと大きなアンダカットが入る場合がアシ、・工、
チング後にホトレジストが変形する場合も見られた。一
方、CCl2F2がスを用いるエツチングでは、ホトレ
ノストや下地の酸化膜に対する選択比も大きく、エツチ
ング速度も速いため、他のガス系に比較して優れだエツ
チング特性を示すものの、ポリシリコン膜と下地の酸化
膜との間に大きなアンダカットが入ることが観測され、
超LSIにおけるポリシリコン膜のエツチングに使用さ
れる反応性ガスとしては、非常に使い難いことが判明し
た。
On the other hand, reactive ion etching technology using a gas system containing chlorine as a reactive gas has made it possible to obtain anisotropic etching characteristics. There were many deficiencies in terms of selectivity and selectivity to the underlying oxide film. For example 2
Etching that mainly uses CC44 gas as a reactive gas has a low selectivity to photorenost and leaves residue on the underlying oxide film. Furthermore, in etching using CCt3F gas, a large amount of residue may remain on the underlying layer after etching is completed. Also, when etching in a system containing ct2 gas, large undercuts may occur unless the amount of ct2 gas is controlled.
In some cases, the photoresist was deformed after etching. On the other hand, etching using CCl2F2 gas has a high selectivity to photorenost and the underlying oxide film, and the etching rate is fast, so it shows superior etching characteristics compared to other gas systems. A large undercut was observed between the oxide film and
It has been found that it is extremely difficult to use as a reactive gas for etching polysilicon films in VLSIs.

本発明の目的は、 ccz、2p2ガスの優れたエツチ
ング特性を維持し、かつCCt2 F 2 gスで生じ
る特異なアンダカソトを全く生じさせない異方性エツチ
ングを行うことができるドライエツチング方法を提供す
ることにある。
An object of the present invention is to provide a dry etching method capable of performing anisotropic etching that maintains the excellent etching properties of Ccz and 2P2 gases and does not produce any of the peculiar undercaching that occurs with CCt2F2 gases. It is in.

本発明は、 CC42F2ガスにN2ガスを混入したガ
ス系によシトライエツチングを行うことを特徴とし。
The present invention is characterized in that sittri etching is performed using a gas system in which N2 gas is mixed with CC42F2 gas.

本発明による方法を用いることにより、ポリシリコン膜
を、下地の酸化膜やホトレノストに;r=Ji、て大き
な選択比を保ちながら異方性エツチングを行うことがで
きる。
By using the method according to the present invention, it is possible to perform anisotropic etching of a polysilicon film to an underlying oxide film or photorenost while maintaining a large selectivity with r=Ji.

以下2図面を参照して本発明の詳細な説明する。The present invention will be described in detail below with reference to two drawings.

第1図を参照すると、従来による反応性ガスとしてCC
l2F2ガスを用いて反応性イオンエツチング装置によ
シトライエツチング処理゛2施しだ場合のポリシリコン
の断面図が示されている。
Referring to FIG. 1, CC is a conventional reactive gas.
A cross-sectional view of polysilicon is shown after Sitri etching treatment 2 is performed in a reactive ion etching apparatus using 12F2 gas.

第1図において、101はシリコンウェーハ102上に
成長させた厚さ数百Xのシリコン酸化膜103の上に付
着された7r@ l)シリコン膜である。
In FIG. 1, 101 is a 7r@l) silicon film deposited on a silicon oxide film 103 with a thickness of several hundred times, grown on a silicon wafer 102.

この被エツチング膜なるポリシリコン膜101土には、
エツチングマスクとしてホトレジスト104が塗布され
ており1反応性イオンエツチング処理が施される。この
時、第1図に示されるような。
On this polysilicon film 101, which is the film to be etched,
A photoresist 104 is applied as an etching mask, and a reactive ion etching process is performed. At this time, as shown in FIG.

ポリシリコン膜101とシリコン酸化膜103の界面に
大きなアンダカノト105が生じる。このアンダカット
は、CCl2F2ガスの流量に依存し。
A large undercut 105 is generated at the interface between the polysilicon film 101 and the silicon oxide film 103. This undercut depends on the flow rate of CCl2F2 gas.

CCl2F2の流量が少いとアンダカッ):i’i′よ
減少する。
When the flow rate of CCl2F2 is small, the undercapacitance decreases by i'i'.

しかし、 CCl2F2ガスのみによるエツチングでは
However, etching using CCl2F2 gas only.

この特異なアンダカッ)105を防ぐことは出来ない。It is not possible to prevent this peculiar undercut (105).

第2図を参照すると2本発明によるドライエツチング方
法、すなわち反応性ガスとしてCC22F2とN2の混
合ガスを用いて反応性イオンエツチング装置によシトラ
イエツチング処理を施しだ場合のポリシリコンの断面図
の一例が示さ九ている。
Referring to FIG. 2, there is shown a cross-sectional view of polysilicon obtained by the dry etching method according to the present invention, that is, when the dry etching process is performed in a reactive ion etching apparatus using a mixed gas of CC22F2 and N2 as the reactive gas. An example is shown below.

すなわち、第2図には2シリコンウエーハ202上に成
長させたシリコン酸化膜203上の、ホトレノスI−2
04をエツチングマス゛りとしたポリシリコン膜201
に2反応性インオンエツチング処理を施した断面が示さ
れているが2反応性ガスとしてy$ct2F、、ガスに
N2がスを混合したガスによりエツチングすることによ
り’ 、、pす/リコ/Jllzo+とシリコン酸化膜
203の界面205において全くアンダカットの生じな
い異方性エツチングを行うことができた。その上、ポリ
シリコン膜のエツチングが完工する丑での時間の2倍以
上のオーバーエツチングを行なっても、全くアンダカッ
トを生じない断面形状を得ることができだ。
That is, in FIG.
Polysilicon film 201 using 04 as an etching mask
2 shows a cross section that has been subjected to a two-reactive in-on etching process. It was possible to perform anisotropic etching without causing any undercut at the interface 205 between Jllzo+ and the silicon oxide film 203. Moreover, even if over-etching is performed for more than twice the time taken to complete the etching of the polysilicon film, a cross-sectional shape without any undercuts can be obtained.

なお2本発明においても、ポリシリコンの異方性エツチ
ング特性を維持しながら最適エツチングを行なう為には
ガス流量比、エツチング圧力、高周波電力等を適切に設
定する必要がある。
Also in the present invention, in order to perform optimal etching while maintaining the anisotropic etching characteristics of polysilicon, it is necessary to appropriately set the gas flow rate ratio, etching pressure, high frequency power, etc.

例えばN2ガスの混合量が少ない場合は、 CCl2F
2ガスで得られるのと同様のアンダカノトが見られるし
、又、N2ガスの流量が多いと4?リンリコンのエツチ
ング速度が遅くなる。この為N2ガスの混合量を・CC
l2F2ガスとN2ガスとを加えた総流量の流量比で5
%以上ないしは80%以下の範囲に設定するのが望まし
い。
For example, if the amount of N2 gas mixed is small, CCl2F
The same undertones as those obtained with 2 gas can be seen, and when the flow rate of N2 gas is high, 4? The etching speed of Lin Recon becomes slower. For this reason, the mixed amount of N2 gas is
The flow rate ratio of the total flow rate of l2F2 gas and N2 gas is 5.
It is desirable to set it within a range of % or more and 80% or less.

又、エツチング圧力があまシ低すぎるとホトレ−シスト
に対する選択比が低下して、パターンの転写精度が悪く
なる。この為エツチング圧力は4Pa以上に設定するの
が望ましい。発明者等の実験結果では2本発明による最
適エツチング条件は下記に示す値であった。
On the other hand, if the etching pressure is too low, the selectivity to the photoresist will be lowered, resulting in poor pattern transfer accuracy. For this reason, it is desirable to set the etching pressure to 4 Pa or higher. According to the experimental results of the inventors, the optimum etching conditions according to the present invention are as shown below.

CCt2F240SCCM N、2 128CCM エツチング圧力 16Pa エツチングパワー 0.17 W/cm2丑だこの時得
られたポリンリコンのエツチング速度は2000X/m
1n以上であシ、シリコン酸化膜に対する選択比は20
以上、ホトレノストに対しても10以上の値が得られた
。又2本発明を用いることによシ、マスクパターンの幅
を0.1μm以内の差でIリシリコン・ぐターンに転写
出来、さらにオーバーエツチングを長時同行なっても・
母ターン幅が縮少しないため、微細加工のめられる超L
SIの製造プロセス、特に大量生産用のプロセスとして
適用出来る。
CCt2F240SCCM N, 2 128CCM Etching pressure 16Pa Etching power 0.17 W/cm2 The etching speed of polyrecon obtained at this time was 2000X/m
Must be 1n or more, selectivity to silicon oxide film is 20
As mentioned above, a value of 10 or more was also obtained for Photorenost. Furthermore, by using the present invention, it is possible to transfer the width of the mask pattern to the silicon substrate with a difference of less than 0.1 μm, and furthermore, even if over-etching is performed for a long time,
Ultra-L, suitable for micro-machining because the width of the main turn does not shrink.
It can be applied to the SI manufacturing process, especially as a mass production process.

なお、ホトレノストの替わ9に耐エツチング膜を使用し
てもよいし、抜工、チング膜がリン、ヒ素、ボロン等を
ドーグしたポリシリコン膜であってもよいのは言うまで
もない。
It goes without saying that an etching-resistant film may be used for the photorenost 9, and that the etching and etching film may be a polysilicon film doped with phosphorus, arsenic, boron, or the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来による反応性ガスとしてCCt2F2CC
2F2ガスリシリコン膜をエツチングした時の・ぐター
ンの断面図2第2図は本発明による反応性ガスとしてC
C42F2ガスにN2ガスを混合したガスを用いてポリ
シリコン膜をエツチングした時のがターンの断面図であ
る。 ・ 101.201・・・ポリシリコン膜、1.02 。 202・・シリコンウェーッー103,203・・シリ
オ、 コン酸化M 、 104 、204−≠≠)レノスト。 105.205・・・ポリシリコン膜と酸化膜の界面。
Figure 1 shows CCt2F2CC as a conventional reactive gas.
2F2 gas Re-silicon film is etched.
This is a cross-sectional view of a turn when a polysilicon film is etched using a mixture of C42F2 gas and N2 gas.・101.201...Polysilicon film, 1.02. 202...Silicone 103, 203...Silio, Con oxidation M, 104, 204-≠≠) Renost. 105.205... Interface between polysilicon film and oxide film.

Claims (1)

【特許請求の範囲】 j ホトレノスト をマスクした,ポリシリコン膜又はリン、ヒ素。 ボロン等をドーグしたポリシリコン膜からなる被エツチ
ング膜を,導入した応答性ガスに高周波電界を印加して
発生させたプラズマ雰囲気中でドライエツチングする方
法において,上記反応性ガスとしてCCl2F3とN2
の混合ガスを用いることを特徴とするドライエ、チング
方法。 2 上記CCt2F2とN2の混合ガスの〔N2ガスの
流量〕/〔CCt2F2ガスとN2ガスの総流量〕が5
条以上80%以下の範囲にある特許請求の範囲第1項記
載のドライエ、チング方法。 3 上記CCt2F2とN2の混合ガスのエツチング圧
力が4 Pa以上である特許請求の範囲第1項記載のド
ライエツチング方法。
[Claims] j Polysilicon film or phosphorus or arsenic masked with photorenost. In a method of dry etching a film to be etched consisting of a polysilicon film doped with boron or the like in a plasma atmosphere generated by applying a high frequency electric field to an introduced reactive gas, CCl2F3 and N2 are used as the reactive gases.
A drying method characterized by using a mixed gas of 2 The [N2 gas flow rate]/[Total flow rate of CCt2F2 gas and N2 gas] of the above mixed gas of CCt2F2 and N2 is 5.
The drying and etching method according to claim 1, wherein the drying and etching method is in a range of not less than 80%. 3. The dry etching method according to claim 1, wherein the etching pressure of the mixed gas of CCt2F2 and N2 is 4 Pa or more.
JP15143683A 1983-08-19 1983-08-19 Dry etching method Granted JPS6043829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15143683A JPS6043829A (en) 1983-08-19 1983-08-19 Dry etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15143683A JPS6043829A (en) 1983-08-19 1983-08-19 Dry etching method

Publications (2)

Publication Number Publication Date
JPS6043829A true JPS6043829A (en) 1985-03-08
JPH0426209B2 JPH0426209B2 (en) 1992-05-06

Family

ID=15518567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15143683A Granted JPS6043829A (en) 1983-08-19 1983-08-19 Dry etching method

Country Status (1)

Country Link
JP (1) JPS6043829A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6252932A (en) * 1985-08-27 1987-03-07 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Plasma etching
US5545290A (en) * 1987-07-09 1996-08-13 Texas Instruments Incorporated Etching method
US6110838A (en) * 1994-04-29 2000-08-29 Texas Instruments Incorporated Isotropic polysilicon plus nitride stripping

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58100683A (en) * 1981-12-12 1983-06-15 Nippon Telegr & Teleph Corp <Ntt> Plasma etching method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58100683A (en) * 1981-12-12 1983-06-15 Nippon Telegr & Teleph Corp <Ntt> Plasma etching method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6252932A (en) * 1985-08-27 1987-03-07 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Plasma etching
US5545290A (en) * 1987-07-09 1996-08-13 Texas Instruments Incorporated Etching method
US6110838A (en) * 1994-04-29 2000-08-29 Texas Instruments Incorporated Isotropic polysilicon plus nitride stripping

Also Published As

Publication number Publication date
JPH0426209B2 (en) 1992-05-06

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