JPS6040694B2 - Heat treatment method for Group 3-5 compound semiconductors - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a post-ion implantation heat treatment method for ion-implanted m-V group compound semiconductors, and in particular, ion implantation with good electrical and optical reproducibility and uniformity. The purpose is to obtain layers.

Conventionally, ion-implanted m-V group compound semiconductors, such as gallium oxide, require heat treatment at high temperatures in order to sufficiently activate the implanted ions in the substrate.

However, during heat treatment at high temperatures, the semiconductor substrate itself is thermally decomposed. For example, it is said that the temperature at which thermal decomposition of gallium begins is around 600 oo, but heat treatment at this temperature is still insufficient to recover the implantation damage in the ion-implanted layer. It is well known that when gallium borosilicate is heat treated at a high temperature of 800 oo or higher, thermal bits are generated which are thought to be caused by evaporation of borons.
Therefore, silicon dioxide (Si02), silicon nitride (Si3N
4) It has been customary to heat-treat the semiconductor substrate while protecting it with an insulating material such as aluminum nitride (ASON).

However, in the above method, it is expected that a degraded layer will be formed at the interface between the protective film and the semiconductor substrate after heat treatment at high temperature, and furthermore, the protective layer itself will be non-uniform due to pinholes and uneven thickness. This directly affects the non-uniformity of the ion-implanted layer. Furthermore, it is not easy to maintain the protective film deposition apparatus in order to keep the characteristics of the protective film stable at all times. Furthermore, when a protective film is used, cracks often occur in the protective film due to thermal stress. Therefore, a method of heat-treating an ion-implanted substrate without using a protective film has been reported for gallium diode. One method is to prevent the evaporation of arsenic from the ion-implanted gallium substrate by placing a mixture of gallium saturated with boron and gallium boride in a heat treatment furnace, and to perform heat treatment in a hydrogen stream. be. Another method is to embed the ion-implanted sample in powder of graphite and gallium ion saturated with phosphorus and heat-treat it in a hydrogen stream. However, the first method requires a heat treatment furnace with two flat temperature distribution regions, and there is also a problem in the controllability of the abrasive pressure. In the second method, the controllability of the phosphor pressure is also greatly lacking. Therefore, both methods } and 2 have many problems in order to effectively perform heat treatment with good reproducibility. The present invention
In view of the above points, it is an object of the present invention to provide a heat treatment method for an m-V group compound semiconductor that allows heat treatment of an ion implantation layer with good reproducibility and uniformity without using a protective film.

The present invention heat-treats ion-implanted m-V group compound semiconductors without using a protective film, and in particular supplies a mixed gas of a group V hydride and a carrier gas into a heat treatment furnace. , an ion-implanted m-V group compound semiconductor to be heat-treated is arranged in this mixed gas flow, and the pressure of the V group element in the heat treatment furnace is higher than the decomposition pressure of the V group element due to thermal decomposition of the semiconductor. The present invention is characterized in that the group V hydride is supplied in such an amount that the semiconductor is heat-treated in a heat treatment furnace while suppressing thermal decomposition of the semiconductor.

Hereinafter, an example of the heat treatment method for a m-V group compound semiconductor according to the present invention will be explained using the drawings.

In the present invention, as shown in FIG. 1, an electric furnace 2 is disposed outside a furnace core tube 1 made of, for example, quartz, and an inner tube 3 made of quartz is further disposed inside the tube 1. A furnace 4 is provided, and an m-V group compound semiconductor substrate to be heat-treated, for example, an ion-implanted gallium diode semiconductor substrate 5 is placed in the furnace 4.

For example, as shown in FIG. 2, the semiconductor substrate 5 is placed with its ion-implanted surface 5a facing downward so as to be in contact with a quartz plate 6. On the other hand, the heat treatment furnace 4 includes a carrier gas supply means 16 for supplying a carrier gas such as hydrogen gas, nitrogen gas, or argon gas; That is, in this example, an arsine supply cylinder 7 for supplying arcine ($3), which is a hydride of phosphorus (for example, gas diluted to 2% with hydrogen), is communicated through conduits 8 and 9, respectively. Each carrier supply means 16 and arsine supply cylinder 7 are provided with a stop valve 10 and a flow meter 11, respectively, so that the amount of supply into the furnace 4 can be adjusted by these. Then, a mixed gas of arsine 12 and carrier gas 13 is supplied into the furnace 4, and the semiconductor substrate 5 is placed in this mixed gas flow. The heat treatment is performed by supplying an amount of arsine 12 such that the partial pressure of arsine satisfies the above conditions. Note that 15 is a circle iron-bonded to a part of the core tube 1. In this way, when the partial pressure of arsine in the furnace 4 is maintained at, for example, 3.3 x 10-3 atmospheres, the ion-implanted surface 5 of the substrate 5 can be reduced to 95 mm.
It becomes possible to heat-treat without deteriorating the surface condition of a at all.

It is said that the decomposition pressure of phosphorus from the substrate 4 is higher when the substrate 4 is damaged by ion implantation or the like than when it is not damaged.

Therefore, the partial pressure of arsine in the furnace 4 can be appropriately adjusted to meet the above conditions by controlling the supply amount of arsine 12 according to the substrate 5 to be heat treated.

In addition, if the flow rate of gas in the fin groove is slowed down, arsine 12
As the partial pressure increases, it is possible to reduce arsine by that amount, but if the flow rate is reduced too much, arsine will be precipitated in the low-temperature region, so it is necessary to supply the arsine at an appropriate flow rate. FIG. 5 shows a sample in which silicon (Si) is implanted into a gallium oxide semiconductor substrate at an energy of 13 eV at room temperature.
Flow 200cc/min of Arsine for 1 night/min.

This corresponds to a partial pressure of arsine in the furnace 4 of 3.3×10 −3 atmospheres. ) is a characteristic diagram showing the planar carrier concentration and ease of laying after heat treatment at 900° C. for 18 minutes. In the figure, curve 1 is the surface carrier concentration, and curve n' is the ease of spreading.

In addition, FIG. 6 shows a sample in which sulfur S is implanted into a gallium oxide semiconductor substrate at an energy of 15 eV at room temperature.
FIG. 2 is a characteristic diagram showing the planar carrier concentration and mobility after heat treatment at 900 pm for 15 minutes using arsine flow rate of 80 cc/min and arsine flow rate of 80 cc/min. In the figure, the curve m is the surface carrier concentration, and the curve W is the mobility. Mobility is proportional to crystallinity recovery. As is clear from FIGS. 5 and 6, the heat treatment method of the present invention provides characteristics equivalent to or better than the conventional method using a protective film. Further, as a method of placing the semiconductor substrate 5 in the furnace 4, for example, as shown in FIG. If the ion-implanted gallium diode substrate 5 serving as a sample is placed on top with the implanted surface 5a facing downward, it is possible to further increase the mobility. In this case, if the mirror surface 14a side of the substrate 14 is under the same conditions as the ion-implanted surface 5a of the substrate 5, which is the sample, the vapor pressures of borium on both substrates 5 and 14 will be the same, so the ion implantation from the substrate 5 will be evaporation is effectively suppressed. And, to give an example,
1×1 and 3 ions/S on a gallium oxide semiconductor substrate
R ions were implanted and the heat treatment furnace 4 of FIG.
In the case of the sample heat-treated at oo for 15 minutes and placed directly on the quartz plate 6 shown in FIG. 2, the planar carrier concentration ns=4.
1×1 and 2 skin-2, mobility r=2800/V・sec
However, in the case of FIG. 3, in which the gallium silica substrate 14 is arranged, ns=4.1×1 and 2-2, and the peak=3.
It was possible to achieve a voltage of 100/V·sec. FIG. 4 shows another example of how to place the semiconductor substrate 5 in the furnace 4.

In this method, a recess 6A is formed in the quartz plate 6, and a plurality of substrates 5 each having ions implanted under the same conditions are placed in the recess 6A, with the ion-implanted surfaces 5a facing each other. Arrange in a stack. The plurality of substrates 5 may be stacked vertically or at an angle. With this arrangement, since the surfaces of the substrates 5 under the same conditions are in contact with each other, evaporation of phosphorus from the substrates 5 can be suppressed as in the case of FIG. 3, and a good heat treatment can be performed on multiple substrates at the same time. It becomes possible. 7th
The figure shows 1×1 and 3 ions per gallium semiconductor substrate.
The enemy Si ions were implanted (implantation conditions were 130KeV,
room temperature) samples were subjected to the heat treatment method of the present invention (800 x 0, 15
It is a distribution characteristic diagram of the carrier concentration in the depth direction, showing the uniformity of the ion-implanted layer after being heat-treated for 30 minutes.

In curve V, the characteristic curves of the three samples overlap, and almost no non-uniformity among the samples is observed. Although the above example describes heat treatment for a gallium oxide semiconductor substrate, it can also be applied to heat treatment for m-V group compound semiconductors such as gallium phosphide (Gap) semiconductor substrates or indium organic (lnP) semiconductor substrates. .

For example, in the case of a semiconductor substrate made of gallium scale or indium, phosphine (P ratio) can be used as the hydride of the group V element. According to the present invention described above, since a protective film is not used during heat treatment of an ion-implanted m-V group compound semiconductor, the heat treatment process can be simplified.

Moreover, the lack of reproducibility and uniformity caused by the protective film can be improved. Further, by obtaining the partial pressure of the V group element using heat treatment of the V group hydride, the partial pressure can be easily and reliably controlled. Furthermore, there are practical advantages such as the need for a device for depositing a protective film and the thermal treatment device being extremely simplified.

[Brief explanation of the drawing]

Figure 1 is a layout diagram of the heat treatment furnace used in the present invention, Figures 2 to 4 are diagrams showing examples of how to arrange semiconductor substrates to be heat treated, and Figure 5 is a diagram showing silicon ions in gallium oxide. Figure 6 shows the relationship between surface carrier concentration and ease of laying when the implanted sample is heat treated using the heat treatment method according to the present invention. A characteristic diagram of plane carrier concentration and mobility, FIG. 7 is a carrier concentration distribution diagram when the heat treatment method of the present invention is used. Reference numeral 4 designates a heat treatment furnace of a tube type, 5 a m-V group compound semiconductor to be heat treated, 6 a quartz plate, 16 a carrier gas supply means, and 7 a cylinder of V group hydride. Figure 2 Figure 3 Figure 4 Figure 1 Figure 5 Figure 6 Figure 7

Claims (1)

[Claims] 1. A method for heat treatment of a III-V compound semiconductor, comprising a step of implanting ions into the surface of a group III-V compound semiconductor substrate, and a step of heat-treating the substrate in an atmosphere of a group V hydride and a carrier gas. .