JPS6038998A - Transmission method of digital color video signal - Google Patents

Abstract

PURPOSE:To transmit burst information with a minimum data amount by sampling a burst signal at least for three points at a prescribed sampling interval, obtaining a phase difference of a sampling pulse to a burst wave, converting the difference into a digital data and transmitting the converted result together with a digital color video signal. CONSTITUTION:A composite color video signal of the NTSC system is fed to a sample and hold circuit 4 and a burst gate 2 from an input terminal 1. A burst signal extracted by the burst gate 2 is fed to a clock generating circuit 3. The composite color video signal fed from the input terminal 1 is sampled and held by a 4fsc clock at the sample and hold circuit 4, the result is fed to an A/D converter 5 and digitized. A phase data is formed from the burst signal data from a burst phase data forming circuit 6 inputted from the A/D converter 5 in which the video signal is digitized, and the said phase data is fed to a recording processor 7.

Description

Detailed Description of the Invention "Field of Industrial Application" The present invention relates to a digital color video signal transmission method applied when recording a digital color video signal on an optical digital disk, in particular a burst signal transmission method. Regarding the method.

"Background technology and its problems" For example, when an NTSC composite color video signal is
When digitizing and transmitting at a sampling frequency of fsc (fsc: color subcarrier frequency), I
H (1 horizontal section) is 910 samples, of which 760 samples are screen data, 32 samples are burst signal data (8 waves), and the remaining 118 samples are synchronization signal data. Ru. This 76
Considering that other data such as redundant bits for error correction are allocated to the portion other than 0 samples, it is desirable that the burst signal be transmitted using as few bits as possible.

``Object of the Invention'' The object of the present invention is to provide a method of transmitting a digital color video signal that can transmit burst information with a minimum amount of data.

However, this invention can transmit burst information even when digitized with an arbitrary sampling phase.
However, the circuit configuration required to reproduce the burst signal on the playback side can be simplified.

"Summary of the Invention" The present invention digitizes a video period of a color video signal to form a digital color video signal, and
By sampling the burst signal in the color video signal at at least three points at a predetermined sampling interval and digitally calculating the sampling output, the phase difference between the sampling pulse and the burst wave can be calculated. This is a method of transmitting a digital color video signal, which is characterized by converting a phase difference into digital data and transmitting the digital data together with the digital color video signal.

Embodiment In an embodiment of the present invention, the sampling frequency is 4 fs.
It is a system that digitizes NTSC color video signals using C. First, a burst signal transmission method will be explained with reference to FIG.

In FIG. 1, the burst signal SB of frequency fsc is
This shows how the signal is sampled using the fsc sampling pulse, and HD is a horizontal synchronization signal.

The burst signal SB has 8 cycles or 9 cycles within each horizontal interval.
The cycles are included, and their amplitudes are specified so that the first cycle is small and the second and subsequent cycles are normal. Therefore, detection of burst phase information, which will be described later, needs to be performed from the second onward. However, in FIG. 1, for simplicity, it is assumed that the burst signal SB has a normal amplitude from the first cycle, and the burst phase information is detected in this one cycle.

A transmission method of the present invention for transmitting burst information as phase difference information with respect to a sampling pulse will be described. In Figure 1, L+, L2, La +"'+
Ll, ·, Ln indicate the sampling value of the burst signal SB sampled with a sampling pulse of frequency 4 fsc, and At l Az l A3 + −+
Ai+.=+ An indicates the amplitude at each sample point.

Assuming that the burst signal SB is a sine wave, the DC level (Lp) of the pedestal level burst wave is expressed as follows. Since the amplitude AI at each sample point is the difference between each sampling value L1 and the pedestal level Lp, it is expressed as Ai=Li-Lp...■. If the maximum amplitude of the burst signal is A, then
Burst signal amplitude A+, A2, A3, A4,
A5 is A + Go A sin θ...■ A2 = A sin (θ"-90°) = A c
osθ, ■A3 = A sin (θ + 1
8 0°) = Asinθ ■A4 = Asin(θ-
1-2 7 0°) = Acosθ ・ ■As”A
Since it can be expressed as sinθ ・・−− ■, it is always A2i + A2i. 4==A2(sin”θ+co
s2θ) = A2. , , , , , , ■ holds true. For example, the phase information P of AI is expressed as . ■Formula, θ==sin-'P ......[Phase] To remove the absolute value, when A1≧0, A2 >O, O0≦θ〈90° ・
・■A+ >0, when A2≦0, 9 0'≦θ〈18
0°...■A】≦0, when A2<0, 1800≦θ〈
270° [Phase] A+ <0, A2 ≧o (7) When 2700≦θ< :3 6 oo- (g) [Phase] ~
θ (phase difference with respect to the burst signal) is determined by Equation 0, and θ between and is taken as phase data. As described above, when the sampling frequency is 4 fsc, the phase data θ is uniquely determined if there are three consecutive samples of the burst signal.

”The second series of recording side circuits to which this invention is applied
This will be explained with reference to the figures. In FIG. 2, reference numeral 1 indicates an input terminal, from which an NTSC composite color video signal is supplied to a sample hold circuit 4 and a burst gate 2. The burst signal extracted by the burst gate 2 is supplied to the clock generation circuit 3. The clock generating circuit 3 is a circuit that generates a clock having a sampling frequency of 4 fsc from the burst signal, and the clock having a sampling frequency of 4 fsc generated by the clock generating circuit 3 is supplied to the sample hold circuit 4. In the sample and hold circuit 4, a composite color video signal supplied from the input terminal 1 is sampled and held using a clock of 4 fsc.

The composite color video signal sampled by this 4 fsc clock is supplied to the A/D converter 5 and digitized. Among the composite color video signals digitized by the A/D converter 5, burst signal data is supplied to a burst phase data forming circuit 6, which will be described later. Phase data is formed from the burst signal data by the burst phase data forming circuit 6, and this phase data is supplied to the recording processor 7.

The recording processor 7 performs processing such as error correction encoding, addition of frame data, field data, line data, and burst signal phase data to the color video data of the video period, and a digital recording signal is taken out at the output terminal 8. .

This digital recording signal is directly or once recorded on a magnetic tape, and then supplied to an optical digital disk cutting device and recorded on a master disk. This master disk color optical digital video disk is duplicated.

The above burst phase data forming circuit 6 will be explained with reference to FIG. In FIG. 3, reference numeral 11 indicates an input terminal of the burst phase data forming circuit 6, and sampling data (Lo, Ll, L2.-, Li.

Ln) is supplied to the delay circuit 12 and the adder circuit 14, and the output of the delay circuit 12 is supplied to the delay circuit 13. still,
Sampling data from input terminal 11 and delay circuit 1
The sampling data passed through 2 and 13 is supplied to an adder circuit 14. The delay circuits 12 and 13 each delay data by one sample period, and in the case of a sampling frequency of 4 fsc, one sample period corresponds to a 90° phase of the burst signal. Therefore, the burst signal is canceled and does not appear at the output of the adder circuit 14. The output of this adder circuit 14 is a multiplier circuit 1 whose coefficient is 1/2.
5, and pedestal level data Lp is obtained at the output of this multiplier circuit 15. This pedestal level data Lp is supplied to the launch 16.

FIG. 4A shows the burst signal section of the digital color video signal supplied to the input terminal 11, and the fourth
Figure B shows this delayed by delay circuits 12.13. The launch 16 is supplied with a launch pulse force h from the child 24 at the timing shown in FIG. 4C, and pedestal level data Lp is launched into the latch 16 as shown in the fourth diagram.

The pedestal level data Lp from the latch 16 and the output of the delay circuit 13 (FIG. 4B) are supplied to the subtraction circuit 17. In the subtraction circuit 17, pedestal level data Lp is subtracted from the sampling data L1 of the burst signal.

By this subtraction circuit 1T, the amplitude data A at each sample point is
1 is formed. The amplitude take Ai from the subtraction circuit 17 is supplied to a delay circuit 18 , the output of the delay circuit 18 is supplied to a delay circuit 19 and a latch 20 , and the output of the delay circuit 19 is supplied to a latch 21 .

A common latch pulse is supplied to the latches 20, 21 from the terminal 25. 4E shows the output of the delay circuit 18, FIG. 4F shows the output of the delay circuit 19, and FIG. 4G shows the launch pulse. By this latch pulse, Shiratsuchi 20
The amplitude take A2 is latched, and the latch 21
Amplitude data AI is launched in , and this amplitude data A1
and A2 are used as address inputs of the ROM 22.

Amplitude data A+ and A2 are for 8 pitches I.
The 6 bits excluding the 2 bits in the negative position of each bit are supplied to the ROM 22. If the amplitude of the burst signal is within the 8-bit quantization level range (0 to 255) and is included in the low level range, the lower 6 bits can also be used as two consecutive bits to sign the throne of these 6 bits. Since something equivalent to the bit remains, no problem will occur. ROM22 is
Four tables corresponding to the four cases of equations 0 to ■ mentioned above are written, and the table is selected according to the polarity of the amplitude data A+ and A2, and 8-bit phase data θ is output to the output terminal 23. Read out.

Since the phase take θ is 8 bits, there are (28 = 256) possible phase data, and 360
Phase data in which the angular range of ° is divided into 256 parts (approximately 1.4 °
steps) are formed. Although an error occurs because the step is not 1°, the adverse effects such as hue shift due to an error of this degree do not actually cause a problem.

A reproduction side circuit to which the present invention is applied will be explained with reference to FIG. In FIG. 5, reference numeral 31 indicates an input terminal, and the digital color video signal recorded as described above is reproduced from the optical disc and supplied from the input terminal 31 to the reproduction processor 32. The reproduction processor 32 performs time axis correction, error correction, etc., and the output of the reproduction processor 32 is supplied to the latch 33 and the delay circuit 3T. A latch pulse is supplied to the latch 33 from a terminal 38, and phase take 0 is latched every IH (one horizontal interval).

The reproduction prosensor 32 interpolates not only color video data but also phase data. Since the shunted phase data θ is inserted for each IH, even if phase data is missing due to dropout or the like, interpolation can be performed using the phase data located before and after.

The output of the latch 33 is used as the address input of the ROM 35 via the delay circuit 34. The address of the lower two bits of the ROM 35 is 0.1°2.3. with a cycle of 1/4fsc. This makes it possible to avoid repeated reading of takes having phase differences of 90°, 180°, and 2700 with respect to the phase data θ. In ROM 35,
As a result, phase information for one wave is taken P+, P2.
P3. P4 is read. The burst signal data read from the ROM 35 is supplied to one input terminal 40A of the switch circuit 39 via the delay circuit 36. The delay circuit 3 is connected to the other input terminal 40B of the switch circuit 39.
7, a reproduced digital color video signal is supplied.

The switch circuit 39 is for adding burst data to the reproduced digital color video output signal, and selects the output of the delay circuit 36 during the period of the burst signal.

The ROM 35 stores 256 takes (value of sin θ) of 1 and 4° steps corresponding to the 8-bit phase take θ. Also, for each of these 256 types of data, (θ+90°).

The values of (θ+180°) and (θ+270°) are also written. In order to distinguish between the four types of takes including θ, a 2-bit lower address that changes at a cycle of 1/4 fsc is supplied to the ROM 35. The data corresponding to the value 0 at the address 00 of this lower 2 bits is read out, and when the address is 1, (θ+90°)
When the address is 2, the data corresponding to the value of (θ+180°) is read, and when the address is 3, the data corresponding to the value of (θ+270°) is read. be done.

Considering a burst signal SB as shown in FIG. 6A,
When the address input for the phase take θ is input, the lower 2 bits of the address are first set to θ, and the take P+ is input to the ROM.
35. After the next 1/4 fsc, the lower 2 bits of the address are set to 1, and data P2 is transferred to the ROM.
35. Thereafter, the address of the lower two bits is sequentially changed to 2 and 3, and data P3 and P4 are read from the ROM 35. This data, PI, P2. P
3. P4 constitutes one wave of the burst signal, and by repeating this read operation eight times, eight waves of burst signal data can be generated.

is read from the ROM 35 by the switch circuit 39,
The burst signal data passed through the delay circuit 36 is combined with the digital color video signal, and the burst signal data is sent to the switch circuit 4.
1 is supplied to one input terminal 42A of 1. The other input terminal 42B of the switch circuit 41 is supplied with an 8-bit digital signal corresponding to the sync level from the sync level generating circuit 43. The switch circuit 41 is controlled by a switching pulse (not shown) to select the input terminal 42B during the synchronization signal period.

At the output of the switch circuit 41, a digital composite video signal containing burst signal data and synchronization signal data appears. The output of this switch circuit 41 is supplied to a D/A converter 44, and an analog composite 1-color video signal is obtained at an output terminal 45. Note that the addition of the synchronization signal may be performed by analog processing on the output side of the D/A converter 44.

"Application example" In this example, the phase information of the amplitude A1 is determined as shown in the above equation 0, but from the above equation It's okay. In this case, ROM 2
2, tables corresponding to the four cases of the 0 to 0 expressions described above are not required.

In this invention, only the phase data θ is transmitted as burst signal information, but information on the maximum amplitude A may also be transmitted, in which case a more faithful burst wave will be transmitted. be able to.

[-Effects of the Invention] According to the present invention, burst signal information can be transmitted using the minimum amount of data (8 bits per sample) from sampling values at three consecutive points, so redundant bits of the error correction code can be transmitted. You can increase the space that can be allocated, etc. Further, according to the present invention, burst signal data can be transmitted without being influenced by the sampling phase. Furthermore, the structure for reproducing the burst signal from the phase data can be a simple structure using a ROM.

[Brief explanation of drawings]

Fig. 1 is a waveform diagram used to explain an embodiment of the present invention, Fig. 2 is a block diagram of an example of a recording side circuit to which this invention can be applied, and Fig. 3 is a part of the recording side circuit. A block diagram of the phase data forming circuit, FIG. 4 is a time chart used to explain the phase data forming circuit, FIG. 5 is a block diagram of an example of a reproducing side circuit to which the present invention can be applied, and FIG. 6 is a block diagram of an example of a reproducing side circuit. FIG. 2 is a waveform diagram and a time chart used for explaining the circuit. FIG. 6 Phase data formation circuit, 22.35 ROM 0 Agent Masaru Sugiura Tomochi Figure 3 IIXII = [ Figure 5 j / Figure 6

Claims (1)

[Claims] Digitizing the video period of the color video signal to form a digital color video signal, sampling the burst signal in the color video signal at at least three points at a predetermined sampling interval, and digitally calculating these sample outputs. A method for transmitting a digital color video signal, comprising determining a phase difference with respect to a sampling pulse burst wave, converting this phase difference into digital data, and transmitting the digital data together with the digital color video signal. Method.