JPS6034827B2 - Gallium phosphide light emitting device - Google Patents

Gallium phosphide light emitting device

Info

Publication number
JPS6034827B2
JPS6034827B2 JP52076140A JP7614077A JPS6034827B2 JP S6034827 B2 JPS6034827 B2 JP S6034827B2 JP 52076140 A JP52076140 A JP 52076140A JP 7614077 A JP7614077 A JP 7614077A JP S6034827 B2 JPS6034827 B2 JP S6034827B2
Authority
JP
Japan
Prior art keywords
film
light emitting
electrode
emitting device
gallium phosphide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52076140A
Other languages
Japanese (ja)
Other versions
JPS5411689A (en
Inventor
修朗 安田
昭信 笠見
吉康 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP52076140A priority Critical patent/JPS6034827B2/en
Publication of JPS5411689A publication Critical patent/JPS5411689A/en
Publication of JPS6034827B2 publication Critical patent/JPS6034827B2/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12036PN diode

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Description

【発明の詳細な説明】 本発明は化合半導体の一つであるリン化ガリウムからな
る発光素子及び製造方法に係り、特に電極の構成を改良
したリン化ガリウム発光素子及びその製造方法に関する
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a light emitting device made of gallium phosphide, which is one of compound semiconductors, and a manufacturing method thereof, and more particularly to a gallium phosphide light emitting device with an improved electrode structure and a manufacturing method thereof.

化合物半導体のうちリン化ガリウム(Gap)は、発光
ダイオードとして多く使用されている。
Among compound semiconductors, gallium phosphide (Gap) is often used in light emitting diodes.

そしてこのGaP発光ダイオードは、赤色〜緑色発光ま
で不純物の添加によって自由に得られるため注目されて
いる。例えばこの構成は第1図に示すようになっている
。即ちn型GaP基板1 1上にp型Gap層12を設
けてp−n接合13を構成したべレツトの両面に電極1
1a,12aを設け、n型Gap基板11側を下にして
導電性ペースト15を介してへツダ14にマウントした
ものである。なおへツダ14には電極取り出し用端子1
1c,12cが取り出されており、p型Gap層の電極
12aからリード線12bにより端子12cに取りつけ
られている。当然乍らn型GaP層基板の電極11aと
端子12cは電気的に接続されている。またへツダ14
の上部はェポキシ樹脂16でおおわれている。ところで
、第1図の構成でp型Gap層への電極12aにとって
■p型GaP層とオーミック接触し、その姿触抵抗は小
さい程よい。
This GaP light emitting diode is attracting attention because it can freely emit red to green light by adding impurities. For example, this configuration is shown in FIG. That is, a p-type gap layer 12 is provided on an n-type GaP substrate 11 to form a p-n junction 13, and electrodes 1 are provided on both sides of the beret.
1a and 12a are provided and mounted on a header 14 via a conductive paste 15 with the n-type gap substrate 11 side facing down. In addition, there is a terminal 1 for taking out the electrode on the bottom 14.
1c and 12c are taken out and attached to the terminal 12c by a lead wire 12b from the electrode 12a of the p-type Gap layer. Naturally, the electrode 11a and the terminal 12c of the n-type GaP layer substrate are electrically connected. Matahetsuda 14
The upper part of is covered with epoxy resin 16. By the way, in the configuration of FIG. 1, the electrode 12a to the p-type Gap layer is in ohmic contact with the p-type GaP layer, and the smaller the contact resistance is, the better.

■リード線12bが容易にボンディング出来る。■発光
効率を減少させてはならない。■発光効率を向上させる
p−n後合13面の処理工程の強酸エッチング液に耐え
ねばならない。■電極膜の微細加工エッチングが可能等
の性能が要求される。これらすべての条件を満足する金
属膜は見出されておらず、上記の内1つか2つの条件に
不満足乍ら製作しているのが実状である。
- Lead wire 12b can be easily bonded. ■Do not reduce luminous efficiency. (2) Must be able to withstand strong acid etching solution used in the treatment process for the 13th surface after p-n to improve luminous efficiency. ■Performance such as the ability to perform fine etching of electrode films is required. No metal film has been found that satisfies all of these conditions, and the reality is that metal films are manufactured that are unsatisfactory with one or two of the above conditions.

即ち、■を満足する金属としてAuを主体とした1〜2
Wt%の技又はZnの合金膜が知られている。しかしこ
の金膜‘ま■ま満足するが■,■を満足せず■‘ま条件
により可能である。この理由を説明するために、電極膜
形成からべレット形式迄のプロセスを第2図a〜eに示
す。この第2図でn型Gがゥェハー21にn型にap層
22、p型GaP層23を形成してn型GaPウェハ−
21面に電極面24を形成させた基板を用意する。
That is, 1 to 2 mainly composed of Au as a metal that satisfies (■).
Wt% technology or Zn alloy film is known. However, it is possible under the conditions that this gold film satisfies ■, but does not satisfy ■ and ■. In order to explain this reason, the process from electrode film formation to pellet format is shown in FIGS. 2a to 2e. In FIG. 2, an n-type GaP layer 22 and a p-type GaP layer 23 are formed on a wafer 21 to form an n-type GaP wafer.
A substrate having an electrode surface 24 formed on its surface 21 is prepared.

そしてp型Gap層23上に上述のAu−Be又はAu
−Zn合金膜24を真空蒸着法により形成する(第2図
a)。次にホトレジストを使用して、両面電極膜24,
25をケミカルエッチングにより微細加工する。そして
、ホトレジストを除去し、不活性ガス雰囲気中で、50
00010分位加熱し各々の電極膜をp型GaP層23
及びn型Gapウェハー21とオーミック接触ならしめ
る(第2図b)。次いで所定寸法にダイシングスクラィ
ビング法等でべレツトに加工分離する(第2図c)。こ
の時機械加工のため発光部となるp−n接合側面が破砕
され、発光効率が劣化する。これを回復させるにその破
砕層をエッチングで除去しなければならない。又、その
エッチングも、電極以外に露出したGaP面全面が平滑
ではなく、凹凸のついた粗面に仕上るのが望ましい。こ
の両者を満足するエッチング液は塩酸及び硫酸の加熱液
である。この処理により第2図dのような発光素子べレ
ツトが出来上る。この後は前述の如くTo−べツダ26
に導電性ペースト27で、n型GaP層側の電極24を
接着固定し、P側電極25には金線ワイヤ‐28をボン
ディグする(第2図e)。以上が通常のプロセスである
が、この場合上述の欠点が発生する。
Then, on the p-type gap layer 23, the above-mentioned Au-Be or Au
- A Zn alloy film 24 is formed by vacuum evaporation (FIG. 2a). Next, using photoresist, the double-sided electrode film 24,
25 is finely processed by chemical etching. Then, the photoresist was removed, and the
Each electrode film is heated for about 00010 minutes to form a p-type GaP layer 23.
And make ohmic contact with the n-type Gap wafer 21 (FIG. 2b). Next, it is processed and separated into pellets of predetermined dimensions using a dicing, scribing method, etc. (FIG. 2c). At this time, due to machining, the side surface of the p-n junction, which becomes the light emitting part, is crushed and the light emitting efficiency deteriorates. To restore this, the fractured layer must be removed by etching. Also, in the etching, it is desirable that the entire exposed GaP surface other than the electrodes be finished in a rough surface with unevenness rather than a smooth surface. An etching solution that satisfies both of these requirements is a heated solution of hydrochloric acid and sulfuric acid. Through this process, a light emitting device pellet as shown in FIG. 2d is completed. After this, as mentioned above, To-Betsuda 26
Then, the electrode 24 on the n-type GaP layer side is adhesively fixed with a conductive paste 27, and the gold wire 28 is bonded to the P-side electrode 25 (FIG. 2e). Although the above is a normal process, the above-mentioned disadvantages occur in this case.

即ち、p型Gap層の面のAu民又はAuZn合金膜を
加熱処理によりオーミック接触になるのは確実であり知
られているが、逆に加熱処理により電極膜表面上にGa
及びPイオンが膜を浸透して堆積し、Be又はZn元素
の酸化も重なってGa−P−Be(一Zu)−○の複雑
な酸化膜が形成される。この結果、ボンディングの付き
具合が極めて悪くなり、まったくボンディング不能とい
うべレットも発生する時もあるが、通常は1回のボンデ
ィングでは成功せず4〜5回ボンディング操作を行ない
、表面の酸化膜を削り落す様にすると初めてボンディン
グ出来る様になる。それに加えてGa元素のAuへの拡
散係数が大きいため、電極膜面上に多く堆積してしまう
。このためGaP結晶自体のGaの減少がはげしく結晶
不製となり、発光効率が理論値より低下してしまう。さ
らにA船eのような特殊な合金の場合、微細加工が難し
く、また均一にエッチングすることが難しいため、ベレ
ツト収得率が減少する。逆に例えばエッチング時間を長
くし残留膜をなくそうとすると、エッチングの遠い部分
が良好な膜をオーバーエッチングしてしまい、使用でき
ないもを得てしまう。なおAuを主体とする合金膜は、
フロスト効果をもたせるために用いる強酸に対し耐える
ものであるという利点を有している。
That is, it is certain that ohmic contact can be made by heat treatment of the Au layer or AuZn alloy film on the surface of the p-type gap layer, but conversely, heat treatment can also cause Ga on the surface of the electrode film.
and P ions permeate the film and are deposited, and the oxidation of Be or Zn elements also overlaps, forming a complex oxide film of Ga--P--Be(-Zu)--. As a result, the adhesion of the bond becomes extremely poor, and in some cases, the bonding is not possible at all, but usually one bonding is not successful and the bonding operation is repeated 4 to 5 times to remove the oxide film on the surface. Once you scrape it off, you will be able to bond for the first time. In addition, since the diffusion coefficient of Ga element into Au is large, a large amount of Ga element is deposited on the electrode film surface. For this reason, the amount of Ga in the GaP crystal itself is drastically reduced, resulting in failure of the crystal, and the luminous efficiency is lower than the theoretical value. Furthermore, in the case of a special alloy like Ship A e, it is difficult to microfabricate and uniformly etch, resulting in a decrease in beret yield. On the other hand, if an attempt is made to eliminate the residual film by elongating the etching time, for example, a good film will be over-etched in a far-etched area, resulting in an unusable product. Note that the alloy film mainly composed of Au is
It has the advantage of being resistant to the strong acids used to create the frost effect.

そこで本発明は上述した問題を解決し、また強酸に対し
耐久性のあるものを用い、新規な電極構造のGap発光
素子及びその製造方法を提供するものである。
Therefore, the present invention solves the above-mentioned problems and provides a Gap light-emitting element with a novel electrode structure using a material that is resistant to strong acids and a method for manufacturing the same.

以下第3図a〜dを参照してこの発明の一実施例を説明
する。
An embodiment of the present invention will be described below with reference to FIGS. 3a to 3d.

まず第3図aはp−n接合をするGaP基板のn型Ga
pウェハー21面に微細加工を施したn型GaPゥェハ
ーの電極膜31が付着された状態である。
First, Figure 3a shows the n-type Ga of the GaP substrate that forms the p-n junction.
This is a state in which an electrode film 31 of a microfabricated n-type GaP wafer is attached to the surface of the p-wafer 21.

そのp型Gap層面には第3図bの如く、金属マスク3
2を置き、真空中で例えばスパッタリングを施して三層
の電極膜をマスク32の形状に従って形成する。この三
層は金一ベリリウム(Au−茂)合金膜33、タンタル
(Ta)膜34、金(Au)膜35の順に連続して堆積
させ、膜厚は夫々Au一茂膜が0.05〜0.1ムm、
Ta膜が0.2〜0.4山m,Au膜が0.2〜1山m
である。次いで、その真空装置内又は別の加熱炉で50
0午010分間加熱処理を行い、その後の工程は前述の
第2図cと同一である。このマスクによる三層膜の形成
により前述の欠点はすべて除去される。
As shown in FIG. 3b, a metal mask 3 is placed on the p-type Gap layer surface.
2 is placed, and a three-layer electrode film is formed according to the shape of the mask 32 by, for example, sputtering in a vacuum. These three layers are successively deposited in the order of gold-beryllium (Au-Mo) alloy film 33, tantalum (Ta) film 34, and gold (Au) film 35. .1mm,
Ta film: 0.2 to 0.4 m, Au film: 0.2 to 1 m
It is. Then, 50 min.
Heat treatment was performed for 10:00 and 10 minutes, and the subsequent steps were the same as those in FIG. 2c described above. Formation of a three-layer film using this mask eliminates all of the above-mentioned drawbacks.

即ち、Au−茂合金膜の様なエッチングの難かしい合金
膜に対しマスクに.よりパターニングとし、エッチング
をしない事、Ta膜の採用により500℃の加熱でもG
a,P;Be元素の移動をTa膜が吸収する事、この実
験的発見によりAu面上には酸化層の発生がみられず、
ボンディングは100%の確率で1回で可能になった事
、Au一茂膜が従来の膜厚の1/5〜1/10となった
ため発光効率の減少にならない事、及びTa膜は塩酸及
び硝酸の加熱液に侵されずフロスト効果のプロセスに十
分耐えられる事等が判明した。またTa膜の代わりにタ
ングステ(W)膜、ニオブ(Nb)膜、シルコニウム(
Zr)膜、モリブデン(Mo)膜、ニッケル(Ni)膜
等も実験した。Ga,P,Be元素の吸収率は各々異な
り、各々の膜厚に依存する事を見出したがZr膜は塩酸
の加熱処理で、Mo,Ni膜は塩酸の加熱処理で侵され
、Au膜の剥離となり、ボンディング不能となる事が判
明した。W膜,Nb膜はTa膜と同一効果をもたらす事
を確認した。Au−茂膜のかわりにAu−Zn合金膜に
ついても同一実験を行なった。
In other words, it can be used as a mask for alloy films that are difficult to etch, such as Au-Mo alloy films. The use of a Ta film allows for better patterning and no etching, resulting in G resistance even when heated to 500°C.
Based on this experimental discovery that the Ta film absorbs the movement of a, P; Be elements, no oxide layer was observed on the Au surface.
Bonding can now be done in one go with 100% probability, the thickness of the Au film is 1/5 to 1/10 of the conventional film, so there is no decrease in luminous efficiency, and the Ta film can be bonded with hydrochloric acid or nitric acid. It was found that it was not affected by the heated liquid and could sufficiently withstand the frost effect process. In addition, instead of Ta film, tungsten (W) film, niobium (Nb) film, silconium (
We also experimented with Zr) film, molybdenum (Mo) film, nickel (Ni) film, etc. We found that the absorption rates of Ga, P, and Be elements are different and depend on the thickness of each film, but the Zr film was attacked by hydrochloric acid heat treatment, the Mo and Ni films were attacked by hydrochloric acid heat treatment, and the Au film was attacked by hydrochloric acid heat treatment. It was discovered that the bonding was impossible due to peeling. It was confirmed that the W film and the Nb film have the same effect as the Ta film. The same experiment was conducted using an Au-Zn alloy film instead of the Au-myo film.

この場合にもTa,W,Nb膜が同一効果をもつ事を見
出した。又、Au−Zn膜はAuのエッチング液に容易
にエッチング出来る事が判明したのでマスクによる三層
膜を形成しなくともよい。この場合の三層のエッチング
液はまず、Au膜をAuのエッチング液例えばヨウ素‐
(12)とョウ化カリウム(KI)の混合液で、Ta膜
をアルカリ性エッチング液例えばカセィソーダ(NaO
H)を主成分としたカセィカリウム(KOH)を1ハの
立混入した液で、Au−Zn膜を同上のAuのエッチン
グ液で行えばよい。但し、形成した膜でエッチングを行
なうとAu−Zn膜の接着強度が弱いためAu−Zn膜
から剥離が生じやすし・。従って膜形成後直ちに500
ooの加熱処理をしてZnの拡散を行なわせ、オーミツ
ク接触となったのちにエッチングを行なうのが良い。し
かし大量生産工程においてはエッチング工程がない方が
、省力化、時間短縮、歩溜り向上、コストダウンとなる
It has been found that Ta, W, and Nb films have the same effect in this case as well. Furthermore, it has been found that the Au-Zn film can be easily etched with an Au etchant, so there is no need to form a three-layer film using a mask. In this case, the three-layer etching solution is to first remove the Au film with an Au etching solution such as iodine-
(12) The Ta film is etched with an alkaline etching solution such as caustic soda (NaO) using a mixture of potassium iodide (KI) and potassium iodide (KI).
The Au--Zn film may be etched using the same Au etching solution as described above, using a solution containing 1 H of potassium potassium (KOH) as a main component. However, if the formed film is etched, it will easily peel off from the Au-Zn film because the adhesive strength of the Au-Zn film is weak. Therefore, immediately after film formation,
It is preferable to carry out etching after heat treatment is performed to diffuse Zn and establish ohmic contact. However, in mass production processes, eliminating the etching process saves labor, reduces time, improves yield, and reduces costs.

従ってマスクによる形成が最も良い。またTa膜の採用
によりボンディングは上述の如く1回で100%接着で
きる様になり、ボンディング時の時間損失を零とすると
とができた。勿論発光効率を減少せしめる事なく、旦つ
フロスト効果工程にも耐えるので有効発光効率を100
%発揮できるGap発光素子が得られる。
Therefore, it is best to form using a mask. Furthermore, by using the Ta film, 100% bonding can be achieved in one time as described above, and the time loss during bonding can be reduced to zero. Of course, it can withstand the frost effect process without reducing the luminous efficiency, so the effective luminous efficiency can be increased to 100%.
% Gap light emitting element is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のGaP発光素子の電極を説明するために
用いた発光ダイオードの断面図、第2図a〜eは従来法
によるp型GaP層の電極膜の形成法ならびにべレット
工程の工程断面図、第3図a〜dは本発明によるp型G
ap層の電極膜の製造工程及び構成を示す図である。 31はn型Gapウェハ−電極膜、32は金属性マスク
、33はAu−Be合金膜、34はタンタル膜、35は
金膜、36はべレットである。 第1図 第2図 第3図
Figure 1 is a cross-sectional view of a light emitting diode used to explain the electrodes of a conventional GaP light emitting device, and Figures 2 a to e are a conventional method for forming an electrode film of a p-type GaP layer and the steps of a pellet process. Cross-sectional views, FIGS. 3a to 3d, show p-type G according to the present invention.
It is a figure which shows the manufacturing process and structure of the electrode film of an ap layer. 31 is an n-type Gap wafer electrode film, 32 is a metal mask, 33 is an Au-Be alloy film, 34 is a tantalum film, 35 is a gold film, and 36 is a pellet. Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1 p−n接合を有するリン化ガリウム発光素子におい
て、前記p−n接合を構成するp型層の電極を、金と主
成分とするベリリウム又は亜鉛の合金層、タンタル若し
くはニオブの少なくとも1つの金属層、金を順次積層し
て構成したことを特徴とするリン化ガリウム発光素子。
1. In a gallium phosphide light-emitting device having a p-n junction, the electrode of the p-type layer constituting the p-n junction is made of at least one metal such as an alloy layer of beryllium or zinc mainly composed of gold, tantalum, or niobium. A gallium phosphide light emitting device characterized in that it is constructed by sequentially laminating layers and gold.
JP52076140A 1977-06-28 1977-06-28 Gallium phosphide light emitting device Expired JPS6034827B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52076140A JPS6034827B2 (en) 1977-06-28 1977-06-28 Gallium phosphide light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52076140A JPS6034827B2 (en) 1977-06-28 1977-06-28 Gallium phosphide light emitting device

Publications (2)

Publication Number Publication Date
JPS5411689A JPS5411689A (en) 1979-01-27
JPS6034827B2 true JPS6034827B2 (en) 1985-08-10

Family

ID=13596667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52076140A Expired JPS6034827B2 (en) 1977-06-28 1977-06-28 Gallium phosphide light emitting device

Country Status (1)

Country Link
JP (1) JPS6034827B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6212316U (en) * 1985-07-05 1987-01-26
JPS6268458A (en) * 1985-09-17 1987-03-28 マキントシユ・ナームローゼ・ベンノートシヤツプ Supporter of knee joint
JPH0240334B2 (en) * 1985-11-20 1990-09-11 Nakamura Bureisu Kk

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0035118B1 (en) * 1980-02-28 1985-11-21 Kabushiki Kaisha Toshiba Iii - v group compound semiconductor light-emitting element and method of producing the same
JPS5710967A (en) * 1980-06-24 1982-01-20 Toshiba Corp Semiconductor device
NL186354C (en) * 1981-01-13 1990-11-01 Sharp Kk SEMICONDUCTOR DEVICE COMPRISING III-V CONNECTIONS WITH A COMPOSITE ELECTRODE.
JPS57117283A (en) * 1981-01-13 1982-07-21 Sharp Corp 3-5 group compound semiconductor device
JPS57117284A (en) * 1981-01-13 1982-07-21 Sharp Corp 3-5 group compound semiconductor device
JPS57141685A (en) * 1981-02-26 1982-09-02 Fujitsu Kiden Display unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6212316U (en) * 1985-07-05 1987-01-26
JPS6268458A (en) * 1985-09-17 1987-03-28 マキントシユ・ナームローゼ・ベンノートシヤツプ Supporter of knee joint
JPH0240334B2 (en) * 1985-11-20 1990-09-11 Nakamura Bureisu Kk

Also Published As

Publication number Publication date
JPS5411689A (en) 1979-01-27

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