JP2001111106A - Gallium nitride compound semiconductor light emitting device and manufacturing method thereof - Google Patents

Gallium nitride compound semiconductor light emitting device and manufacturing method thereof

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Publication number
JP2001111106A
JP2001111106A JP28632799A JP28632799A JP2001111106A JP 2001111106 A JP2001111106 A JP 2001111106A JP 28632799 A JP28632799 A JP 28632799A JP 28632799 A JP28632799 A JP 28632799A JP 2001111106 A JP2001111106 A JP 2001111106A
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JP
Japan
Prior art keywords
gallium nitride
compound semiconductor
based compound
substrate
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28632799A
Other languages
Japanese (ja)
Inventor
Toshio Hata
俊雄 幡
Taiji Morimoto
泰司 森本
Takeshi Kamikawa
剛 神川
Kensaku Yamamoto
健作 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP28632799A priority Critical patent/JP2001111106A/en
Publication of JP2001111106A publication Critical patent/JP2001111106A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a gallium nitride compound semiconductor light emitting device capable of emitting lights in a blue light range which solves the problems such as the forward voltage increase or nonuniform current injection due to the breakage or resistance increase of electrodes on the substrate side faces about electrodes formed from the substrate. SOLUTION: The gallium nitride compound semiconductor light emitting device having an n-type gallium nitride compound semiconductor layer 2, a light emitting layer 3 and a p-type gallium nitride compound semiconductor layer 4 formed on a substrate 1 comprises a layer 2a containing an n-type impurity at a high concentration formed between the substrate 1 and the n-type gallium nitride compound semiconductor layer, a part of the substrate backside opposite to the semiconductor laminate surface is removed down to a depth at least to the layer 2a containing the n-type impurity at the high concentration, and an ohmic metal film 6 is formed on the substrate backside and a layer 2a containing a first conductivity type impurity at a high concentration.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、青色領域で発光可
能な窒化ガリウム系化合物半導体発光素子及びその製造
方法に係わり、特に基板側からも電極を形成する窒化ガ
リウム系化合物半導体発光素子及びその製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gallium nitride-based compound semiconductor light emitting device capable of emitting light in the blue region and a method of manufacturing the same, and more particularly, to a gallium nitride based compound semiconductor light-emitting device having an electrode formed from the substrate side and its manufacture. About the method.

【0002】[0002]

【従来の技術】図12に従来の窒化ガリウム系化合物半
導体発光素子の断面構造図を示す。
2. Description of the Related Art FIG. 12 is a sectional view of a conventional gallium nitride compound semiconductor light emitting device.

【0003】絶縁性のサファイア基板100上に、N型
窒化ガリウム系化合物半導体層200、P型窒化ガリウ
ム系化合物半導体層300、P型層用電極400が順次
積層形成され、更にN型窒化ガリウム系化合物半導体層
200露出表面上にN型用パッド電極500と、P型層
用電極400表面上にP型用パッド電極600とが同一
面上に対角配置されている。この様な従来の窒化ガリウ
ム系化合物半導体発光素子は、例えば特開平6−338
632に開示されている。
An N-type gallium nitride-based compound semiconductor layer 200, a P-type gallium nitride-based compound semiconductor layer 300, and an electrode 400 for a P-type layer are sequentially formed on an insulating sapphire substrate 100. On the exposed surface of the compound semiconductor layer 200, an N-type pad electrode 500 and on a surface of the P-type layer electrode 400, a P-type pad electrode 600 are diagonally arranged on the same plane. Such a conventional gallium nitride-based compound semiconductor light emitting device is disclosed in, for example, JP-A-6-338.
632.

【0004】図13に他の従来の窒化ガリウム系化合物
半導体発光素子の断面構造図を示す。
FIG. 13 shows a cross-sectional structural view of another conventional gallium nitride-based compound semiconductor light emitting device.

【0005】絶縁性のサファイア基板110上に、N型
窒化ガリウム系化合物半導体層210、窒化ガリウム系
化合物半導体活性層710、P型窒化ガリウム系化合物
半導体層310が順次積層形成され、更にP型窒化ガリ
ウム系化合物半導体層310表面上にP型用パッド電極
610が形成され、化合物半導体層側面での短絡を防止
するための絶縁体層810が形成された後、サファイア
基板110裏面上および側面上とN型窒化ガリウム系化
合物半導体層210側面上、絶縁体層810上とにN型
用電極510が形成されている。この様な他の従来の窒
化ガリウム系化合物半導体発光素子は、例えば特開平8
−102549に開示されている。
On an insulating sapphire substrate 110, an N-type gallium nitride-based compound semiconductor layer 210, a gallium nitride-based compound semiconductor active layer 710, and a P-type gallium nitride-based compound semiconductor layer 310 are sequentially formed. After a P-type pad electrode 610 is formed on the surface of the gallium-based compound semiconductor layer 310 and an insulator layer 810 for preventing a short circuit on the side surface of the compound semiconductor layer is formed, the pad electrode 610 is formed on the back surface and the side surface of the sapphire substrate 110. An N-type electrode 510 is formed on the side surface of the N-type gallium nitride-based compound semiconductor layer 210 and on the insulator layer 810. Such another conventional gallium nitride-based compound semiconductor light emitting device is disclosed in, for example,
No. 102549.

【0006】更に、図14(a)及び(b)に別の他の
従来の窒化ガリウム系化合物半導体発光素子の断面構造
図を示す。
FIGS. 14A and 14B are cross-sectional structural views of another conventional gallium nitride-based compound semiconductor light emitting device.

【0007】絶縁性のサファイア基板120上に、N型
窒化ガリウム系化合物半導体層220、P型窒化ガリウ
ム系化合物半導体層320、P型層用電極420が順次
積層形成され、更にサファイア基板120裏面上から、
サファイア基板120の一部をN型窒化ガリウム系化合
物半導体層220に達する深さまで取り除いた後、露出
したN型窒化ガリウム系化合物半導体層220表面上に
N型層用電極520が形成されている。この様な別の他
の従来の窒化ガリウム系化合物半導体発光素子は、例え
ば特開平7−221347に開示されている。
On an insulating sapphire substrate 120, an N-type gallium nitride-based compound semiconductor layer 220, a P-type gallium nitride-based compound semiconductor layer 320, and a P-type layer electrode 420 are sequentially formed. From
After removing a part of the sapphire substrate 120 to a depth reaching the N-type gallium nitride-based compound semiconductor layer 220, an N-type layer electrode 520 is formed on the exposed surface of the N-type gallium nitride-based compound semiconductor layer 220. Such another conventional gallium nitride-based compound semiconductor light emitting device is disclosed in, for example, Japanese Patent Application Laid-Open No. 7-221347.

【0008】[0008]

【発明が解決しようとする課題】ところが、上記従来の
技術に於ける窒化ガリウム系化合物半導体発光素子には
下記に示す様な問題点があった。
However, the gallium nitride-based compound semiconductor light emitting device according to the above prior art has the following problems.

【0009】即ち、図12に記載の従来の窒化ガリウム
系化合物半導体発光素子においては、N型窒化ガリウム
系化合物半導体層200とP型層用電極400との表面
上に、N型用パッド電極500とP型用パッド電極60
0とが同一面上に対角配置されているのが特徴のひとつ
である。
That is, in the conventional gallium nitride-based compound semiconductor light emitting device shown in FIG. 12, an N-type pad electrode 500 is provided on the surface of the N-type gallium nitride-based compound semiconductor layer 200 and the P-type layer electrode 400. And P-type pad electrode 60
One of the features is that 0 is diagonally arranged on the same plane.

【0010】このような従来の窒化ガリウム系化合物半
導体発光素子では、通常外部との電気的な接続を行う為
に、これらパッド電極500,600にAuボールを含
むAuワイヤーを超音波熱圧着するのが一般的である。
ここで、Auワイヤーや各半導体層とパッド電極50
0,600との接着強度等を考慮すると、各々のパッド
電極500,600大きさは100μm〜150μm径
の円形状か角形状の大きさが必要となる。
In such a conventional gallium nitride-based compound semiconductor light-emitting device, an Au wire including an Au ball is ultrasonically thermocompression-bonded to these pad electrodes 500 and 600 in order to make an electrical connection with the outside. Is common.
Here, the Au wire or each semiconductor layer and the pad electrode 50
Considering the adhesive strength to 0,600, etc., the size of each pad electrode 500,600 needs to be a circular or square shape with a diameter of 100 μm to 150 μm.

【0011】同一面上にN型用パッド電極500とP型
用パッド電極600とが形成されているため、GaAs
系,GaP系,InP系等の半導体発光素子と同じサイ
ズのチップを形成した場合、チップ上面の多くをこれら
のパッド電極500,600が占めることとなり、チッ
プ上面から放出される光の外部取出し効率が減少すると
いう問題点や、パッド電極500,600が近接配置さ
れることによりワイヤーボンディング工程におけるAu
ボールやAuワイヤーの接触による短絡不良や、チップ
の端部にAuワイヤーを打つ際にチップ欠け,チップ割
れ等の外観不良が発生し、特性劣化,信頼性低下,歩留
まり減少等の問題点があった。一方、上記問題点を防止
する目的で1チップ当たりの面積を大きくすると、1枚
のウエハーから取れるチップ数が制限され、同じ数量を
生産するためには製造時間,材料費共に増加することに
なり、従って最終製品の単価を押し上げてしまうという
問題点があった。
Since the N-type pad electrode 500 and the P-type pad electrode 600 are formed on the same surface, GaAs
When a chip having the same size as a semiconductor light emitting device such as a GaP-based, InP-based, or the like is formed, most of the upper surface of the chip is occupied by these pad electrodes 500 and 600, and the efficiency of extracting light emitted from the upper surface of the chip to the outside. And the pad electrodes 500 and 600 are arranged close to each other to reduce Au in the wire bonding process.
Short-circuit failure due to contact of a ball or Au wire, or chip appearance or chip cracking when hitting an Au wire at the end of the chip may cause problems such as deterioration of characteristics, decrease in reliability, and decrease in yield. Was. On the other hand, if the area per chip is increased for the purpose of preventing the above problems, the number of chips that can be obtained from one wafer is limited, and the production time and material cost increase in order to produce the same quantity. Therefore, there is a problem that the unit price of the final product is increased.

【0012】又、図13に記載の他の従来の窒化ガリウ
ム系化合物半導体発光素子においては、サファイア基板
110裏面上および側面上とN型窒化ガリウム系化合物
半導体層210側面上、絶縁体層910上とにN型用電
極510が形成され、N型窒化ガリウム系化合物半導体
層210と電気的接続されているのが特徴のひとつであ
る。
Further, in another conventional gallium nitride-based compound semiconductor light emitting device shown in FIG. 13, on the back surface and the side surface of the sapphire substrate 110, on the side surface of the N-type gallium nitride-based compound semiconductor layer 210, and on the insulator layer 910. One of the features is that an N-type electrode 510 is formed at this time and is electrically connected to the N-type gallium nitride-based compound semiconductor layer 210.

【0013】このような従来の窒化ガリウム系化合物半
導体発光素子では、サファイア基板110の膜厚は素子
の機械的強度を保つためには、研磨しても100μm〜
200μm程度は必要になる。一方、N型用電極510
の膜厚は精々0.2〜0.3μm程度であり、サファイ
ア基板110の膜厚に比較してN型用電極510の膜厚
は約3桁も違うことになる。このため、サファイア基板
110裏面上および側面上にN型用電極510を形成
し、N型窒化ガリウム系化合物半導体層210の側面と
電気的接続を行っているが、サファイア基板110裏面
および側面でのN型用電極510の断線や部分的な薄層
化等が生じてN型用電極510が高抵抗化し、順方向電
圧の増加やN型用電極510から供給されるべき電流
が、N型窒化ガリウム系化合物半導体層210に十分に
供給されないという問題点があった。
In such a conventional gallium nitride-based compound semiconductor light emitting device, the thickness of the sapphire substrate 110 must be 100 μm or more even after polishing in order to maintain the mechanical strength of the device.
About 200 μm is required. On the other hand, the N-type electrode 510
Is about 0.2 to 0.3 μm at most, and the film thickness of the N-type electrode 510 is different from that of the sapphire substrate 110 by about three digits. For this reason, the N-type electrode 510 is formed on the back surface and the side surface of the sapphire substrate 110, and is electrically connected to the side surface of the N-type gallium nitride-based compound semiconductor layer 210. Disconnection or partial thinning of the N-type electrode 510 occurs, and the resistance of the N-type electrode 510 increases, and the forward voltage increases and the current to be supplied from the N-type electrode 510 becomes N-type nitrided. There is a problem that the gallium-based compound semiconductor layer 210 is not sufficiently supplied.

【0014】又、図14に記載の別の他の従来の窒化ガ
リウム系化合物半導体発光素子においては、サファイア
基板120の一部をN型窒化ガリウム系化合物半導体層
220に達する深さまで取り除いた後、露出したN型窒
化ガリウム系化合物半導体層220表面上にN型層用電
極520を形成することが特徴のひとつである。
In another conventional gallium nitride compound semiconductor light emitting device shown in FIG. 14, after removing a part of the sapphire substrate 120 to a depth reaching the N-type gallium nitride compound semiconductor layer 220, One of the features is that an N-type layer electrode 520 is formed on the exposed surface of the N-type gallium nitride-based compound semiconductor layer 220.

【0015】このような従来の窒化ガリウム系化合物半
導体発光素子でも、サファイア基板110の膜厚は素子
の機械的強度を保つためには、研磨しても100μm〜
200μm程度は必要であり、例えば素子をリードフレ
ームや実装基板に登載する際、N型層用電極520とリ
ードフレームや実装基板との間に隙間が生じ、外部との
電気的な接続不良をおこし、特性劣化,信頼性低下,歩
留まり減少等の問題点があった。又、これを防止するた
めには、リードフレームや実装基板の形状の一部を凸上
に形成する等の工夫が必要であり、製造コストの増加の
要因となるという問題点があった。
In such a conventional gallium nitride-based compound semiconductor light emitting device, the thickness of the sapphire substrate 110 must be 100 μm or more even after polishing in order to maintain the mechanical strength of the device.
A thickness of about 200 μm is necessary. For example, when mounting an element on a lead frame or a mounting board, a gap is generated between the N-type layer electrode 520 and the lead frame or the mounting board, which results in poor electrical connection with the outside. However, there are problems such as deterioration of characteristics, deterioration of reliability, and decrease of yield. In order to prevent this, it is necessary to devise a method such as forming a part of the shape of the lead frame or the mounting substrate to be convex, which causes a problem that the manufacturing cost is increased.

【0016】又、P型層用電極420,N型層用電極5
20は、外部との接続を充分に行うためには数μmの膜
厚が必要であり、これらP型層用電極420,N型層用
電極520は光を透過させない不透明層となる。従っ
て、光はN型窒化ガリウム系化合物半導体層220とP
型窒化ガリウム系化合物半導体層320との側面および
N型窒化ガリウム系化合物半導体層220とサファイア
基板120との界面からのみ外部へ放出されることにな
るので、光の外部取出し効率が減少するという問題点が
あった。
The P-type layer electrode 420 and the N-type layer electrode 5
The electrode 20 has a thickness of several μm in order to sufficiently connect to the outside, and the P-type layer electrode 420 and the N-type layer electrode 520 are opaque layers that do not transmit light. Therefore, light is emitted from the N-type gallium nitride-based compound semiconductor layer 220 to the P-type
Is emitted to the outside only from the side surfaces of the n-type gallium nitride-based compound semiconductor layer 320 and from the interface between the n-type gallium nitride-based compound semiconductor layer 220 and the sapphire substrate 120, thereby reducing the light extraction efficiency. There was a point.

【0017】又、P型層用電極420,N型層用電極5
20はオーム性ではないので、化合物半導体層との良好
なオーム性を得る事が困難であるという問題点と共に、
電流がN型層用電極520の直上部分に集中して流れる
ので、発光効率が低下し、更に外部へ光の取出しが可能
なサファイア基板120直上部分の発光効率が特に低下
するので、全体としての光の外部取出し効率自体が減少
するという問題点があった。
The P-type layer electrode 420 and the N-type layer electrode 5
20 is not ohmic, so it is difficult to obtain good ohmic properties with the compound semiconductor layer,
Since the current flows intensively right above the N-type layer electrode 520, the luminous efficiency is reduced. Further, the luminous efficiency of the portion immediately above the sapphire substrate 120 from which light can be extracted to the outside is particularly reduced. There has been a problem that the light extraction efficiency itself decreases.

【0018】[0018]

【課題を解決するための手段】本発明は、上記問題点を
鑑みてなされたもので、基板上に形成され少なくとも第
一導電型窒化ガリウム系化合物半導体層、発光層、第二
導電型窒化ガリウム系化合物半導体層を有する積層構造
体からなる窒化ガリウム系化合物半導体発光素子におい
て、基板と第一導電型窒化ガリウム系化合物半導体層と
の間に高濃度の第一導電型不純物を含む層が形成され、
積層構造体が形成された面と反対側の基板裏面の一部
が、少なくとも高濃度の第一導電型不純物を含む層に達
する深さまで除去されると共に、基板裏面上および高濃
度の第一導電型不純物を含む層上にオーム性電極が形成
されていることによって上記の目的を達成する。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has at least a first conductivity type gallium nitride based compound semiconductor layer formed on a substrate, a light emitting layer, and a second conductivity type gallium nitride. In a gallium nitride-based compound semiconductor light emitting device having a laminated structure having a base compound semiconductor layer, a layer containing a high concentration of a first conductivity type impurity is formed between a substrate and a first conductivity type gallium nitride-based compound semiconductor layer. ,
A portion of the back surface of the substrate opposite to the surface on which the laminated structure is formed is removed at least to a depth that reaches a layer containing a high-concentration first-conductivity-type impurity. The above object is achieved by forming an ohmic electrode on a layer containing a type impurity.

【0019】上記構成によれば、従来同一面上に形成す
る必要のあったパッド電極の片方を、基板裏面に形成す
ることができるので、パッド電極間の短絡不良やワイヤ
ーボンディング工程の際に生じていた外観不良等を防止
することが可能になる。又、発光素子チップの面積を面
積を小さくすることができるので、1枚のウエハーから
取れるチップ数を増加させることが可能になる。更に、
高濃度の第一導電型不純物を含む層を形成することによ
り、第一導電型窒化ガリウム系化合物半導体層側での電
流の広がりを確保すると共に、オーム性電極を形成する
ことにより良好なオーミック接続が得られ、発光効率の
向上が可能になる。尚、本発明に記載の「オーム性」と
いう表現は、半導体層と良好なオーミック接続が可能で
あると言う意味であるが、例えばサファイア基板等の絶
縁性基板上に形成されている場合でも、同じ材料を使用
していればその形成が半導体層上から連続していなくて
も便宜上同じ表現を使用している。
According to the above configuration, one of the pad electrodes, which had conventionally been required to be formed on the same surface, can be formed on the back surface of the substrate. It is possible to prevent the appearance defect and the like that have been caused. Further, since the area of the light emitting element chip can be reduced, the number of chips that can be obtained from one wafer can be increased. Furthermore,
By forming a layer containing a high concentration of the first conductivity type impurity, the current is spread on the first conductivity type gallium nitride-based compound semiconductor layer side, and good ohmic connection is achieved by forming an ohmic electrode. Is obtained, and the luminous efficiency can be improved. Incidentally, the expression `` ohmic '' described in the present invention means that a good ohmic connection with the semiconductor layer is possible, for example, even when formed on an insulating substrate such as a sapphire substrate, If the same material is used, the same expression is used for convenience even if the formation is not continuous from above the semiconductor layer.

【0020】オーム性電極は、基板裏面上と高濃度の第
一導電型不純物を含む層との段差側面上にも連続的に形
成されていることによって上記の目的を達成する。
The above object is achieved by forming the ohmic electrode continuously also on the step side surface between the back surface of the substrate and the layer containing a high concentration of the first conductivity type impurity.

【0021】上記構成によれば、基板裏面全体を外部と
の電気的接続に利用できるので、発光素子チップ搭載用
のリードフレームや実装基板との間に隙間による外部と
の電気的な接続不良は発生しない。又、リードフレーム
や実装基板に特殊な加工を施す必要がなくなり、従来の
リードフレームや実装基板をそのまま利用することが可
能になる。
According to the above configuration, the entire back surface of the substrate can be used for electrical connection with the outside, so that poor electrical connection to the outside due to a gap between the lead frame for mounting the light emitting element chip and the mounting substrate is eliminated. Does not occur. Further, it is not necessary to perform special processing on the lead frame or the mounting board, and the conventional lead frame or mounting board can be used as it is.

【0022】基板と第一導電型窒化ガリウム系化合物半
導体層との間に高濃度の第一導電型不純物を含む層が形
成され、積層構造体が形成された面と反対側の基板裏面
の一部が、少なくとも第一導電型窒化ガリウム系化合物
半導体層に達する深さまで除去されると共に、基板裏面
上および第一導電型窒化ガリウム系化合物半導体層の裏
面上と第二導電型窒化ガリウム系化合物半導体層上とに
オーム性電極が形成されていることによって上記の目的
を達成する。又、オーム性金属電極は、オーム性金属電
極上および第一導電型窒化ガリウム系化合物半導体層上
に形成されると共に、基板裏面上と高濃度の第一導電型
不純物を含む層との側面上にも連続的に形成されている
ことによって上記の目的を達成する。
A layer containing a high-concentration first conductivity type impurity is formed between the substrate and the first conductivity type gallium nitride compound semiconductor layer, and a layer on the back surface of the substrate opposite to the surface on which the laminated structure is formed is formed. The portion is removed at least to a depth reaching the first conductivity type gallium nitride compound semiconductor layer, and on the back surface of the substrate and on the back surface of the first conductivity type gallium nitride compound semiconductor layer and the second conductivity type gallium nitride compound semiconductor. The above object is achieved by forming an ohmic electrode on the layer. The ohmic metal electrode is formed on the ohmic metal electrode and on the first conductivity type gallium nitride-based compound semiconductor layer, and on the side surface between the back surface of the substrate and the layer containing a high concentration of the first conductivity type impurity. The above object is achieved by being formed continuously.

【0023】上記構成によれば、第一導電型窒化ガリウ
ム系化合物半導体層および第二導電型窒化ガリウム系化
合物半導体層の両側での電流の広がりを確保すると共
に、電流の流れにくい基板面上部分にも均一に電流が拡
散するので、全体に均一な発光が行われ、発光効率の向
上が可能になる。又、基板裏面全体を外部との電気的接
続に利用できるので、発光素子チップ搭載用のリードフ
レームや実装基板との間に隙間による外部との電気的な
接続不良は発生しない。又、リードフレームや実装基板
に特殊な加工を施す必要がなくなり、従来のリードフレ
ームや実装基板をそのまま利用することが可能になる。
According to the above construction, the spread of the current on both sides of the gallium nitride compound semiconductor layer of the first conductivity type and the gallium nitride compound semiconductor layer of the second conductivity type is ensured. Since the current is diffused evenly, uniform light emission is performed as a whole, and the luminous efficiency can be improved. Also, since the entire back surface of the substrate can be used for electrical connection with the outside, there is no electrical connection failure with the outside due to gaps between the light emitting element chip mounting lead frame and the mounting substrate. Further, it is not necessary to perform special processing on the lead frame or the mounting board, and the conventional lead frame or mounting board can be used as it is.

【0024】オーム性電極は、オーム性金属電極と透光
性を有する酸化物半導体層との多層構造により形成され
ていることによって上記の目的を達成する。
The above object is achieved by forming the ohmic electrode with a multilayer structure of an ohmic metal electrode and a light-transmitting oxide semiconductor layer.

【0025】上記構成によれば、仮に基板裏面および側
面でのオーム性電極の断線や部分的な薄層化等が生じた
場合でも、酸化物半導体層を形成することにより順方向
電圧の増加を防止できると共に、安定した電流供給が可
能になる。又、この場合の好ましい形態は、基板と接す
る側に金属を形成し、その上に透光性酸化物半導体を形
成する構成であり、N型窒化ガリウム系化合物半導体層
とオーム性電極によりオーミック性接触とし、基板裏面
および側面でのオーム性電極の断線や部分的な薄層化箇
所等を覆うように酸化物半導体層を形成することによ
り、電流を支障なくN型窒化ガリウム系化合物半導体層
に供給することができ、このことより、発光素子チップ
に支障なく電流を供給することが可能になる。
According to the above structure, even if the ohmic electrode is disconnected or partially thinned on the back and side surfaces of the substrate, the forward voltage can be increased by forming the oxide semiconductor layer. In addition to the above, stable current supply becomes possible. Further, a preferable mode in this case is to form a metal on the side in contact with the substrate and to form a light-transmitting oxide semiconductor thereon, and to form an ohmic electrode by using an N-type gallium nitride-based compound semiconductor layer and an ohmic electrode. The oxide semiconductor layer is formed so as to cover the disconnection of the ohmic electrode on the back surface and the side surface of the substrate and the partially thinned portion, so that the current can be smoothly applied to the N-type gallium nitride-based compound semiconductor layer. The current can be supplied to the light emitting element chip without any trouble.

【0026】オーム性金属電極は、少なくとも基板裏面
上および高濃度の第一導電型不純物を含む層上に形成さ
れ、且つ酸化物半導体層は、オーム性金属電極上に形成
されると共に、基板裏面上と高濃度の第一導電型不純物
を含む層との段差側面上にも連続的に形成されているこ
とによって上記の目的を達成する。又、オーム性金属電
極は、少なくとも基板裏面上および第一導電型窒化ガリ
ウム系化合物半導体層上に形成され、且つ酸化物半導体
層は、オーム性金属電極上および第一導電型窒化ガリウ
ム系化合物半導体層上に形成されると共に、基板裏面上
と高濃度の第一導電型不純物を含む層との側面上にも連
続的に形成されていることによって上記の目的を達成す
る。
The ohmic metal electrode is formed at least on the back surface of the substrate and on a layer containing a high concentration of the first conductivity type impurity. The oxide semiconductor layer is formed on the ohmic metal electrode and the back surface of the substrate. The above object is attained by being continuously formed on the step side surface between the upper portion and a layer containing a high concentration of the first conductivity type impurity. The ohmic metal electrode is formed at least on the back surface of the substrate and on the first conductivity type gallium nitride compound semiconductor layer, and the oxide semiconductor layer is formed on the ohmic metal electrode and the first conductivity type gallium nitride compound semiconductor. The above object is achieved by being formed on the layer and also continuously formed on the side surface of the back surface of the substrate and the side surface of the layer containing a high concentration of the first conductivity type impurity.

【0027】上記構成によれば、基板裏面全体を外部と
の電気的接続に利用できるので、発光素子チップ搭載用
のリードフレームや実装基板との間に隙間による外部と
の電気的な接続不良は発生しない。又、リードフレーム
や実装基板に特殊な加工を施す必要がなくなり、従来の
リードフレームや実装基板をそのまま利用することが可
能になる。更に、酸化物半導体層は透光性を有するの
で、基板裏面および側面側への光はオーム性金属電極が
形成されない部分、例えば基板側面およびオーム性電極
の断線部分や部分的な薄層化箇所等から外部へと出射さ
れるので、光の外部取出し効率の向上が可能になる。
According to the above configuration, the entire back surface of the substrate can be used for electrical connection to the outside, so that poor electrical connection to the outside due to a gap between the lead frame for mounting the light emitting element chip and the mounting substrate. Does not occur. Further, it is not necessary to perform special processing on the lead frame or the mounting board, and the conventional lead frame or mounting board can be used as it is. Further, since the oxide semiconductor layer has a light-transmitting property, light to the back surface and the side surface of the substrate is exposed to a portion where the ohmic metal electrode is not formed, for example, the side surface of the substrate and a broken portion or a partially thinned portion of the ohmic electrode. Since the light is emitted to the outside from the light source and the like, the efficiency of extracting light to the outside can be improved.

【0028】オーム性金属電極は、透光性を有するオー
ム性金属薄膜からなることによって上記の目的を達成す
る。
The above object is achieved by forming the ohmic metal electrode from a translucent ohmic metal thin film.

【0029】上記構成によれば、発光層からの光が電極
バッドに遮られることがないので、外部に効率よく放射
することが可能になる。
According to the above configuration, since the light from the light emitting layer is not blocked by the electrode pad, it is possible to efficiently radiate the light to the outside.

【0030】又、本発明の窒化ガリウム系化合物半導体
発光素子の製造方法では、基板上に形成され少なくとも
第一導電型窒化ガリウム系化合物半導体層、発光層、第
二導電型窒化ガリウム系化合物半導体層を有する積層構
造体からなる窒化ガリウム系化合物半導体発光素子の製
造方法において、第一導電型窒化ガリウム系化合物半導
体層の一部に高濃度の第一導電型不純物を含む層を形成
する工程と、第一導電型窒化ガリウム系化合物半導体層
の一部に高濃度の第一導電型不純物を含む層を形成する
工程と、積層構造体が形成された面と反対側の基板裏面
の一部を、少なくとも高濃度の第一導電型不純物を含む
層に達する深さまで除去する工程と、基板裏面上および
高濃度の第一導電型不純物を含む層上にオーム性電極を
形成する工程とを有することによって上記の目的を達成
する。
In the method of manufacturing a gallium nitride-based compound semiconductor light-emitting device according to the present invention, at least a first conductivity type gallium nitride-based compound semiconductor layer, a light-emitting layer, and a second conductivity-type gallium nitride-based compound semiconductor layer formed on a substrate are provided. In the method for manufacturing a gallium nitride-based compound semiconductor light emitting device composed of a laminated structure having a step of forming a layer containing a high concentration of the first conductivity-type impurity in a part of the first conductivity-type gallium nitride-based compound semiconductor layer, A step of forming a layer containing a high concentration of the first conductivity type impurity on a part of the first conductivity type gallium nitride based compound semiconductor layer, and a part of the back surface of the substrate opposite to the surface on which the laminated structure is formed, A step of removing at least to a depth reaching a layer containing a high concentration of the first conductivity type impurity, and a step of forming an ohmic electrode on the back surface of the substrate and on the layer containing a high concentration of the first conductivity type impurity To achieve the above object by.

【0031】上記製造方法によれば、従来必要であっ
た、電極形成の為の第二導電型窒化ガリウム系化合物半
導体層の除去工程が不要となるので、形成した発光素子
の全面を発光層として利用することが可能になると共
に、除去工程での発光層部分の界面劣化を防止すること
が可能になる。又、基板裏面上および高濃度の第一導電
型不純物を含む層上全面にオーム性電極を形成するの
で、第一導電型窒化ガリウム系化合物半導体層側での電
流の広がりを確保すると共に、オーム性電極を形成する
ことにより良好なオーミック接続が得られ、均一な発光
および発光効率の向上が可能になる。
According to the above-described manufacturing method, the step of removing the second conductivity type gallium nitride-based compound semiconductor layer for forming the electrode, which is conventionally required, is not required, so that the entire surface of the formed light emitting element is used as the light emitting layer. It becomes possible to use it, and it becomes possible to prevent interface deterioration of the light emitting layer portion in the removing step. Further, since the ohmic electrode is formed on the back surface of the substrate and on the entire surface of the layer containing the high-concentration first conductivity type impurity, the spread of current on the first conductivity type gallium nitride-based compound semiconductor layer side is ensured, and the ohmic electrode is formed. By forming the conductive electrode, good ohmic connection can be obtained, and uniform light emission and improvement in light emission efficiency can be achieved.

【0032】[0032]

【発明の実施の形態】本発明の実施の形態を以下に詳細
に説明する。尚、以下に記載の本発明の実施の形態にお
いて、窒化ガリウム系化合物半導体とは、例えば、In
xAlyGa1- x-yN(0≦x,0≦y,x+y≦1)を
含むものとする。
Embodiments of the present invention will be described in detail below. In the embodiments of the present invention described below, a gallium nitride-based compound semiconductor is, for example, In
x Al y Ga 1- xy N ( 0 ≦ x, 0 ≦ y, x + y ≦ 1) is intended to include.

【0033】<第1の実施の形態>図1を用いて、窒化
ガリウム系化合物半導体発光素子の本発明による第1の
実施の形態を説明する。
<First Embodiment> A gallium nitride-based compound semiconductor light emitting device according to a first embodiment of the present invention will be described with reference to FIG.

【0034】図1は本発明の第1の実施の形態を用いて
作製した窒化ガリウム系化合物半導体発光素子の断面構
造図である。
FIG. 1 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the first embodiment of the present invention.

【0035】図1に示すように、例えばサファイア基板
1上に、N型窒化ガリウム系化合物半導体層2、窒化ガ
リウム系化合物半導体発光層3、P型窒化ガリウム系化
合物半導体層4が順次積層された積層構造体を形成す
る。ここで、基板1とN型窒化ガリウム系化合物半導体
層2のとの間には、例えばSi,Ge,Sn,S,S
e,Te等のIV族又はVI族のN型不純物を、1×1017
〜1×1021cm-3の高濃度にドープしたN型窒化ガリ
ウム系化合物半導体層2aが形成されている。尚、前記
発光層は単一量子井戸,多重量子井戸発光層を含ものと
する。又、本発明にはGaN,SiC等の導電性基板を
用いることもできるが、サファイア基板1等の絶縁性,
透光性の基板に用いた場合に本発明は最も効果を発揮す
る。
As shown in FIG. 1, an N-type gallium nitride-based compound semiconductor layer 2, a gallium nitride-based compound semiconductor light-emitting layer 3, and a P-type gallium nitride-based compound semiconductor layer 4 are sequentially laminated on a sapphire substrate 1, for example. A laminated structure is formed. Here, for example, Si, Ge, Sn, S, S is provided between the substrate 1 and the N-type gallium nitride-based compound semiconductor layer 2.
A group IV or group VI N-type impurity such as e or Te is added to 1 × 10 17
An N-type gallium nitride-based compound semiconductor layer 2a doped at a high concentration of about 1 × 10 21 cm −3 is formed. The light emitting layer includes a single quantum well and a multiple quantum well light emitting layer. In the present invention, a conductive substrate such as GaN or SiC can be used.
The present invention is most effective when used for a light-transmitting substrate.

【0036】P型窒化ガリウム系化合物半導体層4上
に、例えばリードフレームや回路配線基板等、外部との
電気的接続を行うためのパッド電極5が形成されてい
る。このパッド電極5は、例えばAu,Au合金,Al
等からなり、その厚さは、ボンデイング時の電極剥がれ
が発生しなくするために0.5μm以上0.8μm以下
に形成する。尚、パッド電極5とP型窒化ガリウム系化
合物半導体層4との間に良好な導電性を得る為にP型窒
化ガリウム系化合物半導体コンタクト層を形成しても良
い。
On the P-type gallium nitride-based compound semiconductor layer 4, a pad electrode 5 for making an electrical connection with the outside such as a lead frame or a circuit wiring board is formed. The pad electrode 5 is made of, for example, Au, Au alloy, Al
The thickness is set to 0.5 μm or more and 0.8 μm or less in order to prevent electrode peeling during bonding. Note that a P-type gallium nitride-based compound semiconductor contact layer may be formed between the pad electrode 5 and the P-type gallium nitride-based compound semiconductor layer 4 in order to obtain good conductivity.

【0037】基板1の裏面および側面とN型不純物が高
濃度にドープされたN型窒化ガリウム系化合物半導体層
2a上とに、透光性を有するオーム性金属薄膜6および
透光性を有する酸化物半導体層7が順次形成されてい
る。オーム性金属薄膜6には、例えばAu,Ni,T
i,Pt,Pd等を、真空蒸着法,電子ビーム蒸着法等
を用いて形成する。酸化物半導体層7は、In23,S
nO2,ZnO,Cd2SnO4,CdSnO3のうちのひ
とつからなり、蒸着法,スパツタ法,CVD法等を用い
て形成する。尚、酸化物半導体層7の膜厚は基板側面で
の膜厚と光の透過率を40%以上確保することを考慮す
ると、好ましくは5μmから15μmの範囲がよい。
又、酸化物半導体層7としてTiを添加したIn23
用いても膜抵抗、透過率が悪化しないためTiを添加し
てもよい。
On the back and side surfaces of the substrate 1 and on the N-type gallium nitride-based compound semiconductor layer 2a heavily doped with N-type impurities, a translucent ohmic metal thin film 6 and a translucent oxidized Object semiconductor layers 7 are sequentially formed. For example, Au, Ni, T
i, Pt, Pd, and the like are formed using a vacuum evaporation method, an electron beam evaporation method, or the like. The oxide semiconductor layer 7 is made of In 2 O 3 , S
It is formed of one of nO 2 , ZnO, Cd 2 SnO 4 , and CdSnO 3 , and is formed by a vapor deposition method, a sputter method, a CVD method, or the like. Note that the thickness of the oxide semiconductor layer 7 is preferably in the range of 5 μm to 15 μm in consideration of securing the thickness on the side surface of the substrate and the light transmittance of 40% or more.
Further, even if In 2 O 3 to which Ti is added is used as the oxide semiconductor layer 7, Ti may be added because the film resistance and the transmittance do not deteriorate.

【0038】パッド電極5と外部との電気的接続には、
例えばAu,Al,Cu等の金属ワイヤー8が用いられ
る。一方、オーム性金属薄膜6および酸化物半導体層7
と外部との電気的接続には、例えば半田,Agペース
ト,導電性接着剤等が用いられる。
For the electrical connection between the pad electrode 5 and the outside,
For example, a metal wire 8 of Au, Al, Cu or the like is used. On the other hand, the ohmic metal thin film 6 and the oxide semiconductor layer 7
For electrical connection between the device and the outside, for example, solder, Ag paste, conductive adhesive, or the like is used.

【0039】上記のように、電極の断線や薄層化が生じ
て電極が高抵抗化する基板1の裏面および側面とN型不
純物が高濃度にドープされたN型窒化ガリウム系化合物
半導体層2a上とに、オーム性金属薄膜6,酸化物半導
体層7を順次形成することにより、電気的特性に問題の
ない発光素子が得られ、光の外部取出し効率が増加する
と共に、1枚のウエハーからのチップの取れ数が多くな
るので、量産性に優れた窒化ガリウム系化合物半導体発
光素子を提供することができる。
As described above, the back surface and the side surface of the substrate 1 where the electrode has a high resistance due to the disconnection or thinning of the electrode and the N-type gallium nitride-based compound semiconductor layer 2a doped with the N-type impurity at a high concentration By sequentially forming the ohmic metal thin film 6 and the oxide semiconductor layer 7 on the top, a light-emitting element having no problem in electrical characteristics can be obtained, the efficiency of extracting light outside increases, and the light emission from one wafer can be improved. Therefore, a gallium nitride-based compound semiconductor light emitting device excellent in mass productivity can be provided.

【0040】尚、上記構成での窒化ガリウム系化合物半
導体発光素子構造は、ホモ構造の発光素子について説明
したが、窒化ガリウム系化合物半導体発光素子であれ
ば、ダブルヘテロ構造、シングルヘテロ構造や活性層に
量子井戸構造等あらゆる構造に適用できることは言うま
でもない。
The gallium nitride-based compound semiconductor light-emitting device having the above structure has been described with reference to a homostructure light-emitting device. However, a gallium nitride-based compound semiconductor light-emitting device may have a double hetero structure, a single hetero structure, or an active layer. Needless to say, the present invention can be applied to any structure such as a quantum well structure.

【0041】又、基板1の裏面および側面とN型不純物
が高濃度にドープされたN型窒化ガリウム系化合物半導
体層2a上とに、オーム性金属電極を単層で形成するこ
とも可能である。この場合、基板裏面方向への光の取出
し効率は制限されるが、半導体層と電極間に充分なオー
ミック接続が取れるので、電気的特性に問題のない発光
素子が得られ、1枚のウエハーからのチップの取れ数が
多くなるので、量産性に優れた窒化ガリウム系化合物半
導体発光素子を提供することができる。
It is also possible to form a single ohmic metal electrode on the back and side surfaces of the substrate 1 and on the N-type gallium nitride-based compound semiconductor layer 2a heavily doped with N-type impurities. . In this case, although the light extraction efficiency in the direction of the back surface of the substrate is limited, a sufficient ohmic connection can be obtained between the semiconductor layer and the electrode, so that a light-emitting element having no problem in electrical characteristics can be obtained, and a single wafer can be used. Therefore, a gallium nitride-based compound semiconductor light emitting device excellent in mass productivity can be provided.

【0042】次に、第1の実施の形態における具体的な
窒化ガリウム系化合物半導体発光素子の製造方法につい
て詳細に説明する。
Next, a specific method of manufacturing the gallium nitride-based compound semiconductor light emitting device according to the first embodiment will be described in detail.

【0043】図2(a)乃至(c)は本発明の第1の実
施の形態を用いた窒化ガリウム系化合物半導体発光素子
の製造方法を示す工程図である。
FIGS. 2A to 2C are process diagrams showing a method for manufacturing a gallium nitride-based compound semiconductor light emitting device using the first embodiment of the present invention.

【0044】図2(a)示すように、サファイア基板1
上に、N型窒化ガリウム系化合物半導体層2、窒化ガリ
ウム系化合物半導体発光層3、P型窒化ガリウム系化合
物半導体層4が順次積層された積層構造体を形成する。
ここで、基板1とN型窒化ガリウム系化合物半導体層2
のとの間に、N型不純物が高濃度にドープされたN型窒
化ガリウム系化合物半導体層2aを形成する。次に、P
型窒化ガリウム系化合物半導体層4上に外部との電気的
接続を行うためのパッド電極5としてAuを厚さ0.5
μm形成する。
As shown in FIG. 2A, the sapphire substrate 1
A stacked structure in which an N-type gallium nitride-based compound semiconductor layer 2, a gallium nitride-based compound semiconductor light-emitting layer 3, and a P-type gallium nitride-based compound semiconductor layer 4 are sequentially stacked is formed thereon.
Here, the substrate 1 and the N-type gallium nitride-based compound semiconductor layer 2
Between them, an N-type gallium nitride-based compound semiconductor layer 2a doped with an N-type impurity at a high concentration is formed. Next, P
Au having a thickness of 0.5 as a pad electrode 5 for making electrical connection with the outside on the p-type gallium nitride-based compound semiconductor layer 4
μm is formed.

【0045】次に、図2(b)示すように、基板1を厚
さが約100μm程度になるまで研磨した後、この基板
1の裏面に分離溝9を例えばウエットエッチング,ドラ
イエッチング,ダイシング,スクライビング等により形
成する。更に、分離溝9に対して垂直な方向にも第二の
分離溝(図示せず)を形成する。これら分離溝9および
第二の分離溝の形成は、N型不純物が高濃度にドープさ
れたN型窒化ガリウム系化合物半導体層2aが露出する
まで行う。
Next, as shown in FIG. 2B, after the substrate 1 is polished to a thickness of about 100 μm, separation grooves 9 are formed on the back surface of the substrate 1 by, for example, wet etching, dry etching, dicing, It is formed by scribing or the like. Further, a second separation groove (not shown) is also formed in a direction perpendicular to the separation groove 9. The formation of the separation groove 9 and the second separation groove is performed until the N-type gallium nitride-based compound semiconductor layer 2a doped with the N-type impurity at a high concentration is exposed.

【0046】次に、図2(c)示すように、基板1の裏
面および側面とN型不純物が高濃度にドープされたN型
窒化ガリウム系化合物半導体層2a上とに、透光性を有
するオーム性金属薄膜6としてNiを7nm形成する。
次に、オーム性金属薄膜6上に透光性を有する酸化物半
導体層7としてIn23にドーパントとしてSnを用い
たものを5μm形成する。
Next, as shown in FIG. 2C, the back surface and side surfaces of the substrate 1 and the N-type gallium nitride-based compound semiconductor layer 2a doped with an N-type impurity at a high concentration have translucency. 7 nm of Ni is formed as the ohmic metal thin film 6.
Next, a translucent oxide semiconductor layer 7 made of In 2 O 3 using Sn as a dopant is formed to a thickness of 5 μm on the ohmic metal thin film 6.

【0047】上記製造方法を用いて作製した窒化ガリウ
ム系化合物半導体発光素子を、250μm角状に成長面
側からスクライビングすることによりチップ化する。
The gallium nitride-based compound semiconductor light emitting device manufactured by the above manufacturing method is scribed into a chip by scribing 250 μm square from the growth surface side.

【0048】上述したように、基板裏面電極を本発明の
裏面電極構成とすることにより、基板側面での金属電極
の断線や薄層化が生じて電極が高抵抗化することはな
く、順方向電圧の低減が可能となり外部からの電流が容
易にチップに供給され、さらに、片方の電極を基板裏面
に形成できるためチップ面積を縮小でき、安価で量産性
に優れた窒化ガリウム系化合物半導体発光素子が作製で
きる。
As described above, when the back electrode of the substrate has the back electrode structure of the present invention, the metal electrode does not break or become thinner on the side surface of the substrate, and the electrode does not have a high resistance. A gallium nitride-based compound semiconductor light emitting device that can reduce the voltage and easily supply an external current to the chip, and can form one electrode on the back surface of the substrate to reduce the chip area, and is inexpensive and excellent in mass productivity Can be produced.

【0049】<第2の実施の形態>図3を用いて、窒化
ガリウム系化合物半導体発光素子の本発明による第2の
実施の形態を説明する。
<Second Embodiment> A gallium nitride-based compound semiconductor light emitting device according to a second embodiment of the present invention will be described with reference to FIG.

【0050】図3は、本発明の第2の実施の形態を用い
て作製した窒化ガリウム系化合物半導体発光素子の断面
構造図である。
FIG. 3 is a cross-sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the second embodiment of the present invention.

【0051】図3に示すように、例えばサファイア基板
21上に、N型窒化ガリウム系化合物半導体層22、窒
化ガリウム系化合物半導体発光層23、P型窒化ガリウ
ム系化合物半導体層24が順次積層された積層構造体を
形成する。ここで、基板21とN型窒化ガリウム系化合
物半導体層22との間には、例えばSi,Ge,Sn,
S,Se,Te等のIV族又はVI族のN型不純物を、1×
1017〜1×1021cm-3の高濃度にドープしたN型窒
化ガリウム系化合物半導体層22aが形成されている。
尚、前記発光層は単一量子井戸,多重量子井戸発光層を
含ものとする。又、本発明にはGaN,SiC等の導電
性基板を用いることもできるが、サファイア基板21等
の絶縁性,透光性の基板に用いた場合に本発明は最も効
果を発揮する。
As shown in FIG. 3, an N-type gallium nitride-based compound semiconductor layer 22, a gallium nitride-based compound semiconductor light-emitting layer 23, and a P-type gallium nitride-based compound semiconductor layer 24 are sequentially laminated on a sapphire substrate 21, for example. A laminated structure is formed. Here, between the substrate 21 and the N-type gallium nitride-based compound semiconductor layer 22, for example, Si, Ge, Sn,
A group IV or group VI N-type impurity such as S, Se, Te, etc.
An N-type gallium nitride-based compound semiconductor layer 22a doped at a high concentration of 10 17 to 1 × 10 21 cm −3 is formed.
The light emitting layer includes a single quantum well and a multiple quantum well light emitting layer. Although the present invention can use a conductive substrate such as GaN or SiC, the present invention is most effective when used for an insulating or translucent substrate such as the sapphire substrate 21.

【0052】P型窒化ガリウム系化合物半導体層24上
に、オーム性電極25aと、例えばリードフレームや回
路配線基板等、外部との電気的接続を行うためのパッド
電極25が形成されている。オーム性電極25aは、例
えばAu,Ni,Ti,Pt,Pd等を、真空蒸着法,
電子ビーム蒸着法等を用いて形成する。オーム性電極2
5aの厚さは、利用目的により異なるが1nm〜数μm
の間で形成する。パッド電極25は、例えばAu,Au
合金,Al等からなり、その厚さは、ボンデイング時の
電極剥がれが発生しなくするために0.5μm以上0.
8μm以下に形成する。
On the P-type gallium nitride-based compound semiconductor layer 24, an ohmic electrode 25a and a pad electrode 25 for making electrical connection with the outside such as a lead frame or a circuit wiring board are formed. The ohmic electrode 25a is made of, for example, Au, Ni, Ti, Pt, Pd, or the like by a vacuum evaporation method,
It is formed using an electron beam evaporation method or the like. Ohmic electrode 2
The thickness of 5a varies depending on the purpose of use, but is from 1 nm to several μm.
Form between The pad electrode 25 is made of, for example, Au, Au
It is made of an alloy, Al, or the like, and has a thickness of 0.5 μm or more to prevent electrode peeling during bonding.
It is formed to a thickness of 8 μm or less.

【0053】基板21の裏面および側面と、N型不純物
が高濃度にドープされたN型窒化ガリウム系化合物半導
体層22a側面と、N型窒化ガリウム系化合物半導体層
22面上とに、透光性を有するオーム性金属薄膜26お
よび透光性を有する酸化物半導体層27が順次形成され
ている。オーム性金属薄膜26には、例えばAu,N
i,Pt,Pd等を、真空蒸着法,電子ビーム蒸着法等
を用いて形成する。酸化物半導体層27は、In23
SnO2,ZnO,Cd2SnO4,CdSnO3のうちの
ひとつからなり、蒸着法,スパツタ法,CVD法等を用
いて形成する。尚、酸化物半導体層27の膜厚は基板側
面での膜厚と光の透過率を40%以上確保することを考
慮すると、好ましくは5μmから15μmの範囲がよ
い。又、酸化物半導体層27としてTiを添加したIn
23を用いても膜抵抗、透過率が悪化しないためTiを
添加してもよい。
The rear surface and the side surface of the substrate 21, the side surface of the N-type gallium nitride-based compound semiconductor layer 22a doped with an N-type impurity at a high concentration, and the surface of the N-type gallium nitride-based compound semiconductor layer 22 An ohmic metal thin film 26 having the following characteristics and an oxide semiconductor layer 27 having a light-transmitting property are sequentially formed. For example, Au, N
i, Pt, Pd, and the like are formed using a vacuum evaporation method, an electron beam evaporation method, or the like. The oxide semiconductor layer 27 is made of In 2 O 3 ,
It is made of one of SnO 2 , ZnO, Cd 2 SnO 4 , and CdSnO 3 and is formed by using an evaporation method, a sputter method, a CVD method, or the like. Note that the thickness of the oxide semiconductor layer 27 is preferably in the range of 5 μm to 15 μm in consideration of securing the film thickness on the side surface of the substrate and light transmittance of 40% or more. In addition, as the oxide semiconductor layer 27, In
Even if 2 O 3 is used, Ti may be added because the film resistance and transmittance do not deteriorate.

【0054】パッド電極25と外部との電気的接続に
は、例えばAu,Al,Cu等の金属ワイヤー28が用
いられる。一方、オーム性金属薄膜26および酸化物半
導体層27と外部との電気的接続には、例えば半田,A
gペースト,導電性接着剤等が用いられる。
For electrical connection between the pad electrode 25 and the outside, a metal wire 28 of, for example, Au, Al, Cu or the like is used. On the other hand, for electrical connection between the ohmic metal thin film 26 and the oxide semiconductor layer 27 and the outside, for example, solder, A
g paste, conductive adhesive or the like is used.

【0055】上記のように、P型窒化ガリウム系化合物
半導体層24上に、オーム性電極25aを形成すること
により、P側に於ける電流の広がりを確保できるので、
電流は発光層23全体に広がって流れるので発光効率が
良くなると共に、本実施例ではN型不純物が高濃度にド
ープされたN型窒化ガリウム系化合物半導体層22aを
基板21の上面のみに形成しているので、電流の流れに
くい基板面上部分にも均一に電流が拡散するので、全体
に均一な発光が行われ、発光効率の向上が可能になる。
As described above, by forming the ohmic electrode 25a on the P-type gallium nitride based compound semiconductor layer 24, the spread of current on the P side can be ensured.
Since the current spreads and flows through the entire light emitting layer 23, the light emission efficiency is improved. In this embodiment, the N-type gallium nitride-based compound semiconductor layer 22a doped with the N-type impurity at a high concentration is formed only on the upper surface of the substrate 21. As a result, the current is uniformly diffused even on the portion of the substrate surface where the current does not easily flow, so that uniform light emission is performed as a whole and the light emission efficiency can be improved.

【0056】又、電極の断線や薄層化が生じて電極が高
抵抗化する基板21の裏面および側面と、N型不純物が
高濃度にドープされたN型窒化ガリウム系化合物半導体
層22a側面と、N型窒化ガリウム系化合物半導体層2
2面上とに、オーム性金属薄膜26,酸化物半導体層2
7を順次形成することにより、電気的特性に問題のない
発光素子が得られ、光の外部取出し効率が増加すると共
に、1枚のウエハーからのチップの取れ数が多くなるの
で、量産性に優れた窒化ガリウム系化合物半導体発光素
子を提供することができる。
Further, the back surface and side surface of the substrate 21 in which the electrode has a high resistance due to the disconnection and thinning of the electrode, and the side surface of the N-type gallium nitride-based compound semiconductor layer 22a doped with an N-type impurity at a high concentration. , N-type gallium nitride-based compound semiconductor layer 2
Ohmic metal thin film 26, oxide semiconductor layer 2
By sequentially forming 7, a light-emitting element having no problem in electrical characteristics can be obtained, the efficiency of extracting light outside increases, and the number of chips taken from one wafer increases, resulting in excellent mass productivity. Gallium nitride based compound semiconductor light emitting device.

【0057】尚、上記構成での窒化ガリウム系化合物半
導体発光素子構造は、ホモ構造の発光素子について説明
したが、窒化ガリウム系化合物半導体発光素子であれ
ば、ダブルヘテロ構造、シングルヘテロ構造や活性層に
量子井戸構造等あらゆる構造に適用できることは言うま
でもない。
The gallium nitride-based compound semiconductor light-emitting device having the above-described structure has been described with reference to a homostructure light-emitting device. Needless to say, the present invention can be applied to any structure such as a quantum well structure.

【0058】又、基板21の裏面および側面と、N型不
純物が高濃度にドープされたN型窒化ガリウム系化合物
半導体層22a側面と、N型窒化ガリウム系化合物半導
体層22面上とに、オーム性金属電極を単層で形成する
ことも可能である。この場合、基板裏面方向への光の取
出し効率は制限されるが、半導体層と電極間に充分なオ
ーミック接続が取れるので、電気的特性に問題のない発
光素子が得られ、1枚のウエハーからのチップの取れ数
が多くなるので、量産性に優れた窒化ガリウム系化合物
半導体発光素子を提供することができる。
Also, the back surface and side surfaces of the substrate 21, the side surfaces of the N-type gallium nitride-based compound semiconductor layer 22a heavily doped with N-type impurities, and the ohmic surface It is also possible to form the conductive metal electrode in a single layer. In this case, although the light extraction efficiency in the direction of the back surface of the substrate is limited, a sufficient ohmic connection can be obtained between the semiconductor layer and the electrode, so that a light-emitting element having no problem in electrical characteristics can be obtained, and a single wafer can be used. Therefore, a gallium nitride-based compound semiconductor light emitting device excellent in mass productivity can be provided.

【0059】更に、オーム性電極25aは透光性を有す
るオーム性金属薄膜であっても良い。この場合は、光を
P型窒化ガリウム系化合物半導体層24側からも効率よ
く取出すことができる。又、オーム性金属薄膜26が不
透光性のオーム性電極であっても良く、この場合、発光
素子チップ上下方向からは光はでないが、発光素子チッ
プを横置きして側面からの発光を利用することにより、
チップを半田リフロー,ディッピング等により金属ワイ
ヤーを用いずに回路配線基板等に実装するチップ部品型
発光装置に用いるのに最適である。
Further, the ohmic electrode 25a may be a translucent ohmic metal thin film. In this case, light can be efficiently extracted also from the P-type gallium nitride-based compound semiconductor layer 24 side. Further, the ohmic metal thin film 26 may be an opaque ohmic electrode. In this case, light is not emitted from the upper and lower directions of the light emitting element chip. By using
It is suitable for use in a chip component type light emitting device in which a chip is mounted on a circuit wiring board or the like without using metal wires by solder reflow, dipping, or the like.

【0060】尚、上述したオーム性電極25aは第1の
実施の形態等の他の本発明の実施の形態に適用可能であ
る。他の本発明の実施の形態に適用した場合でも、オー
ム性電極25a形成下の半導体層に於ける電流の広がり
を確保できるので、電流は発光層全体に広がって流れる
ので発光効率が良くなる。
The above-mentioned ohmic electrode 25a is applicable to other embodiments of the present invention such as the first embodiment. Even when the present invention is applied to another embodiment of the present invention, the spread of the current in the semiconductor layer under the formation of the ohmic electrode 25a can be ensured, and the current spreads and flows throughout the light emitting layer, so that the luminous efficiency is improved.

【0061】次に、第2の実施の形態における具体的な
窒化ガリウム系化合物半導体発光素子の製造方法につい
て詳細に説明する。
Next, a specific method for manufacturing a gallium nitride-based compound semiconductor light emitting device according to the second embodiment will be described in detail.

【0062】図4(a)乃至(c)は本発明の第2の実
施の形態を用いた窒化ガリウム系化合物半導体発光素子
の製造方法を示す工程図である。
FIGS. 4A to 4C are process diagrams showing a method for manufacturing a gallium nitride-based compound semiconductor light emitting device using the second embodiment of the present invention.

【0063】図4(a)示すように、サファイア基板2
1上に、N型窒化ガリウム系化合物半導体層22、窒化
ガリウム系化合物半導体発光層23、P型窒化ガリウム
系化合物半導体層24が順次積層された積層構造体を形
成する。ここで、基板21とN型窒化ガリウム系化合物
半導体層22との間に、N型不純物が高濃度にドープさ
れたN型窒化ガリウム系化合物半導体層22aを形成す
る。次に、P型窒化ガリウム系化合物半導体層24上
に、オーム性電極25aとして例えばAuを通常μmオ
ーダーで形成するが、オーム性金属薄膜として利用する
場合は例えばNiを7nm形成する。オーム性電極25
a上に、外部との電気的接続を行うためのパッド電極2
5としてAuを厚さ0.6μm形成する。
As shown in FIG. 4A, the sapphire substrate 2
A stacked structure in which an N-type gallium nitride-based compound semiconductor layer 22, a gallium nitride-based compound semiconductor light-emitting layer 23, and a P-type gallium nitride-based compound semiconductor layer 24 are sequentially formed on 1 is formed. Here, an N-type gallium nitride-based compound semiconductor layer 22a doped with an N-type impurity at a high concentration is formed between the substrate 21 and the N-type gallium nitride-based compound semiconductor layer 22. Next, on the P-type gallium nitride-based compound semiconductor layer 24, for example, Au is usually formed on the order of μm as the ohmic electrode 25a, but when it is used as an ohmic metal thin film, for example, Ni is formed to a thickness of 7 nm. Ohmic electrode 25
a pad electrode 2 for making an electrical connection with the outside
As No. 5, Au is formed to a thickness of 0.6 μm.

【0064】次に、図4(b)示すように、基板21を
厚さが約100μm程度になるまで研磨した後、この基
板21の裏面に分離溝29を例えばウエットエッチン
グ,ドライエッチング,ダイシング,スクライビング等
により形成する。更に、分離溝29に対して垂直な方向
にも第二の分離溝(図示せず)を形成する。これら分離
溝29および第二の分離溝の形成は、N型窒化ガリウム
系化合物半導体層22が露出するまで行う。
Next, as shown in FIG. 4B, after the substrate 21 is polished to a thickness of about 100 μm, a separation groove 29 is formed on the back surface of the substrate 21 by, for example, wet etching, dry etching, dicing, or the like. It is formed by scribing or the like. Further, a second separation groove (not shown) is also formed in a direction perpendicular to the separation groove 29. The formation of the separation groove 29 and the second separation groove is performed until the N-type gallium nitride-based compound semiconductor layer 22 is exposed.

【0065】次に、図4(c)示すように、基板21の
裏面および側面と、N型不純物が高濃度にドープされた
N型窒化ガリウム系化合物半導体層22a側面と、N型
窒化ガリウム系化合物半導体層22面上とに、透光性を
有するオーム性金属薄膜26としてNiを10nm形成
する。次に、オーム性金属薄膜26上に透光性を有する
酸化物半導体層27としてIn23にドーパントとして
Snを用いたものを10μm形成する。
Next, as shown in FIG. 4C, the back surface and the side surface of the substrate 21, the side surface of the N-type gallium nitride-based compound semiconductor layer 22a doped with the N-type impurity at a high concentration, and the N-type gallium nitride-based On the surface of the compound semiconductor layer 22, Ni is formed to a thickness of 10 nm as a translucent ohmic metal thin film. Next, on the ohmic metal thin film 26, a 10 μm-thick layer of In 2 O 3 using Sn as a dopant is formed as the light-transmitting oxide semiconductor layer 27.

【0066】上記製造方法を用いて作製した窒化ガリウ
ム系化合物半導体発光素子を、300μm角状に成長面
側からスクライビングすることによりチップ化する。
The gallium nitride-based compound semiconductor light-emitting device manufactured by the above-described method is scribed into a chip by scribing 300 μm square from the growth surface side.

【0067】上述したように、基板裏面電極を本発明の
裏面電極構成とすることにより、基板側面での金属電極
の断線や薄層化が生じて電極が高抵抗化することはな
く、順方向電圧の低減が可能となり外部からの電流が容
易にチップに供給され、さらに、片方の電極を基板裏面
に形成できるためチップ面積を縮小でき、安価で量産性
に優れた窒化ガリウム系化合物半導体発光素子が作製で
きる。
As described above, by using the back electrode structure of the present invention for the back electrode of the substrate, the metal electrode does not break or become thin on the side surface of the substrate, and the electrode does not have high resistance. A gallium nitride-based compound semiconductor light emitting device that can reduce the voltage and easily supply an external current to the chip, and can form one electrode on the back surface of the substrate to reduce the chip area, and is inexpensive and excellent in mass productivity Can be produced.

【0068】<第3の実施の形態>図5を用いて、窒化
ガリウム系化合物半導体発光素子の本発明による第3の
実施の形態を説明する。
<Third Embodiment> A gallium nitride-based compound semiconductor light emitting device according to a third embodiment of the present invention will be described with reference to FIG.

【0069】図5は本発明の第3の実施の形態を用いて
作製した窒化ガリウム系化合物半導体発光素子の断面構
造図である。
FIG. 5 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the third embodiment of the present invention.

【0070】図5に示すように、例えばサファイア基板
31上に、N型窒化ガリウム系化合物半導体層32、窒
化ガリウム系化合物半導体発光層33、P型窒化ガリウ
ム系化合物半導体層34が順次積層された積層構造体を
形成する。ここで、基板31とN型窒化ガリウム系化合
物半導体層32との間には、例えばSi,Ge,Sn,
S,Se,Te等のIV族又はVI族のN型不純物を、1×
1017〜1×1021cm-3の高濃度にドープしたN型窒
化ガリウム系化合物半導体層32aが形成されている。
尚、前記発光層は単一量子井戸,多重量子井戸発光層を
含ものとする。又、本発明にはGaN,SiC等の導電
性基板を用いることもできるが、サファイア基板31等
の絶縁性,透光性の基板に用いた場合に本発明は最も効
果を発揮する。
As shown in FIG. 5, an N-type gallium nitride-based compound semiconductor layer 32, a gallium nitride-based compound semiconductor light-emitting layer 33, and a P-type gallium nitride-based compound semiconductor layer 34 are sequentially laminated on, for example, a sapphire substrate 31. A laminated structure is formed. Here, between the substrate 31 and the N-type gallium nitride-based compound semiconductor layer 32, for example, Si, Ge, Sn,
A group IV or group VI N-type impurity such as S, Se, Te, etc.
An N-type gallium nitride-based compound semiconductor layer 32a doped at a high concentration of 10 17 to 1 × 10 21 cm −3 is formed.
The light emitting layer includes a single quantum well and a multiple quantum well light emitting layer. Although the present invention may use a conductive substrate such as GaN or SiC, the present invention is most effective when used for an insulating or translucent substrate such as the sapphire substrate 31.

【0071】P型窒化ガリウム系化合物半導体層34上
に、例えばリードフレームや回路配線基板等、外部との
電気的接続を行うためのパッド電極35が形成されてい
る。このパッド電極35は、例えばAu,Au合金,A
l等からなり、その厚さは、ボンデイング時の電極剥が
れが発生しなくするために0.5μm以上0.8μm以
下に形成する。尚、パッド電極35とP型窒化ガリウム
系化合物半導体層34との間に良好な導電性を得る為に
P型窒化ガリウム系化合物半導体コンタクト層を形成し
ても良い。
On the P-type gallium nitride-based compound semiconductor layer 34, a pad electrode 35 for making electrical connection with the outside such as a lead frame or a circuit wiring board is formed. The pad electrode 35 is made of, for example, Au, Au alloy, A
The thickness is set to 0.5 μm or more and 0.8 μm or less in order to prevent electrode peeling during bonding. Note that a P-type gallium nitride-based compound semiconductor contact layer may be formed between the pad electrode 35 and the P-type gallium nitride-based compound semiconductor layer 34 in order to obtain good conductivity.

【0072】基板31の裏面上とN型不純物が高濃度に
ドープされたN型窒化ガリウム系化合物半導体層32a
上とに、透光性を有するオーム性金属薄膜36が形成さ
れている。オーム性金属薄膜36には、例えばAu,N
i,Ti,Pt,Pd等を、真空蒸着法,電子ビーム蒸
着法等を用いて形成する。更に、基板31の側面を含む
オーム性金属薄膜36上に、透光性を有する酸化物半導
体層37が形成されている。酸化物半導体層37は、I
23,SnO2,ZnO,Cd2SnO4,CdSnO3
のうちのひとつからなり、蒸着法,スパツタ法,CVD
法等を用いて形成する。尚、酸化物半導体層37の膜厚
は基板側面での膜厚と光の透過率を40%以上確保する
ことを考慮すると、好ましくは5μmから15μmの範
囲がよい。又、酸化物半導体層37としてTiを添加し
たIn23を用いても膜抵抗、透過率が悪化しないため
Tiを添加してもよい。
The back surface of the substrate 31 and the N-type gallium nitride-based compound semiconductor layer 32a heavily doped with N-type impurities
An ohmic metal thin film 36 having a light-transmitting property is formed on the upper side. For example, Au, N
i, Ti, Pt, Pd, etc. are formed using a vacuum evaporation method, an electron beam evaporation method, or the like. Further, a light-transmitting oxide semiconductor layer 37 is formed on the ohmic metal thin film 36 including the side surface of the substrate 31. The oxide semiconductor layer 37 is formed of I
n 2 O 3 , SnO 2 , ZnO, Cd 2 SnO 4 , CdSnO 3
Consisting of one of the following: evaporation method, sputter method, CVD
It is formed using a method or the like. Note that the thickness of the oxide semiconductor layer 37 is preferably in the range of 5 μm to 15 μm in consideration of securing the film thickness on the side surface of the substrate and light transmittance of 40% or more. Further, even if In 2 O 3 to which Ti is added is used as the oxide semiconductor layer 37, Ti may be added because the film resistance and the transmittance do not deteriorate.

【0073】パッド電極35と外部との電気的接続に
は、例えばAu,Al,Cu等の金属ワイヤー38が用
いられる。一方、オーム性金属薄膜36および酸化物半
導体層37と外部との電気的接続には、例えば半田,A
gペースト,導電性接着剤等が用いられる。
For electrical connection between the pad electrode 35 and the outside, a metal wire 38 of, for example, Au, Al, Cu or the like is used. On the other hand, for electrical connection between the ohmic metal thin film 36 and the oxide semiconductor layer 37 and the outside, for example, solder, A
g paste, conductive adhesive or the like is used.

【0074】上記のように、電極の断線や薄層化が生じ
て電極が高抵抗化する基板31の裏面および側面とN型
不純物が高濃度にドープされたN型窒化ガリウム系化合
物半導体層32a上とに、オーム性金属薄膜36,酸化
物半導体層37を順次形成することにより、電気的特性
に問題のない発光素子が得られ、光の外部取出し効率が
増加すると共に、1枚のウエハーからのチップの取れ数
が多くなるので、量産性に優れた窒化ガリウム系化合物
半導体発光素子を提供することができる。又、基板31
側面には透光性を有する酸化物半導体層37のみが形成
されているので、効率よく光を外部へ取出すことができ
る。
As described above, the N-type gallium nitride-based compound semiconductor layer 32a doped with the N-type impurity at a high concentration is formed on the back surface and the side surface of the substrate 31 where the electrode is disconnected and the thickness of the electrode is increased and the resistance of the electrode is increased. By sequentially forming the ohmic metal thin film 36 and the oxide semiconductor layer 37 on the top, a light-emitting element having no problem in electrical characteristics can be obtained, the light extraction efficiency can be increased, and a single wafer can be obtained. Therefore, a gallium nitride-based compound semiconductor light emitting device excellent in mass productivity can be provided. Also, the substrate 31
Since only the light-transmitting oxide semiconductor layer 37 is formed on the side surface, light can be efficiently extracted to the outside.

【0075】尚、上記構成での窒化ガリウム系化合物半
導体発光素子構造は、ホモ構造の発光素子について説明
したが、窒化ガリウム系化合物半導体発光素子であれ
ば、ダブルヘテロ構造、シングルヘテロ構造や活性層に
量子井戸構造等あらゆる構造に適用できることは言うま
でもない。
The gallium nitride-based compound semiconductor light-emitting device having the above-described structure has been described with reference to a light-emitting device having a homostructure. However, a gallium nitride-based compound semiconductor light-emitting device may have a double heterostructure, a single heterostructure, or an active layer. Needless to say, the present invention can be applied to any structure such as a quantum well structure.

【0076】更に、オーム性金属薄膜36は不透光性の
オーム性電極であっても良く、この場合、オーム性電極
面上には全面に酸化物半導体層37を形成する必要はな
く、一部分が互いに接して導通が取れていればよく、回
路配線基板等との接続もオーム性電極部分で確実に行う
ことができる。又、基板31方向への光は基板31側面
から効率よく取り出すことができる。
Further, the ohmic metal thin film 36 may be an opaque ohmic electrode. In this case, it is not necessary to form the oxide semiconductor layer 37 over the entire surface of the ohmic electrode, However, it is sufficient that they are in contact with each other so that electrical continuity can be obtained, and connection with a circuit wiring board or the like can be reliably performed at the ohmic electrode portion. Further, light in the direction of the substrate 31 can be efficiently extracted from the side surface of the substrate 31.

【0077】次に、第3の実施の形態における具体的な
窒化ガリウム系化合物半導体発光素子の製造方法につい
て詳細に説明する。
Next, a specific method for manufacturing a gallium nitride-based compound semiconductor light emitting device according to the third embodiment will be described in detail.

【0078】図6(a)乃至(c)は本発明の第3の実
施の形態を用いた窒化ガリウム系化合物半導体発光素子
の製造方法を示す工程図である。
FIGS. 6A to 6C are process diagrams showing a method of manufacturing a gallium nitride-based compound semiconductor light emitting device using the third embodiment of the present invention.

【0079】図6(a)示すように、サファイア基板3
1上に、N型窒化ガリウム系化合物半導体層32、窒化
ガリウム系化合物半導体発光層33、P型窒化ガリウム
系化合物半導体層34が順次積層された積層構造体を形
成する。ここで、基板31とN型窒化ガリウム系化合物
半導体層32との間に、N型不純物が高濃度にドープさ
れたN型窒化ガリウム系化合物半導体層32aを形成す
る。次に、P型窒化ガリウム系化合物半導体層34上に
外部との電気的接続を行うためのパッド電極35として
Auを厚さ0.5μm形成する。
As shown in FIG. 6A, the sapphire substrate 3
A stacked structure in which an N-type gallium nitride-based compound semiconductor layer 32, a gallium nitride-based compound semiconductor light-emitting layer 33, and a P-type gallium nitride-based compound semiconductor layer 34 are sequentially formed on 1 is formed. Here, an N-type gallium nitride-based compound semiconductor layer 32a doped with an N-type impurity at a high concentration is formed between the substrate 31 and the N-type gallium nitride-based compound semiconductor layer 32. Next, on the P-type gallium nitride-based compound semiconductor layer 34, Au is formed to a thickness of 0.5 μm as a pad electrode 35 for making an electrical connection to the outside.

【0080】次に、図6(b)示すように、基板31を
厚さが約100μm程度になるまで研磨した後、この基
板31の裏面に分離溝39を例えばウエットエッチン
グ,ドライエッチング,ダイシング,スクライビング等
により形成する。更に、分離溝39に対して垂直な方向
にも第二の分離溝(図示せず)を形成する。これら分離
溝39および第二の分離溝の形成は、N型不純物が高濃
度にドープされたN型窒化ガリウム系化合物半導体層3
2aが露出するまで行う。
Next, as shown in FIG. 6B, after the substrate 31 is polished to a thickness of about 100 μm, a separation groove 39 is formed on the back surface of the substrate 31 by, for example, wet etching, dry etching, dicing, or the like. It is formed by scribing or the like. Further, a second separation groove (not shown) is also formed in a direction perpendicular to the separation groove 39. The formation of the separation groove 39 and the second separation groove is performed by forming the N-type gallium nitride-based compound semiconductor layer 3 doped with an N-type impurity at a high concentration.
Repeat until 2a is exposed.

【0081】次に、図6(c)示すように、基板31の
裏面上とN型不純物が高濃度にドープされたN型窒化ガ
リウム系化合物半導体層32a上とに、透光性を有する
オーム性金属薄膜36としてPdを1〜3nm形成する
か又は、TiとAuとを各々3nm,4nm形成する。
次に、基板31の側面を含むオーム性金属薄膜36上
に、透光性を有する酸化物半導体層37としてIn23
にドーパントとしてSnを用いたものを10μm形成す
る。又は、Ti添加のIn23を用いてもよい。
Next, as shown in FIG. 6C, an ohmic ohmic material having a light-transmitting property is formed on the back surface of the substrate 31 and on the N-type gallium nitride-based compound semiconductor layer 32a doped with an N-type impurity at a high concentration. As the conductive metal thin film 36, Pd is formed in a thickness of 1 to 3 nm, or Ti and Au are formed in a thickness of 3 nm and 4 nm, respectively.
Next, on the ohmic metal thin film 36 including the side surface of the substrate 31, as a light-transmitting oxide semiconductor layer 37, In 2 O 3
Then, a layer using Sn as a dopant is formed to a thickness of 10 μm. Alternatively, Ti 2 -added In 2 O 3 may be used.

【0082】上記製造方法を用いて作製した窒化ガリウ
ム系化合物半導体発光素子を、250μm角状に成長面
側からスクライビングすることによりチップ化する。
The gallium nitride-based compound semiconductor light emitting device manufactured by the above manufacturing method is chipped by scribing from a growth surface side into a square of 250 μm.

【0083】上述したように、基板裏面電極を本発明の
裏面電極構成とすることにより、基板裏面電極により光
が遮られることがなく、基板裏面側から外部に光を有効
に放射できるので、光の外部取出し効率が良好になり発
光出力が増加できる。又、基板側面での金属電極の断線
や薄層化が生じて電極が高抵抗化することはなく、順方
向電圧の低減が可能となり外部からの電流が容易にチッ
プに供給され、さらに、片方の電極を基板裏面に形成で
きるためチップ面積を縮小でき、安価で量産性に優れた
窒化ガリウム系化合物半導体発光素子が作製できる。
As described above, by forming the back electrode of the substrate with the back electrode configuration of the present invention, light can be effectively radiated from the back surface of the substrate to the outside without light being blocked by the back electrode of the substrate. And the light emission output can be increased. In addition, the metal electrodes do not break or become thinner on the side surfaces of the substrate, so that the electrodes do not increase in resistance, the forward voltage can be reduced, and an external current can be easily supplied to the chip. Since the electrodes can be formed on the back surface of the substrate, the chip area can be reduced, and a gallium nitride based compound semiconductor light emitting device which is inexpensive and excellent in mass productivity can be manufactured.

【0084】<第4の実施の形態>図7を用いて、窒化
ガリウム系化合物半導体発光素子の本発明による第4の
実施の形態を説明する。
<Fourth Embodiment> A gallium nitride-based compound semiconductor light emitting device according to a fourth embodiment of the present invention will be described with reference to FIG.

【0085】図7は本発明の第4の実施の形態を用いて
作製した窒化ガリウム系化合物半導体発光素子の断面構
造図である。
FIG. 7 is a cross-sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the fourth embodiment of the present invention.

【0086】図7に示すように、本発明の素子構造は基
本的に第1の実施の形態の素子構造を、上下逆さまにし
た構成となっている。
As shown in FIG. 7, the element structure of the present invention basically has a structure in which the element structure of the first embodiment is turned upside down.

【0087】即ち、例えばサファイア基板41上に、N
型窒化ガリウム系化合物半導体層42、窒化ガリウム系
化合物半導体発光層43、P型窒化ガリウム系化合物半
導体層44が順次積層された積層構造体を形成する。こ
こで、基板41とN型窒化ガリウム系化合物半導体層4
2との間には、例えばSi,Ge,Sn,S,Se,T
e等のIV族又はVI族のN型不純物を、1×1017〜1×
1021cm-3の高濃度にドープしたN型窒化ガリウム系
化合物半導体層42aが形成されている。尚、前記発光
層は単一量子井戸,多重量子井戸発光層を含ものとす
る。又、本発明にはGaN,SiC等の導電性基板を用
いることもできるが、サファイア基板41等の絶縁性,
透光性の基板に用いた場合に本発明は最も効果を発揮す
る。
That is, for example, on a sapphire substrate 41, N
A stacked structure is formed in which the gallium nitride-based compound semiconductor layer 42, the gallium nitride-based compound semiconductor light emitting layer 43, and the p-type gallium nitride-based compound semiconductor layer 44 are sequentially stacked. Here, the substrate 41 and the N-type gallium nitride-based compound semiconductor layer 4
2, for example, Si, Ge, Sn, S, Se, T
e or another group IV or group VI N-type impurity in the range of 1 × 10 17 to 1 ×
An N-type gallium nitride-based compound semiconductor layer 42a doped at a high concentration of 10 21 cm -3 is formed. The light emitting layer includes a single quantum well and a multiple quantum well light emitting layer. In the present invention, a conductive substrate such as GaN or SiC can be used.
The present invention is most effective when used for a light-transmitting substrate.

【0088】P型窒化ガリウム系化合物半導体層44上
に、例えばリードフレームや回路配線基板等、外部との
電気的接続を行うためのオーム性電極45aが形成され
ている。このオーム性電極45aは、例えばNi−A
u,Au合金,Al等からなり、その厚さは、ボンデイ
ング時の電極剥がれが発生しなくするために0.5μm
以上100μm以下に形成する。尚、オーム性電極45
aとP型窒化ガリウム系化合物半導体層44との間に良
好な導電性を得る為にP型窒化ガリウム系化合物半導体
コンタクト層を形成しても良い。
On the P-type gallium nitride-based compound semiconductor layer 44, an ohmic electrode 45a for making an electrical connection with the outside such as a lead frame or a circuit wiring board is formed. The ohmic electrode 45a is made of, for example, Ni-A
u, Au alloy, Al, etc., and the thickness is 0.5 μm to prevent electrode peeling during bonding.
It is formed to have a thickness of at least 100 μm. The ohmic electrode 45
A P-type gallium nitride compound semiconductor contact layer may be formed between a and the P-type gallium nitride compound semiconductor layer 44 in order to obtain good conductivity.

【0089】基板41の裏面および側面とN型不純物が
高濃度にドープされたN型窒化ガリウム系化合物半導体
層42a上とに、透光性を有するオーム性金属薄膜46
および透光性を有する酸化物半導体層47が順次形成さ
れている。オーム性金属薄膜46には、例えばAu,N
i,Ti,Pt,Pd等を、真空蒸着法,電子ビーム蒸
着法等を用い、膜抵抗が小さく且つ透過率が大きいこと
を満足するため、その膜厚は1nm以上10nm以下に
形成する。酸化物半導体層47は、In23,Sn
2,ZnO,Cd2SnO4,CdSnO3のうちのひと
つからなり、蒸着法,スパツタ法,CVD法等を用いて
形成する。尚、酸化物半導体層47の膜厚は、基板側面
での膜厚と光の透過率を40%以上確保することを考慮
すると、好ましくは5μmから15μmの範囲がよい。
又、酸化物半導体層47としてTiを添加したIn23
を用いても膜抵抗、透過率が悪化しないためTiを添加
してもよい。
An ohmic metal thin film 46 having a light-transmitting property is formed on the back and side surfaces of the substrate 41 and on the N-type gallium nitride-based compound semiconductor layer 42a heavily doped with N-type impurities.
And a light-transmitting oxide semiconductor layer 47 are sequentially formed. For example, Au, N
i, Ti, Pt, Pd, etc. are formed to have a film thickness of 1 nm or more and 10 nm or less in order to satisfy a small film resistance and a large transmittance by using a vacuum evaporation method, an electron beam evaporation method, or the like. The oxide semiconductor layer 47 is made of In 2 O 3 , Sn
It is made of one of O 2 , ZnO, Cd 2 SnO 4 , and CdSnO 3 and is formed by using a vapor deposition method, a sputter method, a CVD method, or the like. Note that the thickness of the oxide semiconductor layer 47 is preferably in a range of 5 μm to 15 μm in consideration of securing the thickness on the side surface of the substrate and light transmittance of 40% or more.
In addition, Ti 2 -added In 2 O 3 is used for the oxide semiconductor layer 47.
Since Ti does not deteriorate the film resistance and transmittance even if Ti is used, Ti may be added.

【0090】酸化物半導体層47上の一部に、例えばリ
ードフレームや回路配線基板等、外部との電気的接続を
行うためのパッド電極45が形成されている。このパッ
ド電極45は、例えばAu,Au合金,Al等からな
り、その厚さは、ボンデイング時の電極剥がれが発生し
なくするために0.5μm以上0.8μm以下に形成す
る。パッド電極45と外部との電気的接続には、例えば
Au,Al,Cu等の金属ワイヤー48が用いられる。
一方、オーム性電極45aと外部との電気的接続には、
例えば半田,Agペースト,導電性接着剤等が用いられ
る。
A pad electrode 45 is formed on a part of the oxide semiconductor layer 47 for making an electrical connection with the outside such as a lead frame and a circuit wiring board. The pad electrode 45 is made of, for example, Au, an Au alloy, Al, or the like, and has a thickness of 0.5 μm or more and 0.8 μm or less in order to prevent electrode peeling during bonding. For electrical connection between the pad electrode 45 and the outside, a metal wire 48 of, for example, Au, Al, or Cu is used.
On the other hand, for the electrical connection between the ohmic electrode 45a and the outside,
For example, solder, Ag paste, conductive adhesive, or the like is used.

【0091】尚、図7ではパッド電極45が基板面上に
位置しているが、導通が取れるのであれば酸化物半導体
層47上の任意の場所に形成できる。又、パッド電極4
5直下は必ずしも酸化物半導体層47である必要はな
く、オーム性金属薄膜46上に形成しても良いし、或い
はその一部が半導体層上に直接形成されていても良い。
Although the pad electrode 45 is located on the substrate surface in FIG. 7, the pad electrode 45 can be formed at an arbitrary position on the oxide semiconductor layer 47 as long as conduction can be obtained. Also, pad electrode 4
It is not always necessary that the oxide semiconductor layer 47 immediately below 5 is formed, and the oxide semiconductor layer 47 may be formed on the ohmic metal thin film 46 or a part thereof may be formed directly on the semiconductor layer.

【0092】上記のように、基板裏面側を上部として利
用することにより、発光素子チップをリードフレームや
回路配線基板等に実装する際、実装面が略フラットにな
るので、実装が容易になると共に、登載制度の向上にも
寄与する。
As described above, by using the back surface of the substrate as the upper portion, the mounting surface becomes substantially flat when the light emitting element chip is mounted on a lead frame, a circuit wiring board, or the like. It also contributes to improving the registration system.

【0093】尚、上記構成での窒化ガリウム系化合物半
導体発光素子構造は、ホモ構造の発光素子について説明
したが、窒化ガリウム系化合物半導体発光素子であれ
ば、ダブルヘテロ構造、シングルヘテロ構造や活性層に
量子井戸構造等あらゆる構造に適用できることは言うま
でもない。
The gallium nitride-based compound semiconductor light-emitting device having the above structure has been described with reference to a light-emitting device having a homostructure. Needless to say, the present invention can be applied to any structure such as a quantum well structure.

【0094】<第5の実施の形態>図8乃至10を用い
て、窒化ガリウム系化合物半導体発光素子の本発明によ
る第5の実施の形態を説明する。
<Fifth Embodiment> A gallium nitride based compound semiconductor light emitting device according to a fifth embodiment of the present invention will be described with reference to FIGS.

【0095】図8は本発明の第5の実施の形態を用いて
作製した窒化ガリウム系化合物半導体発光素子の断面構
造図である。
FIG. 8 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the fifth embodiment of the present invention.

【0096】図9は本発明の第5の実施の形態を用いて
作製した窒化ガリウム系化合物半導体発光素子の実際の
縮尺に近い断面構造図である。
FIG. 9 is a sectional structure diagram of a gallium nitride based compound semiconductor light emitting device manufactured by using the fifth embodiment of the present invention, which is close to the actual scale.

【0097】図10は本発明の第5の実施の形態を用い
て作製した窒化ガリウム系化合物半導体発光素子をリー
ドフレームに登載した場合の断面模式図である。
FIG. 10 is a schematic sectional view showing a case where a gallium nitride-based compound semiconductor light emitting device manufactured by using the fifth embodiment of the present invention is mounted on a lead frame.

【0098】図8に示すように、本発明の素子構造は基
本的に第3の実施の形態の素子構造を、上下逆さまにし
た構成となっている。
As shown in FIG. 8, the element structure of the present invention basically has a structure in which the element structure of the third embodiment is turned upside down.

【0099】即ち、例えばサファイア基板51上に、N
型窒化ガリウム系化合物半導体層52、窒化ガリウム系
化合物半導体発光層53、P型窒化ガリウム系化合物半
導体層54が順次積層された積層構造体を形成する。こ
こで、基板51とN型窒化ガリウム系化合物半導体層5
2との間には、例えばSi,Ge,Sn,S,Se,T
e等のIV族又はVI族のN型不純物を、1×1017〜1×
1021cm-3の高濃度にドープしたN型窒化ガリウム系
化合物半導体層52aが形成されている。尚、前記発光
層は単一量子井戸,多重量子井戸発光層を含ものとす
る。又、本発明にはGaN,SiC等の導電性基板を用
いることもできるが、サファイア基板51等の絶縁性,
透光性の基板に用いた場合に本発明は最も効果を発揮す
る。
That is, for example, on the sapphire substrate 51, N
A stacked structure is formed in which a gallium nitride-based compound semiconductor layer 52, a gallium nitride-based compound semiconductor light emitting layer 53, and a p-type gallium nitride-based compound semiconductor layer 54 are sequentially stacked. Here, the substrate 51 and the N-type gallium nitride-based compound semiconductor layer 5
2, for example, Si, Ge, Sn, S, Se, T
e or another group IV or group VI N-type impurity in the range of 1 × 10 17 to 1 ×
An N-type gallium nitride-based compound semiconductor layer 52a doped at a high concentration of 10 21 cm -3 is formed. The light emitting layer includes a single quantum well and a multiple quantum well light emitting layer. In the present invention, a conductive substrate such as GaN or SiC can be used.
The present invention is most effective when used for a light-transmitting substrate.

【0100】P型窒化ガリウム系化合物半導体層54上
に、例えばリードフレームや回路配線基板等、外部との
電気的接続を行うためのオーム性電極55aが形成され
ている。このオーム性電極55aは、例えばNi−A
u,Au合金,Al等からなり、その厚さは、ボンデイ
ング時の電極剥がれが発生しなくするために0.5μm
以上100μm以下に形成する。尚、オーム性電極55
aとP型窒化ガリウム系化合物半導体層54との間に良
好な導電性を得る為にP型窒化ガリウム系化合物半導体
コンタクト層を形成しても良い。
On the P-type gallium nitride-based compound semiconductor layer 54, an ohmic electrode 55a for making an electrical connection with the outside such as a lead frame or a circuit wiring board is formed. The ohmic electrode 55a is made of, for example, Ni-A
u, Au alloy, Al, etc., and the thickness is 0.5 μm to prevent electrode peeling during bonding.
It is formed to have a thickness of at least 100 μm. The ohmic electrode 55
A P-type gallium nitride compound semiconductor contact layer may be formed between a and the P-type gallium nitride compound semiconductor layer 54 in order to obtain good conductivity.

【0101】基板51の裏面上とN型不純物が高濃度に
ドープされたN型窒化ガリウム系化合物半導体層52a
上とに、透光性を有するオーム性金属薄膜56が形成さ
れている。オーム性金属薄膜56には、例えばAu,N
i,Ti,Pt,Pd等を、真空蒸着法,電子ビーム蒸
着法等を用いて形成する。例えば、オーム性金属薄膜5
6としてPdを1〜3nm形成するか又は、TiとAu
とを各々2.5nm,1nm形成する。更に、基板51
の側面を含むオーム性金属薄膜56上に、透光性を有す
る酸化物半導体層57が形成されている。酸化物半導体
層57は、In 23,SnO2,ZnO,Cd2Sn
4,CdSnO3のうちのひとつからなり、蒸着法,ス
パツタ法,CVD法等を用いて形成する。尚、酸化物半
導体層57の膜厚は、基板側面での膜厚と光の透過率を
40%以上確保することを考慮すると、好ましくは5μ
mから15μmの範囲がよい。又、酸化物半導体層57
としてTiを添加したIn23を用いても膜抵抗、透過
率が悪化しないためTiを添加してもよい。
On the back surface of the substrate 51 and at a high concentration of N-type impurities
Doped N-type gallium nitride-based compound semiconductor layer 52a
An ohmic metal thin film 56 having a light-transmitting property is formed thereon.
Have been. For example, Au, N
i, Ti, Pt, Pd, etc. are deposited by vacuum evaporation, electron beam evaporation.
It is formed using a deposition method or the like. For example, ohmic metal thin film 5
6 to form Pd of 1 to 3 nm, or Ti and Au
And 2.5 nm and 1 nm, respectively. Further, the substrate 51
On the ohmic metal thin film 56 including the side surfaces of
Oxide semiconductor layer 57 is formed. Oxide semiconductor
Layer 57 comprises In TwoOThree, SnOTwo, ZnO, CdTwoSn
OFour, CdSnOThreeConsisting of one of
It is formed using a pattering method, a CVD method, or the like. In addition, oxide half
The thickness of the conductor layer 57 depends on the thickness on the side of the substrate and the light transmittance.
Considering securing 40% or more, preferably 5 μm
The range is preferably from m to 15 μm. In addition, the oxide semiconductor layer 57
In with Ti added asTwoOThreeEven if using membrane resistance, transmission
Since the rate does not deteriorate, Ti may be added.

【0102】酸化物半導体層57上の一部に、例えばリ
ードフレームや回路配線基板等、外部との電気的接続を
行うためのパッド電極55が形成されている。このパッ
ド電極55は、例えばAu,Au合金,Al等からな
り、その厚さは、ボンデイング時の電極剥がれが発生し
なくするために0.5μm以上0.8μm以下に形成す
る。パッド電極55と外部との電気的接続には、例えば
Au,Al,Cu等の金属ワイヤー58が用いられる。
一方、オーム性電極55aと外部との電気的接続には、
例えば半田,Agペースト,導電性接着剤等が用いられ
る。
A pad electrode 55 is formed on a part of the oxide semiconductor layer 57 for making electrical connection with the outside such as a lead frame and a circuit wiring board. The pad electrode 55 is made of, for example, Au, an Au alloy, Al, or the like, and has a thickness of 0.5 μm or more and 0.8 μm or less in order to prevent electrode peeling during bonding. For electrical connection between the pad electrode 55 and the outside, for example, a metal wire 58 of Au, Al, Cu or the like is used.
On the other hand, for the electrical connection between the ohmic electrode 55a and the outside,
For example, solder, Ag paste, conductive adhesive, or the like is used.

【0103】尚、図8ではパッド電極55が基板面上に
位置しているが、導通が取れるのであれば酸化物半導体
層57上の任意の場所に形成できる。又、パッド電極5
5直下は必ずしも酸化物半導体層57である必要はな
く、オーム性金属薄膜56上に形成しても良いし、或い
はその一部が半導体層上に直接形成されていても良い。
Although the pad electrode 55 is located on the substrate surface in FIG. 8, the pad electrode 55 can be formed at an arbitrary position on the oxide semiconductor layer 57 as long as conduction can be obtained. In addition, pad electrode 5
It is not always necessary that the oxide semiconductor layer 57 immediately below 5 is formed, and the oxide semiconductor layer 57 may be formed on the ohmic metal thin film 56 or a part thereof may be formed directly on the semiconductor layer.

【0104】上記のように、基板裏面側を上部として利
用することにより、発光素子チップをリードフレームや
回路配線基板等に実装する際、実装面が略フラットにな
るので、実装が容易になると共に、登載制度の向上にも
寄与する。又、基板51側面には透光性を有する酸化物
半導体層57のみが形成されているので、効率よく光を
外部へ取出すことができる。
As described above, by using the back surface of the substrate as the upper portion, the mounting surface becomes substantially flat when the light emitting element chip is mounted on a lead frame, a circuit wiring board, or the like. It also contributes to improving the registration system. Further, since only the light-transmitting oxide semiconductor layer 57 is formed on the side surface of the substrate 51, light can be efficiently extracted to the outside.

【0105】尚、上記構成での窒化ガリウム系化合物半
導体発光素子構造は、ホモ構造の発光素子について説明
したが、窒化ガリウム系化合物半導体発光素子であれ
ば、ダブルヘテロ構造、シングルヘテロ構造や活性層に
量子井戸構造等あらゆる構造に適用できることは言うま
でもない。
The gallium nitride-based compound semiconductor light emitting device having the above structure has been described as a light emitting device having a homo structure. However, a gallium nitride based compound semiconductor light emitting device having a double hetero structure, a single hetero structure or an active layer may be used. Needless to say, the present invention can be applied to any structure such as a quantum well structure.

【0106】図9は、本発明の第5の実施の形態を用い
て作製した窒化ガリウム系化合物半導体発光素子チップ
を略実際形状に近い縮尺の断面形状で示している。
FIG. 9 shows a gallium nitride-based compound semiconductor light emitting device chip manufactured by using the fifth embodiment of the present invention in a cross-sectional shape on a scale close to a substantially actual shape.

【0107】図9に示すように、実際の発光素子チップ
は半導体層部分59,オーム性金属薄膜56,酸化物半
導体層57に比べて基板51の厚みが圧倒的に大きな形
状を呈している。従って、基板51の裏面上とN型不純
物が高濃度にドープされたN型窒化ガリウム系化合物半
導体層52a上とに、透光性を有するオーム性金属薄膜
56を形成すると、オーム性金属薄膜56の膜厚は特に
薄くなり、島状なったりあるいは形成されていない領域
存在する。この場合でも、オーム性金属薄膜56上には
酸化物半導体層57が形成されているので、導電性は充
分に確保されている。又、仮にオーム性金属薄膜56の
膜厚が厚くなり、一部不透光性のオーム性金属電極にな
ったとしても光は充分に外部に放射される。更に、基板
51の側面には酸化物半導体層57のみが形成されてい
るので、光は遮られることなく基板51の側面から放出
される。
As shown in FIG. 9, the actual light emitting element chip has an overwhelmingly larger shape of the substrate 51 than the semiconductor layer portion 59, the ohmic metal thin film 56, and the oxide semiconductor layer 57. Therefore, when the translucent ohmic metal thin film 56 is formed on the back surface of the substrate 51 and on the N-type gallium nitride-based compound semiconductor layer 52a highly doped with N-type impurities, the ohmic metal thin film 56 Is particularly thin, and there are island-shaped or non-formed regions. Also in this case, since the oxide semiconductor layer 57 is formed on the ohmic metal thin film 56, the conductivity is sufficiently ensured. Even if the ohmic metal thin film 56 becomes thicker and becomes a partially opaque ohmic metal electrode, light is sufficiently radiated to the outside. Further, since only the oxide semiconductor layer 57 is formed on the side surface of the substrate 51, light is emitted from the side surface of the substrate 51 without being blocked.

【0108】図10は、本発明の第5の実施の形態を用
いて作製した窒化ガリウム系化合物半導体発光素子チッ
プを外部との電気的接続を行う目的でリードフレームに
登載した例を示している。
FIG. 10 shows an example in which a gallium nitride-based compound semiconductor light emitting device chip manufactured by using the fifth embodiment of the present invention is mounted on a lead frame for the purpose of electrical connection with the outside. .

【0109】図10に示すように、基板側面51aから
放射される光は遮られることなくリードフレーム59の
カップ59aに対して放射され、上方に光が放射され
る。このため、外部発光効率を低減することなく基板面
側から光を取り出す窒化ガリウム系化合物半導体発光素
子が容易に作製できる。
As shown in FIG. 10, the light radiated from the side surface 51a of the substrate is radiated to the cup 59a of the lead frame 59 without being interrupted, and the light is radiated upward. Therefore, a gallium nitride-based compound semiconductor light-emitting device that extracts light from the substrate surface side without reducing external luminous efficiency can be easily manufactured.

【0110】上記構成によれば、基板裏面および側面を
透光面として利用でき、更に基板裏面電極を透光性を有
するオーム性金属薄膜にて形成しているため、が遮られ
ることがなく基板裏面および側面から外部に光を有効に
放射でき、外部への光取出し効率が良好で、発光出力が
増加できると共に、チップ面積を縮小でき、安価で量産
性に優れた窒化ガリウム系化合物半導体発光素子が作製
できる。
According to the above configuration, the back and side surfaces of the substrate can be used as a light-transmitting surface, and the substrate back surface electrode is formed of a translucent ohmic metal thin film. A gallium nitride-based compound semiconductor light emitting device that can effectively emit light to the outside from the back and side surfaces, has good light extraction efficiency to the outside, can increase light emission output, can reduce the chip area, is inexpensive, and has excellent mass productivity Can be produced.

【0111】<第6の実施の形態>図11を用いて、窒
化ガリウム系化合物半導体発光素子の本発明による第5
の実施の形態を説明する。
<Sixth Embodiment> Referring to FIG. 11, a fifth embodiment of a gallium nitride based compound semiconductor light emitting device according to the present invention will be described.
An embodiment will be described.

【0112】図11は本発明の第5の実施の形態を用い
て作製した窒化ガリウム系化合物半導体発光素子の断面
構造図である。
FIG. 11 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device manufactured by using the fifth embodiment of the present invention.

【0113】図11に示すように、本発明の素子構造は
基板61の裏面および側面とN型不純物が高濃度にドー
プされたN型窒化ガリウム系化合物半導体層62a上と
に、透光性を有するオーム性金属薄膜が形成されていな
い以外は基本的に第4の実施の形態の素子構造と同一で
ある。
As shown in FIG. 11, the device structure of the present invention has a light-transmitting property on the back and side surfaces of the substrate 61 and on the N-type gallium nitride-based compound semiconductor layer 62a heavily doped with N-type impurities. The element structure is basically the same as that of the fourth embodiment except that no ohmic metal thin film is formed.

【0114】本構成によれば基板61面を透光面として
利用すると共に、透光性を有する酸化物半導体層67
を、基板61の裏面および側面とN型不純物が高濃度に
ドープされたN型窒化ガリウム系化合物半導体層62a
上とに直接形成しているため、オーム性金属薄膜を形成
する工程が不要となりより簡便に基板裏面電極を形成す
ることができる。
According to this structure, the surface of the substrate 61 is used as a light-transmitting surface, and the light-transmitting oxide semiconductor layer 67 is used.
The N-type gallium nitride-based compound semiconductor layer 62a doped with the N-type impurity at a high concentration
Since it is formed directly on the upper side, the step of forming an ohmic metal thin film is not required, and the substrate back surface electrode can be formed more easily.

【0115】但し、発光素子の順方向電圧は他の本発明
の実施の形態による発光素子に比較して0.5V程度高
くなる。しかしながら、オーム性金属薄膜が形成されて
いないため、他の実施例より基板裏面側から外部に光を
有効に放射できるので、外部への光取出し効率が良好
で、発光出力が増加できると共に、チップ面積を縮小で
き、安価で量産性に優れた窒化ガリウム系化合物半導体
発光素子が作製できる。
However, the forward voltage of the light emitting element is higher by about 0.5 V than the light emitting element according to the other embodiments of the present invention. However, since the ohmic metal thin film is not formed, light can be more effectively emitted from the back side of the substrate to the outside than in the other embodiments, so that light extraction efficiency to the outside is good, the light emission output can be increased, and the chip can be increased. A gallium nitride-based compound semiconductor light emitting device which can be reduced in area, inexpensive and excellent in mass productivity can be manufactured.

【0116】[0116]

【発明の効果】本発明によれば、窒化ガリウム系化合物
半導体発光素子において、従来同一面上に形成する必要
のあったパッド電極の片方を、基板裏面に形成すること
ができるので、パッド電極間の短絡不良やワイヤーボン
ディング工程の際に生じていた外観不良等を防止するこ
とが可能になる。又、発光素子チップの面積を面積を小
さくすることができるので、1枚のウエハーから取れる
チップ数を増加させることが可能になる。従って、素子
特性,信頼性,歩留まり向上が計れ、最終製品の価格を
低減することができる。更に、第一導電型窒化ガリウム
系化合物半導体層側での電流の広がりを確保すると共
に、良好なオーミック接続が得られ、発光効率の向上が
可能になる。従って、基板直下の発光および全体として
の光の外部取出し効率が向上する。
According to the present invention, in the gallium nitride-based compound semiconductor light emitting device, one of the pad electrodes, which had conventionally been required to be formed on the same surface, can be formed on the back surface of the substrate. Short-circuit failure and appearance defect or the like that occurred during the wire bonding step can be prevented. Further, since the area of the light emitting element chip can be reduced, the number of chips that can be obtained from one wafer can be increased. Therefore, the device characteristics, reliability, and yield can be improved, and the price of the final product can be reduced. Further, the spread of current on the first conductivity type gallium nitride-based compound semiconductor layer side is ensured, a good ohmic connection is obtained, and the emission efficiency can be improved. Accordingly, the efficiency of light emission immediately below the substrate and the overall light extraction efficiency is improved.

【0117】又、基板裏面全体を外部との電気的接続に
利用できるので、発光素子チップ搭載用のリードフレー
ムや実装基板との間に隙間による外部との電気的な接続
不良は発生しない。従って、素子特性,信頼性,歩留ま
りの向上が達成される。又、リードフレームや実装基板
に特殊な加工を施す必要がなくなり、従来のリードフレ
ームや実装基板をそのまま利用することが可能になる。
従って、製造コストの低減もできる。
Further, since the entire back surface of the substrate can be used for electrical connection with the outside, there is no occurrence of poor electrical connection with the outside due to a gap between the lead frame for mounting the light emitting element chip and the mounting substrate. Therefore, improvements in element characteristics, reliability, and yield are achieved. Further, it is not necessary to perform special processing on the lead frame or the mounting board, and the conventional lead frame or mounting board can be used as it is.
Therefore, the manufacturing cost can be reduced.

【0118】又、第一導電型窒化ガリウム系化合物半導
体層および第二導電型窒化ガリウム系化合物半導体層の
両側での電流の広がりを確保すると共に、電流の流れに
くい基板面上部分にも均一に電流が拡散するので、全体
に均一な発光が行われ、発光効率の向上が可能になる。
従って、基板直下の発光および全体としての光の外部取
出し効率が向上する。
In addition, the spread of current on both sides of the gallium nitride-based compound semiconductor layer of the first conductivity type and the gallium nitride-based compound semiconductor layer of the second conductivity type is ensured, and evenly on the substrate surface where current does not easily flow. Since the current is diffused, uniform light emission is performed as a whole, and light emission efficiency can be improved.
Therefore, the efficiency of light emission immediately below the substrate and the overall light extraction efficiency is improved.

【0119】又、オーム性電極として酸化物半導体層を
単独で用いると、若干の順方向電圧は増加するが、オー
ム性金属電極を形成しなくてよいので製造工程が簡略化
される。
When the oxide semiconductor layer is used alone as the ohmic electrode, the forward voltage slightly increases, but the manufacturing process is simplified because the ohmic metal electrode need not be formed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】第1の実施の形態の窒化ガリウム系化合物半導
体発光素子の断面構造図である。
FIG. 1 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a first embodiment.

【図2】(a)乃至(c)は本発明の第1の実施の形態
の窒化ガリウム系化合物半導体発光素子の製造方法を示
す工程図である。
FIGS. 2A to 2C are process diagrams illustrating a method for manufacturing a gallium nitride-based compound semiconductor light emitting device according to the first embodiment of the present invention.

【図3】第2の実施の形態の窒化ガリウム系化合物半導
体発光素子の断面構造図である。
FIG. 3 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a second embodiment.

【図4】(a)乃至(c)は本発明の第2の実施の形態
の窒化ガリウム系化合物半導体発光素子の製造方法を示
す工程図である。
FIGS. 4A to 4C are process diagrams illustrating a method for manufacturing a gallium nitride-based compound semiconductor light emitting device according to a second embodiment of the present invention.

【図5】第3の実施の形態の窒化ガリウム系化合物半導
体発光素子の断面構造図である。
FIG. 5 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a third embodiment.

【図6】(a)乃至(c)は本発明の第3の実施の形態
の窒化ガリウム系化合物半導体発光素子の製造方法を示
す工程図である。
FIGS. 6A to 6C are process diagrams showing a method for manufacturing a gallium nitride-based compound semiconductor light emitting device according to a third embodiment of the present invention.

【図7】第4の実施の形態の窒化ガリウム系化合物半導
体発光素子の断面構造図である。
FIG. 7 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a fourth embodiment.

【図8】第5の実施の形態の窒化ガリウム系化合物半導
体発光素子の断面構造図である。
FIG. 8 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a fifth embodiment.

【図9】第5の実施の形態の窒化ガリウム系化合物半導
体発光素子の実際の縮尺に近い断面構造図である。
FIG. 9 is a cross-sectional view of a gallium nitride-based compound semiconductor light emitting device according to a fifth embodiment, which is close to the actual scale.

【図10】第5の実施の形態の窒化ガリウム系化合物半
導体発光素子をリードフレームに登載した場合の断面模
式図である。
FIG. 10 is a schematic cross-sectional view when a gallium nitride-based compound semiconductor light emitting device according to a fifth embodiment is mounted on a lead frame.

【図11】第6の実施の形態の窒化ガリウム系化合物半
導体発光素子の断面構造図である。
FIG. 11 is a sectional structural view of a gallium nitride-based compound semiconductor light emitting device according to a sixth embodiment.

【図12】従来の窒化ガリウム系化合物半導体発光素子
の断面構造図である。
FIG. 12 is a sectional structural view of a conventional gallium nitride-based compound semiconductor light emitting device.

【図13】他の従来の窒化ガリウム系化合物半導体発光
素子の断面構造図である。
FIG. 13 is a sectional structural view of another conventional gallium nitride-based compound semiconductor light emitting device.

【図14】別の他の従来の窒化ガリウム系化合物半導体
発光素子の断面構造図である。
FIG. 14 is a sectional structural view of another conventional gallium nitride-based compound semiconductor light emitting device.

【符号の説明】[Explanation of symbols]

1 基板 2 N型窒化ガリウム系化合物半導体層 2a 高濃度のN型不純物を含む層 3 窒化ガリウム系化合物半導体発光層 4 P型窒化ガリウム系化合物半導体層 5 パッド電極 6 オーム性金属薄膜 7 酸化物半導体層 8 金属ワイヤー DESCRIPTION OF SYMBOLS 1 Substrate 2 N-type gallium nitride compound semiconductor layer 2a Layer containing high concentration N-type impurity 3 Gallium nitride compound semiconductor light emitting layer 4 P-type gallium nitride compound semiconductor layer 5 Pad electrode 6 Ohmic metal thin film 7 Oxide semiconductor Layer 8 metal wire

───────────────────────────────────────────────────── フロントページの続き (72)発明者 神川 剛 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 (72)発明者 山本 健作 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 Fターム(参考) 5F041 AA03 AA05 AA25 AA41 AA43 CA02 CA03 CA04 CA05 CA34 CA40 CA46 CA57 CA74 CA76 CA82 CA83 CA93 CA98 DA02 DA03 DA08 DA18 DA26  ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Tsuyoshi Kankawa 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka Inside Sharp Corporation (72) Inventor Kensaku Yamamoto 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka F term in reference (reference) 5F041 AA03 AA05 AA25 AA41 AA43 CA02 CA03 CA04 CA05 CA34 CA40 CA46 CA57 CA74 CA76 CA82 CA83 CA93 CA98 DA02 DA03 DA08 DA18 DA26

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 基板上に形成され少なくとも第一導電型
窒化ガリウム系化合物半導体層、発光層、第二導電型窒
化ガリウム系化合物半導体層を有する積層構造体からな
る窒化ガリウム系化合物半導体発光素子において、 前記基板と前記第一導電型窒化ガリウム系化合物半導体
層との間に高濃度の第一導電型不純物を含む層が形成さ
れ、前記積層構造体が形成された面と反対側の前記基板
裏面の一部が、少なくとも前記高濃度の第一導電型不純
物を含む層に達する深さまで除去されると共に、前記基
板裏面上および前記高濃度の第一導電型不純物を含む層
上にオーム性電極が形成されていることを特徴とする窒
化ガリウム系化合物半導体発光素子。
1. A gallium nitride-based compound semiconductor light-emitting device formed on a substrate and having a laminated structure having at least a first conductivity-type gallium nitride-based compound semiconductor layer, a light-emitting layer, and a second conductivity-type gallium nitride-based compound semiconductor layer. A layer containing a high-concentration first-conductivity-type impurity is formed between the substrate and the first-conductivity-type gallium nitride-based compound semiconductor layer, and the back surface of the substrate opposite to the surface on which the multilayer structure is formed; Is removed to a depth that reaches at least the layer containing the high concentration first conductivity type impurity, and an ohmic electrode is formed on the substrate back surface and on the layer containing the high concentration first conductivity type impurity. A gallium nitride-based compound semiconductor light emitting device, which is formed.
【請求項2】 前記オーム性電極は、前記基板裏面上と
前記高濃度の第一導電型不純物を含む層との段差側面上
にも連続的に形成されていることを特徴とする請求項1
に記載の窒化ガリウム系化合物半導体発光素子。
2. The semiconductor device according to claim 1, wherein the ohmic electrode is continuously formed also on a step side surface between the back surface of the substrate and the layer containing the high-concentration first conductivity type impurity.
3. The gallium nitride-based compound semiconductor light-emitting device according to item 1.
【請求項3】 基板上に形成され少なくとも第一導電型
窒化ガリウム系化合物半導体層、発光層、第二導電型窒
化ガリウム系化合物半導体層を有する積層構造体からな
る窒化ガリウム系化合物半導体発光素子において、 前記基板と前記第一導電型窒化ガリウム系化合物半導体
層との間に高濃度の第一導電型不純物を含む層が形成さ
れ、前記積層構造体が形成された面と反対側の前記基板
裏面の一部が、少なくとも前記第一導電型窒化ガリウム
系化合物半導体層に達する深さまで除去されると共に、
前記基板裏面上および前記第一導電型窒化ガリウム系化
合物半導体層の裏面上と前記第二導電型窒化ガリウム系
化合物半導体層上とにオーム性電極が形成されているこ
とを特徴とする窒化ガリウム系化合物半導体発光素子。
3. A gallium nitride-based compound semiconductor light emitting device formed on a substrate and having a laminated structure having at least a first conductivity type gallium nitride-based compound semiconductor layer, a light emitting layer, and a second conductivity type gallium nitride-based compound semiconductor layer. A layer containing a high-concentration first-conductivity-type impurity is formed between the substrate and the first-conductivity-type gallium nitride-based compound semiconductor layer, and the back surface of the substrate opposite to the surface on which the multilayer structure is formed; Is removed at least to a depth reaching the first conductivity type gallium nitride-based compound semiconductor layer,
An ohmic electrode is formed on the back surface of the substrate, on the back surface of the gallium nitride-based compound semiconductor layer of the first conductivity type, and on the gallium nitride-based compound semiconductor layer of the second conductivity type. Compound semiconductor light emitting device.
【請求項4】 前記オーム性金属電極は、前記オーム性
金属電極上および前記第一導電型窒化ガリウム系化合物
半導体層上に形成されると共に、前記基板裏面上と前記
高濃度の第一導電型不純物を含む層との側面上にも連続
的に形成されていることを特徴とする請求項3に記載の
窒化ガリウム系化合物半導体発光素子。
4. The ohmic metal electrode is formed on the ohmic metal electrode and on the first conductivity type gallium nitride-based compound semiconductor layer, and on the back surface of the substrate and the high concentration first conductivity type. The gallium nitride-based compound semiconductor light emitting device according to claim 3, wherein the gallium nitride-based compound semiconductor light emitting device is also formed continuously on the side surface of the layer containing the impurity.
【請求項5】 前記オーム性電極は、オーム性金属電極
と透光性を有する酸化物半導体層との多層構造により形
成されていることを特徴とする請求項1乃至4のいずれ
かに記載の窒化ガリウム系化合物半導体発光素子。
5. The ohmic electrode according to claim 1, wherein the ohmic electrode has a multilayer structure including an ohmic metal electrode and a light-transmitting oxide semiconductor layer. Gallium nitride based compound semiconductor light emitting device.
【請求項6】 前記オーム性金属電極は、少なくとも前
記基板裏面上および前記高濃度の第一導電型不純物を含
む層上に形成され、且つ前記酸化物半導体層は、前記オ
ーム性金属電極上に形成されると共に、前記基板裏面上
と前記高濃度の第一導電型不純物を含む層との段差側面
上にも連続的に形成されていることを特徴とする請求項
5に記載の窒化ガリウム系化合物半導体発光素子。
6. The ohmic metal electrode is formed at least on the back surface of the substrate and on a layer containing the high-concentration first conductivity type impurity, and the oxide semiconductor layer is formed on the ohmic metal electrode. The gallium nitride-based material according to claim 5, wherein the gallium nitride-based material is formed continuously on a step side surface between the back surface of the substrate and the layer containing the high concentration first conductivity type impurity. Compound semiconductor light emitting device.
【請求項7】 前記オーム性金属電極は、少なくとも前
記基板裏面上および前記第一導電型窒化ガリウム系化合
物半導体層上に形成され、且つ前記酸化物半導体層は、
前記オーム性金属電極上および前記第一導電型窒化ガリ
ウム系化合物半導体層上に形成されると共に、前記基板
裏面上と前記高濃度の第一導電型不純物を含む層との側
面上にも連続的に形成されていることを特徴とする請求
項5に記載の窒化ガリウム系化合物半導体発光素子。
7. The ohmic metal electrode is formed at least on the back surface of the substrate and on the first conductivity type gallium nitride-based compound semiconductor layer, and the oxide semiconductor layer comprises:
It is formed on the ohmic metal electrode and on the first conductivity type gallium nitride-based compound semiconductor layer, and continuously on the back surface of the substrate and on the side surface of the layer containing the high concentration first conductivity type impurity. The gallium nitride-based compound semiconductor light emitting device according to claim 5, wherein the light emitting device is formed of:
【請求項8】 前記オーム性金属電極は、透光性を有す
るオーム性金属薄膜からなることを特徴とする請求項5
乃至7のいずれかに記載の窒化ガリウム系化合物半導体
発光素子。
8. The method according to claim 5, wherein the ohmic metal electrode is formed of a translucent ohmic metal thin film.
8. The gallium nitride-based compound semiconductor light-emitting device according to any one of items 1 to 7.
【請求項9】 基板上に形成され少なくとも第一導電型
窒化ガリウム系化合物半導体層、発光層、第二導電型窒
化ガリウム系化合物半導体層を有する積層構造体からな
る窒化ガリウム系化合物半導体発光素子の製造方法にお
いて、 前記基板と前記第一導電型窒化ガリウム系化合物半導体
層との間に高濃度の第一導電型不純物を含む層を形成す
る工程と、 前記積層構造体が形成された面と反対側の前記基板裏面
の一部を、少なくとも前記高濃度の第一導電型不純物を
含む層に達する深さまで除去する工程と、 前記基板裏面上および前記高濃度の第一導電型不純物を
含む層上にオーム性電極を形成する工程とを有すること
を特徴とする窒化ガリウム系化合物半導体発光素子の製
造方法。
9. A gallium nitride-based compound semiconductor light emitting device comprising a laminated structure formed on a substrate and having at least a first conductivity type gallium nitride-based compound semiconductor layer, a light emitting layer, and a second conductivity type gallium nitride-based compound semiconductor layer. In the manufacturing method, a step of forming a layer containing high-concentration first-conductivity-type impurities between the substrate and the first-conductivity-type gallium nitride-based compound semiconductor layer; and opposing a surface on which the laminated structure is formed. Removing a part of the substrate backside at least to a depth that reaches the layer containing the high-concentration first conductivity-type impurity, on the substrate backside and on the layer containing the high-concentration first conductivity-type impurity Forming a gallium nitride-based compound semiconductor light emitting device.
JP28632799A 1999-10-07 1999-10-07 Gallium nitride compound semiconductor light emitting device and manufacturing method thereof Pending JP2001111106A (en)

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WO2003044872A1 (en) * 2001-11-19 2003-05-30 Sanyo Electric Co., Ltd. Compound semiconductor light emitting device and its manufacturing method
JP2004343139A (en) * 2001-11-19 2004-12-02 Sanyo Electric Co Ltd Compound semiconductor light emitting element
JP2005005727A (en) * 2001-11-19 2005-01-06 Sanyo Electric Co Ltd Compound semiconductor light emitting device
US7063995B2 (en) 2001-09-07 2006-06-20 Sharp Kabushiki Kaisha Nitride semiconductor light emitting device and manufacturing method thereof
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US7063995B2 (en) 2001-09-07 2006-06-20 Sharp Kabushiki Kaisha Nitride semiconductor light emitting device and manufacturing method thereof
US7276742B2 (en) 2001-11-19 2007-10-02 Sanyo Electric Co., Ltd. Compound semiconductor light emitting device and its manufacturing method
JPWO2003044872A1 (en) * 2001-11-19 2005-03-24 三洋電機株式会社 Compound semiconductor light emitting device
JP2004343139A (en) * 2001-11-19 2004-12-02 Sanyo Electric Co Ltd Compound semiconductor light emitting element
WO2003044872A1 (en) * 2001-11-19 2003-05-30 Sanyo Electric Co., Ltd. Compound semiconductor light emitting device and its manufacturing method
JP2005005727A (en) * 2001-11-19 2005-01-06 Sanyo Electric Co Ltd Compound semiconductor light emitting device
JP4542508B2 (en) * 2005-09-15 2010-09-15 晶元光電股▲ふん▼有限公司 Vertical light emitting diode and manufacturing method thereof
JP2007081360A (en) * 2005-09-15 2007-03-29 Epitech Technology Corp Vertical type light emitting diode and its manufacture
JP2013034010A (en) * 2006-02-16 2013-02-14 Lg Electronics Inc Vertical light-emitting device
JP2010192701A (en) * 2009-02-18 2010-09-02 Showa Denko Kk Light emitting diode, light emitting diode lamp, and method of manufacturing the light emitting diode
CN102318094A (en) * 2009-02-18 2012-01-11 昭和电工株式会社 Light-emitting diode, light-emitting diode lamp, and method for producing light-emitting diode
WO2010095361A1 (en) * 2009-02-18 2010-08-26 昭和電工株式会社 Light-emitting diode, light-emitting diode lamp, and method for producing light-emitting diode
JP2013510434A (en) * 2009-11-03 2013-03-21 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア High-intensity light-emitting diode with zinc oxide layer coated on multiple surfaces in low temperature aqueous solution
CN108133984A (en) * 2018-01-30 2018-06-08 厦门乾照光电股份有限公司 A kind of light emitting diode with vertical structure and preparation method thereof
CN108133984B (en) * 2018-01-30 2020-05-19 厦门乾照光电股份有限公司 Vertical structure light-emitting diode and manufacturing method thereof

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