JPS602873U - Soldering structure of surface mount transistor - Google Patents

Soldering structure of surface mount transistor

Info

Publication number
JPS602873U
JPS602873U JP9544283U JP9544283U JPS602873U JP S602873 U JPS602873 U JP S602873U JP 9544283 U JP9544283 U JP 9544283U JP 9544283 U JP9544283 U JP 9544283U JP S602873 U JPS602873 U JP S602873U
Authority
JP
Japan
Prior art keywords
electrode
electrode pattern
surface mount
pattern
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9544283U
Other languages
Japanese (ja)
Inventor
西本 博也
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP9544283U priority Critical patent/JPS602873U/en
Publication of JPS602873U publication Critical patent/JPS602873U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第5図は従来例に係り、第1図a。 b、  cは夫々面実装トランジスタの側面図と上面図
と裏面図、第2図は基板上の電極パターンを概略的に示
す図、第3図は面実装トランジスタの半田付けを示す図
でありaは平面図、bは側面図である。第4図は、半田
クリームの表面張力により面実装トランジスタの位置が
ズした状態を表わす、−図、第5図は面実装トランジス
タの位置ズレを防ぐ従来例を示す図、第6図乃至第8図
は本考案の一実施例に係り、第6図は本考案の電極パタ
ーンを概略的に示す図、第7図は本考案の半田付は構造
を示す平面図、第8図は本考案の半田付は構造を示す側
面図である。 1・・・・・・面実装トランジスタ、2・・・・・・コ
レクタ電極(ヘッダ部)、3・・・・・・ベース電極、
4・・・・・・エミッタ電極、5・・・・・・第1のt
t電極パターン6・・・・・・第2の電極パターン、7
・・・・・・第3の電極パターン、7a・・・・・・第
3の電極パターンの端部、7b・・・・・・突出部、8
・・・・・・基板。
1 to 5 relate to a conventional example, and FIG. 1a shows a conventional example. b, c are a side view, top view, and back view of a surface mount transistor, respectively, FIG. 2 is a diagram schematically showing the electrode pattern on the board, and FIG. 3 is a diagram showing soldering of the surface mount transistor. is a plan view, and b is a side view. Figure 4 shows a state in which the position of a surface-mounted transistor has shifted due to the surface tension of the solder cream. The figures relate to an embodiment of the present invention, FIG. 6 is a diagram schematically showing the electrode pattern of the present invention, FIG. 7 is a plan view showing the soldering structure of the present invention, and FIG. 8 is a diagram showing the soldering structure of the present invention. Soldering is a side view showing the structure. 1...Surface mount transistor, 2...Collector electrode (header part), 3...Base electrode,
4... Emitter electrode, 5... First t
t-electrode pattern 6...Second electrode pattern, 7
......Third electrode pattern, 7a...End of third electrode pattern, 7b...Protrusion, 8
······substrate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ベース電極、エミッタ電極、及び放熱フィンを兼ねた比
較的大きなコレクタ電極を備える面実装トランジスタと
、前記ベース電極が半田付けされる第1の電極パターン
と、前記エミッタ電極が半田付けされる第2の電極パタ
ーンと、前記ベース電極及びエミッタ電極とは反対側の
位置に形成されたコレクタ電極が半田付けされる比較的
大きな第3の電極パターンと、前記3つの電極パターン
が配された基板より成る面実装トランジスタの半田付は
構造に於いて、前記第3の電極パターンの前記第1の電
極パターン及び第2の電極パターンより最も遠方に位置
する端部に、前記第3の電極パターンの端部から前記第
1の電極パターン及び前記第2の電極パターンと反対方
向に延びる幅狭の突出部を設けたことを特徴とする面実
装トランジスタの半田付は構造。
A surface mount transistor includes a base electrode, an emitter electrode, and a relatively large collector electrode that also serves as a heat dissipation fin, a first electrode pattern to which the base electrode is soldered, and a second electrode pattern to which the emitter electrode is soldered. a surface consisting of an electrode pattern, a relatively large third electrode pattern to which a collector electrode formed at a position opposite to the base electrode and emitter electrode is soldered, and a substrate on which the three electrode patterns are arranged; In the structure, soldering of the mounted transistor is performed from the end of the third electrode pattern to the end of the third electrode pattern that is located farthest from the first electrode pattern and the second electrode pattern. A soldering structure for a surface mount transistor, characterized in that a narrow protrusion extending in a direction opposite to the first electrode pattern and the second electrode pattern is provided.
JP9544283U 1983-06-20 1983-06-20 Soldering structure of surface mount transistor Pending JPS602873U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9544283U JPS602873U (en) 1983-06-20 1983-06-20 Soldering structure of surface mount transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9544283U JPS602873U (en) 1983-06-20 1983-06-20 Soldering structure of surface mount transistor

Publications (1)

Publication Number Publication Date
JPS602873U true JPS602873U (en) 1985-01-10

Family

ID=30227921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9544283U Pending JPS602873U (en) 1983-06-20 1983-06-20 Soldering structure of surface mount transistor

Country Status (1)

Country Link
JP (1) JPS602873U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317016A (en) * 1989-05-19 1991-01-25 F Hoffmann La Roche Ag Treating agent for neurotic condition of disease
JP5017472B1 (en) * 2011-03-16 2012-09-05 株式会社東芝 Electronics
WO2019012849A1 (en) * 2017-07-11 2019-01-17 日立オートモティブシステムズ株式会社 Electronic circuit board

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317016A (en) * 1989-05-19 1991-01-25 F Hoffmann La Roche Ag Treating agent for neurotic condition of disease
JP5017472B1 (en) * 2011-03-16 2012-09-05 株式会社東芝 Electronics
US8605446B2 (en) 2011-03-16 2013-12-10 Kabushiki Kaisha Toshiba Electronic apparatus
WO2019012849A1 (en) * 2017-07-11 2019-01-17 日立オートモティブシステムズ株式会社 Electronic circuit board
JPWO2019012849A1 (en) * 2017-07-11 2020-04-02 日立オートモティブシステムズ株式会社 Electronic circuit board
US11096285B2 (en) 2017-07-11 2021-08-17 Hitachi Automotive Systems, Ltd. Electronic circuit substrate

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