JPS6027024A - 演算装置 - Google Patents

演算装置

Info

Publication number
JPS6027024A
JPS6027024A JP58134586A JP13458683A JPS6027024A JP S6027024 A JPS6027024 A JP S6027024A JP 58134586 A JP58134586 A JP 58134586A JP 13458683 A JP13458683 A JP 13458683A JP S6027024 A JPS6027024 A JP S6027024A
Authority
JP
Japan
Prior art keywords
multiplier
adder
output
bit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58134586A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0519170B2 (fr
Inventor
Katsuhiko Ueda
勝彦 上田
Takashi Sakao
坂尾　隆
Haruyasu Yamada
山田　晴保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58134586A priority Critical patent/JPS6027024A/ja
Publication of JPS6027024A publication Critical patent/JPS6027024A/ja
Publication of JPH0519170B2 publication Critical patent/JPH0519170B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
JP58134586A 1983-07-22 1983-07-22 演算装置 Granted JPS6027024A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58134586A JPS6027024A (ja) 1983-07-22 1983-07-22 演算装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58134586A JPS6027024A (ja) 1983-07-22 1983-07-22 演算装置

Publications (2)

Publication Number Publication Date
JPS6027024A true JPS6027024A (ja) 1985-02-12
JPH0519170B2 JPH0519170B2 (fr) 1993-03-16

Family

ID=15131835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58134586A Granted JPS6027024A (ja) 1983-07-22 1983-07-22 演算装置

Country Status (1)

Country Link
JP (1) JPS6027024A (fr)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6177964A (ja) * 1984-09-25 1986-04-21 Ricoh Co Ltd デジタル信号処理装置
EP0209049A2 (fr) * 1985-07-09 1987-01-21 Nec Corporation Circuit de traitement capable d'augmenter le débit d'accumulation
JPS6398071A (ja) * 1986-10-14 1988-04-28 Nec Corp 演算回路
JPS63157269A (ja) * 1986-12-22 1988-06-30 Nec Corp 演算回路
JP2007131128A (ja) * 2005-11-10 2007-05-31 Fuji Electric Systems Co Ltd 鉄道車両用電力変換装置
JP2008302932A (ja) * 2008-09-22 2008-12-18 Hitachi Ltd 鉄道車両用床下電気品の車体実装方式
US8376076B2 (en) 2010-02-18 2013-02-19 Kawasaki Jukogyo Kabushiki Kaisha Device storage apparatus for railway vehicle

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101660668B1 (ko) * 2006-09-01 2016-09-27 가부시키가이샤 니콘 이동체 구동 방법 및 이동체 구동 시스템, 패턴 형성 방법 및 장치, 노광 방법 및 장치, 그리고 디바이스 제조 방법

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6177964A (ja) * 1984-09-25 1986-04-21 Ricoh Co Ltd デジタル信号処理装置
EP0209049A2 (fr) * 1985-07-09 1987-01-21 Nec Corporation Circuit de traitement capable d'augmenter le débit d'accumulation
JPS6398071A (ja) * 1986-10-14 1988-04-28 Nec Corp 演算回路
JPS63157269A (ja) * 1986-12-22 1988-06-30 Nec Corp 演算回路
JP2007131128A (ja) * 2005-11-10 2007-05-31 Fuji Electric Systems Co Ltd 鉄道車両用電力変換装置
JP2008302932A (ja) * 2008-09-22 2008-12-18 Hitachi Ltd 鉄道車両用床下電気品の車体実装方式
US8376076B2 (en) 2010-02-18 2013-02-19 Kawasaki Jukogyo Kabushiki Kaisha Device storage apparatus for railway vehicle

Also Published As

Publication number Publication date
JPH0519170B2 (fr) 1993-03-16

Similar Documents

Publication Publication Date Title
US3983382A (en) Adder with fast detection of sum equal to zeroes or radix minus one
US4878192A (en) Arithmetic processor and divider using redundant signed digit arithmetic
JPS6027024A (ja) 演算装置
JPH0573269A (ja) 加算器
US4118786A (en) Integrated binary-BCD look-ahead adder
US4823300A (en) Performing binary multiplication using minimal path algorithm
JPH0568725B2 (fr)
US3982112A (en) Recursive numerical processor
US7003540B2 (en) Floating point multiplier for delimited operands
JPS5957343A (ja) 加算回路
JPH02287874A (ja) 積和演算装置
JPS61262925A (ja) 演算回路
JPH0251732A (ja) 浮動小数点演算器
JPH0253819B2 (fr)
EP0626638A1 (fr) Additionneur en complément à un et méthode opératoire
JPS6349835A (ja) 演算処理装置
JP3137131B2 (ja) 浮動小数点乗算器及び乗算方法
JP2537876B2 (ja) 丸め処理回路
Natarajan et al. Arithmetic Operations and Circuits
JPS61262926A (ja) 演算回路
JPH1011418A (ja) 積和演算装置
JP3433466B2 (ja) 乗算回路
JPS63197227A (ja) 加算器
Jamil et al. Effects of multiple-bit shift-right operations on complex binary numbers
JPS638824A (ja) 演算処理装置