JPS60263483A - Light-emitting diode aligned material - Google Patents
Light-emitting diode aligned materialInfo
- Publication number
- JPS60263483A JPS60263483A JP59121060A JP12106084A JPS60263483A JP S60263483 A JPS60263483 A JP S60263483A JP 59121060 A JP59121060 A JP 59121060A JP 12106084 A JP12106084 A JP 12106084A JP S60263483 A JPS60263483 A JP S60263483A
- Authority
- JP
- Japan
- Prior art keywords
- light
- emitting diodes
- wiring
- substrate
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 title abstract description 3
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 239000010410 layer Substances 0.000 abstract description 14
- 239000002356 single layer Substances 0.000 abstract description 9
- 239000000919 ceramic Substances 0.000 abstract description 3
- 238000009792 diffusion process Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract description 2
- 229910001111 Fine metal Inorganic materials 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 230000005855 radiation Effects 0.000 abstract 1
- 230000017525 heat dissipation Effects 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/435—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material
- B41J2/447—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources
- B41J2/45—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources using light-emitting diode [LED] or laser arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
イ）産業上の利用分野
本発明は、特に高密度モノリシック発光ダイオードの載
置に好適な発光ダイオード配列体に関する。DETAILED DESCRIPTION OF THE INVENTION A) Field of Industrial Application The present invention relates to a light emitting diode array particularly suitable for mounting high-density monolithic light emitting diodes.
口》 従来技術
従来例えば日経エレクトロニクス誌１９８４年４月９日
号９２頁に記載されている如く、発光ダイオードプリン
タ用ヘッドとして長尺の発光ダイオード配列体がある。BACKGROUND OF THE INVENTION As described in Nikkei Electronics Magazine, April 9, 1984, page 92, there is a long light emitting diode array as a head for a light emitting diode printer.
このような発光ダイオード配列体は、第２図に示すよう
にセラミック等の基板（１１）にモノリシック型の発光
ダイオード（１４）（１４）・・と駆動素子（１６）（
１６）・・・を多数配列載置してある。As shown in FIG. 2, such a light emitting diode array consists of monolithic light emitting diodes (14) (14) and driving elements (16) (
16)... are arranged in large numbers.
このような場合、第３１５！３に示すように基板（２】
）にハーＩｌ＋の配線（２３＞（２３）・・・しか設け
ていない。発光表示器用のセラミック基板としては例え
ば特公昭５７−４８８６９号公報の如く印刷により多層
配線をする事が示されているけれど、このような配線が
許されるのはこの公報の如くハイブリッド型の発光ダイ
オードが点在している場合に限られていた。In such a case, as shown in No. 315!3, the substrate (2)
) is provided with only half Il+ wiring (23>(23)...) As a ceramic substrate for a light emitting display, for example, Japanese Patent Publication No. 57-48869 discloses multilayer wiring by printing. However, such wiring is allowed only when hybrid light emitting diodes are scattered, as in this publication.
これはモノリシック型の発光ダイオードでは従来大型（
又は長尺》の表示器が考えられなかった事もあるが、多
層配線では放熱性が悪くまた微細パターンが得られない
事も理由にあげられていた．しかし多層配線を用いると
特に共通配線や端子導出において配線自由度が高くなる
等の有利な点かあるので、これを生かしたいと考え本願
に至った。This is conventionally large for monolithic light emitting diodes (
The reason for this was that a display with a "long or long length" could not be considered, but other reasons were also cited, such as poor heat dissipation with multilayer wiring and the inability to obtain fine patterns. However, since there are advantages to using multilayer wiring, such as a higher degree of freedom in wiring, especially in common wiring and terminal derivation, we decided to take advantage of this and came up with the present application.
ハ）考案の目的
本発明は上記の点を考慮してなされたもので、モノリシ
ック型の発光ダイオードを用い放熱性がよく、共通配線
や端子導出の行ないやすい発光ダイオード配列体を提供
するものである。C) Purpose of the invention The present invention has been made in consideration of the above points, and provides a light emitting diode array that uses monolithic light emitting diodes, has good heat dissipation, and is easy to conduct common wiring and lead out terminals. .
二〉 考案の構成
本発明はモノリシック型の発光ダイオードの載置部から
離隔した同−基板面十に多層配線部を設けるものであり
、以下本発明を実施例に基づいて詳細に説明する。2> Structure of the invention The present invention provides a multilayer wiring section on the surface of a monolithic light emitting diode substrate that is spaced from the mounting section.The present invention will be described in detail below based on embodiments.
ホ）実施例
第１図は本発明実施例の発光ダイオード配列体の断面図
で発光ダイオードプリンタ用へ・７ドを例にとっている
。図において〈１〉はセラミック等の基板で、（２）（
３）（３’）・・は基板上に設けられた単層配線である
。（４）は単層配線（２〉の」二に載置部１ ゎ５．、
．１．、ヮＳ！（５）（５）ｆ−６１ツ（３）（３）ｔ
、；ｍ配線が施こされたモノリシック型の発光ダイオー
ドである。（６）（６）は発光ダイオード（４）の両側
に配置された駆動素子で、発光ダイオード（４）を点灯
制御するものである。尚発光ダイオード〈４）等につい
ては後に詳述するが、複数の発光ダイオード（４）と駆
動素子（６）（６）との平面的な位置関係は一般的な発
光ダイオードプリンタ用ヘッドの場合（第２図参照）と
同じである。＜７＞（７）は基板の周縁部のみに設けら
れた多層配線部である。e) Embodiment FIG. 1 is a cross-sectional view of a light emitting diode array according to an embodiment of the present invention, taking a light emitting diode printer for use as an example. In the figure, <1> is a substrate made of ceramic, etc., and (2) (
3) (3')... is a single layer wiring provided on the substrate. (4) is the single-layer wiring (2〉) and the mounting part 1 ゎ5.
．． 1. , ヮS! (5) (5) f-61tsu (3) (3) t
, ; This is a monolithic light emitting diode with m wiring. (6) (6) is a drive element arranged on both sides of the light emitting diode (4), which controls the lighting of the light emitting diode (4). Although the light emitting diodes (4) and the like will be described in detail later, the two-dimensional positional relationship between the plurality of light emitting diodes (4) and the drive elements (6) (6) is similar to that of a general light emitting diode printer head ( (See Figure 2). <7> (7) is a multilayer wiring section provided only at the periphery of the substrate.
上述の構造についてより詳細に説明する。まず基板（１
）は厚さ１＋ｎｍ程度のもので、Ａ４版プリンタの場合
、巾３５１１１ｍ長さ２３０画である。発光ダイオード
（４）を載置する単層配線（２）は１０〜２０μの厚み
で長ｄ ２１５＋ｎｍであるが、配線を行なう単層配線
（３）（３）・・・は発光点の密度に応じて８〜１２木
／画の通常ファインパターンと呼ばれる高精細密度配線
であり、例えば厚み３μｍのエツチド印刷パターンでな
っている。この単層配線（３）（３）・・・は少なくと
も発光ダイオード（４）の近傍から駆動素子（６）（６
）・・・の近傍まではファインパターンであり、このフ
ァインパターン上には絶縁層などを積層焼成してはなら
ない。これは上層を設ける３−
事によって放熱特性が損なわれ、かつ焼成によってファ
インパターンがひび割れや断線が生じやすいからである
。従って表面保護を行なうのであれば硬化後に軟性のあ
るシリコン樹脂等の１０とｍ程度の被覆を設けるにとど
めるべきである。The above structure will be explained in more detail. First, the board (1
) has a thickness of approximately 1+nm, and in the case of an A4 size printer, it is 35111 m wide and 230 strokes long. The single-layer wiring (2) on which the light-emitting diode (4) is placed has a thickness of 10 to 20 μm and a length d of 215+ nm, but the single-layer wiring (3) (3)... for which the wiring is carried out depends on the density of light-emitting points. It is a high-definition density wiring usually called a fine pattern with 8 to 12 patterns per picture, and is, for example, an etched printing pattern with a thickness of 3 μm. These single layer wiring (3) (3)... are connected at least from the vicinity of the light emitting diode (4) to the drive element (6) (6).
)... is a fine pattern, and an insulating layer or the like must not be laminated and fired on this fine pattern. This is because the provision of the upper layer impairs the heat dissipation properties, and the fine pattern is likely to crack or break during firing. Therefore, if the surface is to be protected, a coating of about 10.0 m of soft silicone resin or the like should be provided after curing.
次に発光ダイオード（４）は巾ＩＩＩｗ１１長許Ｂｍｎ
のＧａＡｓＰからなる素子に選択拡散によって６４乃至
１２８個の整列した発光点を形成してモノリシック型と
する。これを例えば３２個−列に整列させて基板（１）
の中央に配置する。Next, the light emitting diode (4) has a width of IIIw11 and a length of Bmn.
64 to 128 aligned light emitting points are formed in a device made of GaAsP by selective diffusion to form a monolithic device. For example, arrange these in a row of 32 pieces and form the board (1).
Place it in the center.
最後に多層配線部（７）（７）について説明する。Finally, the multilayer wiring sections (7) (7) will be explained.
図の例において、単層配線（３）（３）・・・の所望の
ものを巾広にバターニングして下層配線とし、その上に
透孔を有する絶縁層（７１）（７１）を形成する。In the example shown in the figure, the desired single-layer wiring (3) (3)... is patterned into a wide pattern to form the lower layer wiring, and insulating layers (71) (71) with through holes are formed on top of it. do.
絶縁層（７１）（７１）は例えば結晶化がラス印刷体か
らなる１０〜３５μｍ厚の層である。その上に導電層（
７２）（７２）・・を形成するが絶縁層（７１）の透孔
部においてはスルーホールとしての導通部（７３）が形
成される。導電層（７２）（７２）・・・は例えば５〜
１０μｍ厚の金ペースト印刷体によって得られ、共通配
線４−
（コモンライン）や端子部が形成される。そして端子部
においては、さらにその導電層（７２）上に銀パラジウ
ムペースト印刷体等からなる端子導体（７４）を設ける
。このような多層配線は焼成工程が伴うが、発光ダイオ
ード（４）から充分離隔する事で積層される配線を充分
強度のある太き許とできるので、断線等は生じない。そ
して放熱特性を損なわずまた配線を損傷しないためには
、発光ダイオード（４）の巾の４倍以上発光ダイオード
（４）から離隔して多層配線部（７）（７）を設ければ
よく、かつファインパターン上に設けないようにすれば
よい。発光ダイオード（４）の周囲に駆動素子（６）（
６）が配置してあれば、発光ダイオード（４）自身の発
熱より駆動素子（６）（６）の発熱が大きく、この影響
によって発光特性が影響きれないように工夫されている
ので、駆動素子（６）（６）の載置位置を目安にそれよ
り外側（発光ダイオードのある反対側）に多層配線部を
設ければよい。The insulating layers (71) (71) are, for example, layers of 10 to 35 μm thick made of crystallized lath printed material. On top of that is a conductive layer (
72) (72)... are formed, and a conductive part (73) as a through hole is formed in the through hole part of the insulating layer (71). The conductive layers (72) (72)... are, for example, 5-
It is obtained by a gold paste printed body having a thickness of 10 μm, and a common wiring 4- (common line) and terminal portions are formed. In the terminal portion, a terminal conductor (74) made of a silver-palladium paste print or the like is further provided on the conductive layer (72). Such multilayer wiring involves a baking process, but by separating the wiring from the light emitting diode (4) sufficiently, the wiring to be laminated can be made sufficiently strong and thick, so that disconnections and the like will not occur. In order to not impair the heat dissipation characteristics or damage the wiring, it is sufficient to provide the multilayer wiring parts (7) (7) at least four times the width of the light emitting diode (4) at a distance from the light emitting diode (4). In addition, it may be arranged not to be provided on the fine pattern. A drive element (6) (
6), the heat generated by the driving element (6) (6) is greater than that of the light emitting diode (4) itself, and the driving element (6) Using the placement position in (6) as a guide, the multilayer wiring section may be provided outside of it (on the opposite side where the light emitting diode is located).
へ） 発明の効果
以上の如く本発明は、基板と、基板の一部に載置固着さ
れた複数のモノリシック型の発光ダイオードと、発光ダ
イオードの載置部およびその周辺を除く基板の同一面に
設けられた多層配線部とを具備した発光ダイオード配列
体であるから、発光ダイオードが高密度になってもその
放熱は良好で配線も損傷する事なく、かつ共通配線や端
子部には充分の配線自由度が得られる。(f) Effects of the Invention As described above, the present invention provides a substrate, a plurality of monolithic light emitting diodes placed and fixed on a part of the substrate, and a plurality of monolithic light emitting diodes mounted on the same surface of the substrate excluding the mounting portion of the light emitting diodes and the surrounding area. Since this is a light emitting diode array with a multi-layer wiring section, even if the light emitting diodes are densely packed, the heat dissipation is good and the wiring will not be damaged, and the common wiring and terminals have sufficient wiring. You get more freedom.
第１図は本発明実施例の発光ダイオード配列体の断面図
、第２図は発光ダイオード配列体の要部平面図、第３図
は従来の発光ダイオード配列体の断面図である。
（１）・・・基板、（２＞（３）（３）・・・単層配線
、（４）・・・発光ダイオード、（５）（５）・・・金
属細線、（６）（６）・駆動素子、（７）（７）・・多
層配線部。
出願人 三洋電機株式会社 外１名
代理人 弁理士 佐野靜夫FIG. 1 is a sectional view of a light emitting diode array according to an embodiment of the present invention, FIG. 2 is a plan view of a main part of the light emitting diode array, and FIG. 3 is a sectional view of a conventional light emitting diode array. (1)...Substrate, (2>(3)(3)...Single layer wiring, (4)...Light emitting diode, (5)(5)...Thin metal wire, (6)(6 )・Drive element, (7) (7)・・Multilayer wiring section. Applicant: Sanyo Electric Co., Ltd. and 1 other representative: Patent attorney: Shizuo Sano
Claims (1)
シック型の発光ダイオードと、発光ダイオードの載置部
および周辺を除く基板の同一面に設けられた多層配線部
とを具備した事を特徴とする発光ダイオード配列体。 ２）前記発光ダイオードは基板の略中央部に整列して配
置され、その周囲に発光ダイオードを点灯制御する駆動
素子を配置し、その駆動素子載置部の外側にあたる基板
表面に印刷により前記多層配線部を設けた事を特徴とす
る特許 第１項記載の発光ダイオード配列体。[Scope of Claims] 1) A substrate, a plurality of monolithic light emitting diodes mounted and fixed on a part of the substrate, and multilayer wiring provided on the same surface of the substrate excluding the mounting portion and periphery of the light emitting diodes. A light emitting diode array comprising: 2) The light-emitting diodes are arranged in a line approximately in the center of the substrate, and a drive element for controlling lighting of the light-emitting diodes is arranged around the light-emitting diodes, and the multilayer wiring is printed on the surface of the substrate outside the drive element mounting area. 1. The light emitting diode array described in Patent No. 1, characterized in that a portion is provided.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12106084A JPH0680839B2 (en) | 1984-06-12 | 1984-06-12 | Light emitting diode array |
| US06/742,584 US4733127A (en) | 1984-06-12 | 1985-06-07 | Unit of arrayed light emitting diodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12106084A JPH0680839B2 (en) | 1984-06-12 | 1984-06-12 | Light emitting diode array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60263483A true JPS60263483A (en) | 1985-12-26 |
| JPH0680839B2 JPH0680839B2 (en) | 1994-10-12 |
Family
ID=14801844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12106084A Expired - Lifetime JPH0680839B2 (en) | 1984-06-12 | 1984-06-12 | Light emitting diode array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0680839B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014079939A2 (en) * | 2012-11-21 | 2014-05-30 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4888884A (en) * | 1972-02-23 | 1973-11-21 | ||
| JPS5774166A (en) * | 1980-10-29 | 1982-05-10 | Oki Electric Ind Co Ltd | Array head of light emitting diode |
-
1984
- 1984-06-12 JP JP12106084A patent/JPH0680839B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4888884A (en) * | 1972-02-23 | 1973-11-21 | ||
| JPS5774166A (en) * | 1980-10-29 | 1982-05-10 | Oki Electric Ind Co Ltd | Array head of light emitting diode |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014079939A2 (en) * | 2012-11-21 | 2014-05-30 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component |
| WO2014079939A3 (en) * | 2012-11-21 | 2014-08-28 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component |
| CN104798441A (en) * | 2012-11-21 | 2015-07-22 | 欧司朗光电半导体有限公司 | Optoelectronic semiconductor component |
| US9871075B2 (en) | 2012-11-21 | 2018-01-16 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component |
| US9997559B2 (en) | 2012-11-21 | 2018-06-12 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component |
| DE112013005569B4 (en) | 2012-11-21 | 2024-07-18 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelectronic semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0680839B2 (en) | 1994-10-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |