JPS60262459A - Manufacture of solid-state image pickup device - Google Patents

Manufacture of solid-state image pickup device

Info

Publication number
JPS60262459A
JPS60262459A JP59118422A JP11842284A JPS60262459A JP S60262459 A JPS60262459 A JP S60262459A JP 59118422 A JP59118422 A JP 59118422A JP 11842284 A JP11842284 A JP 11842284A JP S60262459 A JPS60262459 A JP S60262459A
Authority
JP
Japan
Prior art keywords
film
electrode
insulating film
forming
solid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59118422A
Other languages
Japanese (ja)
Inventor
Onori Ishikawa
石河 大典
Kosaku Yano
矢野 航作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59118422A priority Critical patent/JPS60262459A/en
Publication of JPS60262459A publication Critical patent/JPS60262459A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14665Imagers using a photoconductor layer
    • H01L27/14672Blooming suppression

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To inhibit a blooming phenomenon by forming an optical shielding body to an insulating film between an optical shielding body and an electrode terminal even in the longitudinal direction. CONSTITUTION:An n type photodiode region 2 and a CCD region 12 are formed to the surface of a p type substrate 1. A gate electrode 4 is shaped, and an insulating film 5 is formed onto the electrode 4. A shielding body 11 for beam- shielding a charge transfer region is shaped onto the film 5. An insulating film 6 is formed onto the shielding body 11, and a contact hole 16 for a metallic electrode is shaped to the films 5, 6 on the region 2. The metallic electrode 7 is formed onto the whole surface. The electrode 7 and the film 6 on the shielding body 11 are etched approximately vertically through a resist 17 as a mask to form stepped sections 13. A metallic film 15 is shaped onto the whole surface, and the film 15 is etched while the film 15 is left only on the side surfaces of the stepped section 13 sections of the film 6. Amorphous Si 8 to which an n type impurity is doped, photoconductive films 9-1, 18 and a transparent electrode 10 are formed onto the substrate 1 having such structure. According to such constitution, propagation in the lateral direction of carriers generated in Si 8 can be inhibited.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、固体撮像装置の製造方法に関するもので、特
に電荷転送機能あるいはスイッチング機能を有する半導
体基板上に、光導電膜を形成した積層型固体撮像装置を
製造する分野に関係するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a solid-state imaging device, and particularly to a stacked solid-state imaging device in which a photoconductive film is formed on a semiconductor substrate having a charge transfer function or a switching function. It is related to the field of manufacturing equipment.

従来例の構成とその問題点 従来、BBD、COD等の電荷転送機能を有する回路素
子あるいはマトリクス状にMOSスイッチを配置し、X
−Yシフトレジスタによって信号読み出しを行なうX−
Yマトリクス型と光導電膜との組み合わせにおいて、光
導電膜の下層電極膜に対応した面積部で光信号電荷を発
生させ余剰の3/、、− 光は遮蔽する必要かある。
Conventional configuration and its problems Conventionally, MOS switches are arranged in a matrix or circuit elements having a charge transfer function such as BBD and COD, and
-X to read signal by Y shift register
In the combination of the Y matrix type and the photoconductive film, it is necessary to generate optical signal charges in an area corresponding to the lower electrode film of the photoconductive film and to block the excess 3/, ... - light.

第1図に、信号電荷蓄積部がホトダイオードで電荷転送
部がCOD転送素子であるよう力構造のものについて詳
細説明を行なう。第」図のように光導電膜に接し、かつ
半導体基板1のダイオード領域2と電気的に接続された
金属電極7は、絵素の分離のだめに互いに分離されてお
り、透明電極10、光導電膜9で吸収されずに透過した
光が上記金属電極7間の間隙lを通り、半導体基板に到
達し、ここで電子、正孔対が生成し、正孔は基板に移動
するが、電子は光情報蓄積のためのダイオード領域2や
、can電荷転送部12に流入していた。この結果、C
OD電荷転送部は縦方向に電気的に接続されているため
、半導体基板内で発生しCCD部に入った電子は、縦方
向に拡がる現象、すなわち本来信号の々い部分に信号が
現われるブルーミング現象を引き起こしていた。
Referring to FIG. 1, a detailed explanation will be given of a device having a power structure in which the signal charge storage section is a photodiode and the charge transfer section is a COD transfer element. As shown in FIG. The light transmitted without being absorbed by the film 9 passes through the gap l between the metal electrodes 7 and reaches the semiconductor substrate, where electron and hole pairs are generated.The holes move to the substrate, but the electrons This flowed into the diode region 2 for optical information storage and the CAN charge transfer section 12. As a result, C
Since the OD charge transfer section is electrically connected in the vertical direction, electrons generated in the semiconductor substrate and entering the CCD section spread in the vertical direction, which is a blooming phenomenon in which signals appear in areas where signals are originally large. was causing

この現象を解消する為、第2図のように第2絶縁膜6と
第1絶縁膜60間で、かつ金属電極間の間隙を覆う位置
に光遮蔽体11を設ける方法が特開昭65−10393
4号で示されている。しかしこの方法では、光遮蔽体1
1と金属電極7の両者の間で以下に説明する欠点および
問題点かある。
In order to eliminate this phenomenon, as shown in FIG. 2, a method is proposed in which a light shield 11 is provided between the second insulating film 6 and the first insulating film 60 and at a position covering the gap between the metal electrodes. 10393
It is shown in No. 4. However, in this method, the light shield 1
There are drawbacks and problems between both the metal electrode 1 and the metal electrode 7, which will be explained below.

捷ず第1に金属電極7と光遮蔽体11の位置合せのすれ
についてである。本来位置合せはいくらかの余裕をもっ
て設計されているが、その安全係数を大きくすることは
、本来の固体撮像装置の素子特性を減少させることに々
る。々ぜ々ら、まず金属電極の面積を大きくすることか
考えられるか、金属電極の分離のだめのエツチング技術
をさらに金属電極上部に形成する光導電膜の横方向の暗
電流の密度による制限がある。寸だ光遮蔽体の形成幅に
おいても、エツチング制限、ホトダイオード部などとの
位置合せ制限によって、制約されてし甘う。次に第2絶
縁膜6が厚く々ると、横方向から光が漏れ易くなり、特
に同図のようにゲート電電極4を形成した後では基板段
差が大きくなり、 1光の乱反射による漏れが顕著と々
る。寸だ逆に第2絶縁膜6が薄いと金属電極7と光遮蔽
体11がショートし易くなる。次にゲート電極4に高電
圧61、−。
The first issue is the misalignment between the metal electrode 7 and the light shield 11. Alignment is originally designed with some margin, but increasing the safety factor tends to reduce the original element characteristics of the solid-state imaging device. First of all, it is possible to consider increasing the area of the metal electrode, but the etching technique for separating the metal electrode is further limited by the density of the lateral dark current of the photoconductive film formed on the top of the metal electrode. . The width of the light shield is also subject to limitations due to etching limitations and alignment limitations with the photodiode section. Next, as the second insulating film 6 becomes thicker and thicker, it becomes easier for light to leak from the lateral direction.Especially after the gate electrode 4 is formed as shown in the same figure, the substrate level difference becomes large, and leakage due to diffused reflection of one light increases. Notable. On the other hand, if the second insulating film 6 is thin, the metal electrode 7 and the light shield 11 are likely to short-circuit. Next, a high voltage 61,- is applied to the gate electrode 4.

ツクロックパルスを印加するとノズルが発生し易くなり
ゲート電極4と金属電極7の間の浮遊容量により金属電
極7に誘発され、画像特性が悪くなる等、多くの問題が
ある。
When a clock pulse is applied, nozzles are likely to occur and are induced in the metal electrode 7 due to stray capacitance between the gate electrode 4 and the metal electrode 7, causing many problems such as deterioration of image characteristics.

ここで第1図、第2図の3はゲート絶縁膜、8は、正孔
阻止層である。
Here, 3 in FIGS. 1 and 2 is a gate insulating film, and 8 is a hole blocking layer.

発明の目的 本発明は、上記のような構成の固体撮像装置において、
光遮蔽体と電極端子の間にある絶縁膜に縦方向にも光遮
蔽体を形成しより光遮蔽を安全に行なうことにより、ブ
ルーミング現象を抑制し、さらに光導電膜の形成に於い
て、絵素間での暗電流を低減しノイズ成分のより少ない
固体撮像装置の製造方法を提供することを目的とする。
Purpose of the Invention The present invention provides a solid-state imaging device having the above configuration,
By forming a light shield in the vertical direction on the insulating film between the light shield and the electrode terminal to more safely perform light shielding, blooming phenomenon can be suppressed. It is an object of the present invention to provide a method for manufacturing a solid-state imaging device that reduces inter-element dark current and has fewer noise components.

発明の構成 本発明は電荷蓄積領域に蓄積された信号電荷を連送する
転送領域とを有する半導体回路基板と半導体回路基板上
に形成された複数の絶縁膜と単位絵素ごとに上記絶縁膜
上に形成された電極と、さらに光導電膜を介して形成さ
れた透光性電極を有する固体撮像装置の製造に際し、上
記複数の絶縁膜の間および電極端子と絶縁膜表面におい
て光遮蔽体をほぼ全面に形成した構造により、光遮蔽を
より完全に行ない、ブルーミング現象を抑制し、また上
記電極端子及び絶縁膜表面に於ける光遮蔽は、絶縁膜を
一部縦方向にエツチングしてそのエツチング側面に形成
し、このエツチング側面は、極めて急峻な形状をして形
成されるため、絶縁膜及び金属電極上に光導電膜を形成
する際上記急峻な段部で光導電膜の成長の均一性が崩れ
、その結果光導電膜中でのキャリヤの横方向への伝播が
抑制され、光遮蔽効果と併わせで、光導電膜での解像度
の向上を可能とするものである。
Structure of the Invention The present invention provides a semiconductor circuit board having a transfer region for continuously transmitting signal charges accumulated in a charge storage region, a plurality of insulating films formed on the semiconductor circuit board, and a plurality of insulating films formed on the insulating film for each unit pixel. When manufacturing a solid-state imaging device having an electrode formed on a photoconductive film and a light-transmitting electrode further formed through a photoconductive film, a light shielding material is almost completely removed between the plurality of insulating films and between the electrode terminal and the surface of the insulating film. The structure formed on the entire surface provides more complete light shielding and suppresses the blooming phenomenon.The light shielding on the electrode terminal and the surface of the insulating film is achieved by etching a portion of the insulating film in the vertical direction and etching the etched side surface of the insulating film. This etched side surface is formed with an extremely steep shape, so when forming a photoconductive film on an insulating film and a metal electrode, the uniformity of the growth of the photoconductive film is affected by the steep steps. As a result, the lateral propagation of carriers in the photoconductive film is suppressed, and together with the light shielding effect, it is possible to improve the resolution of the photoconductive film.

実施例の説明 第3図は、本発明の一実施例における固体撮像装置の断
面構造を示し、説明を容易にするために従来例と共通の
構成要素の番号を用い、第1図および第2図と同じであ
る。1はp型シリコン基板、2はダイオード領域、3は
ゲート絶縁膜、4はゲート電極、6は第1絶縁膜、6は
第2絶縁膜、77、’<−; は金属電極、8に:正孔阻止層、9,18は光導電膜、
10に]透明電極、11は光遮蔽体、12はCOD電荷
転送部である。さらに金属電極7の間の第2の絶縁膜6
はほぼ垂直にエツチングされ段差13がつけられ、その
段差13け、第2の絶縁膜6の膜厚のほぼ棒〜%程度の
深さエツチングしてあり、その段差13の側面14に金
属電極7と同−材料あるいはオーミックコンタクトが可
能で光遮蔽かできる金属膜15を形成するものである。
DESCRIPTION OF EMBODIMENTS FIG. 3 shows a cross-sectional structure of a solid-state imaging device according to an embodiment of the present invention. For ease of explanation, the same component numbers as in the conventional example are used, and FIGS. Same as the figure. 1 is a p-type silicon substrate, 2 is a diode region, 3 is a gate insulating film, 4 is a gate electrode, 6 is a first insulating film, 6 is a second insulating film, 77, '<-; is a metal electrode, 8: hole blocking layer, 9 and 18 are photoconductive films;
10] a transparent electrode, 11 a light shield, and 12 a COD charge transfer section. Furthermore, a second insulating film 6 between the metal electrodes 7
is etched almost vertically to form a step 13, and the 13 steps are etched to a depth of approximately 10% to 10% of the thickness of the second insulating film 6, and a metal electrode 7 is formed on the side surface 14 of the step 13. A metal film 15 made of the same material or capable of ohmic contact and light shielding is formed.

第3図によりさらに説明を加えると、光は透明電極10
および光導電膜9で吸収され、電子、正孔対を生成し、
正孔は正孔阻止層でトラップされ、電子は金属電極7の
単位絵素領域に光の情報として吸収され、nのダイオー
ド領域2に蓄積される。
To further explain with reference to FIG.
and is absorbed by the photoconductive film 9 to generate electron and hole pairs,
Holes are trapped in the hole blocking layer, and electrons are absorbed as optical information in the unit picture element region of the metal electrode 7 and accumulated in the n diode region 2.

ここで光導電膜に吸収されず、単位絵素領域の金属電極
7部まで達した光は第2の絶縁膜60段差13部の側面
14に設けられた金属膜16と第1及第2の絶縁膜の間
に設けられた光遮蔽体11とによって遮断し、半導体基
板中で光の洩れ込みによって生成されるキャリヤを無く
すことができる。
Here, the light that is not absorbed by the photoconductive film and reaches the 7 parts of the metal electrode in the unit picture element area is connected to the metal film 16 provided on the side surface 14 of the 13 steps of the second insulating film 60 and the first and second insulating film 60. The light is blocked by the light shielding member 11 provided between the insulating films, and carriers generated by light leaking into the semiconductor substrate can be eliminated.

寸たこの第2の絶縁膜6の段差13上に正孔阻止・層8
及び光導電膜9をスパッタ蒸着法あるいはCVD法で順
次形成するが、この時、段差13部での成長堆積か平坦
部での成長堆積と異なり、一様性が損われる。
A hole blocking layer 8 is formed on the step 13 of the second insulating film 6 of the octopus.
The photoconductive film 9 and the photoconductive film 9 are sequentially formed by a sputter deposition method or a CVD method, but at this time, unlike the growth deposition on the step portion 13 or the flat portion, the uniformity is impaired.

そのため、光導電膜中で発生したキャリヤの横方向への
伝播か抑制され、正孔阻止層及び光導電膜層中での絵素
間の信号の洩れが々くなり、絵素間分離が可能となり、
解像度の向上が計か力、る。
Therefore, the lateral propagation of carriers generated in the photoconductive film is suppressed, and signal leakage between picture elements in the hole blocking layer and photoconductive film layer is increased, making it possible to separate the picture elements. Then,
Improving resolution will help.

第4図は、本実施例の製造工程を説明したものである。FIG. 4 explains the manufacturing process of this example.

第4図aはp型(100)10Ω−鑞基板1の表面にn
型不純物を所望の位置に形成し、ダイオード領域を形成
する。この際、一方のn型層はホトダイオード2として
使用し他方は電荷転送用のCOD領域12として使用す
る。ゲート絶縁膜3を約0.1μmおよびゲート電極と
して多結晶シリ 1コン膜4を約0.6μm形成し、信
号電荷転送電極と々り転送する。ホトダイオード2上の
ゲート酸化膜3は、フォトエッチ工程によりパターン出
し9ヘー、・ されている。
Figure 4a shows p-type (100) 10Ω-n on the surface of the solder substrate 1.
A type impurity is formed at a desired position to form a diode region. At this time, one n-type layer is used as a photodiode 2, and the other is used as a COD region 12 for charge transfer. A gate insulating film 3 of about 0.1 .mu.m and a polycrystalline silicon film 4 of about 0.6 .mu.m are formed as a gate electrode, and a signal charge transfer electrode is transferred intermittently. The gate oxide film 3 on the photodiode 2 is patterned by a photoetching process.

第4図すは、ゲート電極4上に絶縁膜6を形成するが、
絶縁膜5表してリンを含むシリコンガラス(以下PSG
膜と称する)を約1μm形成し、高温中で流動させ、基
板表面の凹凸を軽減し、平坦化する。次に光遮蔽体11
として、MOあるいはTi p Tl + Orなどの
金属薄膜を全面に約02μm形成する。次にフォトエッ
チ工程を経て、所望の部分のみ光遮蔽体11を残こす。
In FIG. 4, an insulating film 6 is formed on the gate electrode 4.
The insulating film 5 is silicon glass containing phosphorus (hereinafter referred to as PSG).
A film (referred to as a film) of approximately 1 μm is formed and flowed at high temperature to reduce irregularities on the substrate surface and flatten it. Next, the light shield 11
Then, a metal thin film such as MO or Ti p Tl + Or is formed to a thickness of about 02 μm over the entire surface. Next, a photo-etching process is performed to leave the light shield 11 only in desired portions.

さらに光遮蔽体11の上に絶縁膜6として、シリコン酸
化膜あるいはPSG膜を約0.6μm減圧あるいは低温
の常圧で気相成長させる。次にフォトエッチ工程を経て
ホトダイオード2上の絶縁膜6,6を選択的にエツチン
グし、金属電極用のコンタクト孔16を形成したもので
ある。
Further, as an insulating film 6, a silicon oxide film or a PSG film is grown by vapor phase to a thickness of about 0.6 μm on the light shielding member 11 at reduced pressure or at normal pressure at a low temperature. Next, through a photo-etching process, the insulating films 6, 6 on the photodiode 2 are selectively etched to form a contact hole 16 for a metal electrode.

第4図Cけ絶縁膜6上に、光導電膜の下方電極となり、
光遮蔽も兼用する金属電極7を全面にM。
The lower electrode of the photoconductive film is formed on the insulating film 6 shown in FIG.
The metal electrode 7, which also serves as a light shield, is provided on the entire surface.

を約0.2μm程度、蒸着形成させる。説明ではM。is deposited to a thickness of about 0.2 μm. M in the explanation.

としたが金属電極の材料は、前記の如く、光導電膜の片
側の電極端子と光遮蔽を兼用する構成になっているため
、その両方の効果を奏しんければなら々い。材料として
は、光導電膜に非晶質シリコンを用いる場合ショットキ
ー特性を生じる材料が効果的であるので、仕事関数の小
さな例えば、MO9Or、Ti 、klなどが有効であ
る。
However, as described above, the material of the metal electrode is configured to serve both as an electrode terminal on one side of the photoconductive film and as a light shield, so it must have the effects of both. As for the material, when amorphous silicon is used for the photoconductive film, a material that exhibits Schottky characteristics is effective, so for example, MO9Or, Ti, kl, etc. having a small work function are effective.

続いて、フォト工程によりMoを使用した金属電極膜7
上にパターン出しする。この時、絶縁膜5と6にはさま
れた光遮蔽体11とは、重ね合せに注意−することなく
、エツチング後下のパターンが、金属電極7及び光遮蔽
体11で見えない程で良い。
Subsequently, a metal electrode film 7 using Mo is formed by a photo process.
Make a pattern on top. At this time, the light shielding body 11 sandwiched between the insulating films 5 and 6 does not need to be careful about overlapping, and it is sufficient that the pattern underneath cannot be seen between the metal electrode 7 and the light shielding body 11 after etching. .

MOを使用した時のエツチングはCF4ガスと酸素ガス
の混合ガスを使用し、プラズマエツチングでパターンニ
ングする事ができ、ウェットエツチング法で実施する場
合は、過酸化水素水と水の1対1の混合液で行なうこと
が出来る。
Etching when using MO uses a mixed gas of CF4 gas and oxygen gas, and patterning can be done by plasma etching.When carrying out wet etching, a 1:1 ratio of hydrogen peroxide and water is used. This can be done with a mixed solution.

次に、そのま捷マスクとなるレジスト17を残して絶縁
膜6の露出した部分をほぼ垂直に堆積膜厚の晃〜%程度
残すようにエツチングし段差13を形成したものである
。絶縁膜6のエツチングは、11ノ、− 反応性イオンエツチングで、05F8ガス0.1Tor
r。
Next, the exposed portion of the insulating film 6 is etched almost vertically leaving the resist 17 serving as a mask as it is to form a step 13 so as to leave about 10% to 10% of the deposited film thickness. The insulating film 6 was etched by reactive ion etching using 05F8 gas at 0.1 Torr.
r.

200W程度の条件で可能であり、エツチング面の垂直
を出すには、真空度をより高真空側に条件を設定すれば
可能である。
This is possible under conditions of about 200 W, and to make the etched surface perpendicular, it is possible to set the degree of vacuum to a higher degree of vacuum.

第4図dは絶縁膜6に段差13を形成したのち、マスク
となったレジスト17を除去して洗浄したのち、金属電
極を形成した拐料と同−材料をほぼ同一膜厚全面に形成
し、次に方向性を持たせた例えば、反応性イオンエツチ
ングにより全面に形成した膜をエツチングする。この時
エツチングの方向性か強い条件でエツチングを行ない基
板の平坦部及び清めらかな段差部は膜がエツチングされ
るが、急峻な段差13のような部分では、見かけ状形成
された膜の厚さが縦方向で厚くなり平坦部及び滑らかな
段差部がエツチング除去されても残るととに々る。
FIG. 4d shows that after a step 13 is formed on the insulating film 6, the resist 17 serving as a mask is removed and cleaned, and then the same material as that used to form the metal electrode is formed over the entire surface with almost the same thickness. Next, the film formed over the entire surface is etched by, for example, reactive ion etching. At this time, etching is performed under conditions that are very directional, and the film is etched on flat areas and smooth step areas of the substrate, but in areas with steep steps 13, the apparent thickness of the formed film is It becomes thicker in the vertical direction, and even if the flat parts and smooth stepped parts are removed by etching, they remain.

d図は、金属電極上に膜を形成し、前記膜の厚さ分だけ
表面よりエツチングし段差13部の側面14にのみ金属
膜16を残したものである。
In FIG. d, a film is formed on the metal electrode, and the surface is etched by the thickness of the film, leaving the metal film 16 only on the side surface 14 of the step 13.

反応性イオンエツチングの条件は、金属膜15がMoの
場合OF 2C1、、ガスで、s o m Torr。
The conditions for reactive ion etching are OF2C1, gas, and s o m Torr when the metal film 15 is Mo.

200Wの条件で段差側面のみ残すことができる。Under the condition of 200W, only the stepped side surface can be left.

8図では、d図で示しだ構造としたものを洗浄した後、
プラズマ中あるいrf:Jニスバッタ中にて、n型不純
物とトープさ九た非晶質シリコン8を形成する。膜厚け
、約300A程度でありこの層が正孔阻止層18となる
。さらに真空中で水素化非晶質シリコン膜を1.0〜1
.6μm前後形成し、光導電膜層9−1とする。この時
の基板温度は250’Cであり、続いて同一装置内にB
2H6ガス及びC■4ガスを適当な比率でSiH4ガス
に混合し、水素化非晶質5iC9−2を600〜1o0
0人形成スル。
In Figure 8, after cleaning the structure shown in Figure d,
In a plasma or RF:J varnish batter, amorphous silicon 8 with an n-type impurity and a tope is formed. The thickness of the film is about 300 A, and this layer becomes the hole blocking layer 18. Further, in vacuum, hydrogenated amorphous silicon film with 1.0 to 1
.. A photoconductive film layer 9-1 is formed with a thickness of about 6 μm. The substrate temperature at this time was 250'C, and then B
Mix 2H6 gas and C4 gas with SiH4 gas in an appropriate ratio, and hydrogenate amorphous 5iC9-2 at 600 to 1o0.
0 person formation.

この5i−G膜も光導電膜となるものである。この−に
に透明電極としてITOloを形成する。
This 5i-G film also becomes a photoconductive film. ITOlo is formed on this layer as a transparent electrode.

以−ヒのような工程で、本発明は構成されるが、特に光
導電膜の形成時、81基板側の各絵素の分離領域に急峻
な段差が存在することにより、光導 1電膜の成長時、
段差部分での均一性が崩れ、非晶質シリコン層中で発生
したキャリヤの横方向への伝播が抑制される。こ、fl
、は急峻々段差部での膜形13、−7 成が、平坦部とは異なり均一な膜厚堆積ができないこと
によるものであり、異常な場合は、段差の下の部分に空
洞を生じたりすることも生ずる場合もある。実施例を示
す図には、示されてい々いがゲート電極等の駆動用配線
としてのAl配線は、金属電極7を形成する前に周知の
方法で電極づけを行なう。
The present invention is constructed through the steps described below, but in particular, when forming a photoconductive film, the presence of steep steps in the separation region of each picture element on the 81 substrate side causes problems in the photoconductive film. When growing up,
The uniformity at the step portion is disrupted, and the lateral propagation of carriers generated in the amorphous silicon layer is suppressed. This, fl
, is due to the fact that the film formation at steeply stepped areas cannot be deposited with a uniform thickness unlike at flat areas, and in abnormal cases, cavities may be formed at the bottom of the steps. Sometimes it happens. In the drawings showing the embodiments, Al wiring as driving wiring for gate electrodes and the like is electrode-attached by a well-known method before forming the metal electrode 7.

発明の効果 以」二のように本発明は、単位絵素毎に分離された金属
電極に対して、絶縁膜を介して下層光遮蔽体を設け、さ
らに金属電極と下層光遮蔽体の間の絶縁膜に段差を設は
段差側面にも光遮蔽体を設けることにより、斜めの入射
に対しても遮蔽することができる。
Effects of the Invention As described in Section 2, the present invention provides a lower layer light shielding body with an insulating film interposed between the metal electrodes separated for each unit picture element, and furthermore, the lower layer light shielding body is provided between the metal electrode and the lower layer light shielding body. By providing a step in the insulating film and providing a light shield on the side surface of the step, oblique incidence can also be blocked.

さらに段差−にへの光導電膜形成をすることにより、光
導電膜の膜均一性を損なわせ内部で発生したキャリヤの
横方向伝播を阻止することにより、絵素毎の分離をより
確実にし、高解像度の撮像を14ヶ−7 第1図は従来の光導電膜のある固体撮像装置の断面図、
第2図は従来の光遮蔽があり光導電膜のある固体撮像装
置の断面図、第3図は本発明の一実施例の方法にて作成
された固体撮像装置の断面図、第4図a〜ei本発明の
一実施例の固体撮像装置の製造工程断面図である。
Furthermore, by forming the photoconductive film on the stepped surface, the uniformity of the photoconductive film is impaired and the lateral propagation of internally generated carriers is prevented, thereby making the separation of each pixel more reliable. High-resolution imaging for 14 months - 7 Figure 1 is a cross-sectional view of a conventional solid-state imaging device with a photoconductive film.
FIG. 2 is a sectional view of a conventional solid-state imaging device with a light shield and a photoconductive film, FIG. 3 is a sectional view of a solid-state imaging device fabricated by the method of an embodiment of the present invention, and FIG. 4a -ei FIG. 5 is a sectional view of the manufacturing process of a solid-state imaging device according to an embodiment of the present invention.

1・・・・・・p型シリコン基板、2・・・・・・ダイ
オード領域、9−1.18・・・・・・光導電膜、10
・・・・・・透明電極、11・・・・・・光遮蔽体、1
2・・団・電荷転送部、13・・・・・・段差、16・
・・・・・金属膜。
DESCRIPTION OF SYMBOLS 1...P-type silicon substrate, 2...Diode region, 9-1.18...Photoconductive film, 10
...Transparent electrode, 11... Light shielding body, 1
2...Group/charge transfer section, 13...Step, 16.
...Metal film.

代理人の氏名 弁理士 中 尾 敏 男 ほか1名区 
区 綜 塚 303−
Name of agent: Patent attorney Toshio Nakao and 1 other person
Ward Sozuka 303-

Claims (2)

【特許請求の範囲】[Claims] (1)透明電極膜及び光導電膜を上層部に積層し、下層
電極膜が信号電荷蓄積領域に接続され、前記信号電荷を
転送する転送領域を有する固体撮像装置の製造に際し、
絶縁層を介して前記信号電荷転送領域を光遮蔽するだめ
の遮蔽体を形成する工程、前記遮蔽体」二に絶縁膜を形
成し、多数個の信号電荷蓄積領域に開孔部を設ける工程
、次に各5前記開孔部と接続して導電性でかつ光遮蔽可
能な電極膜を各々形成する工程、さらに前記遮蔽体上の
絶縁膜の表面露出部を垂直にエツチングし、全面に前記
の電極膜と同様の効果を奏し得る膜を形成し、表面から
垂直に前記膜をエツチング除去し、絶縁膜の段差部側面
のみ前記膜を残す工程、続いて、前記構造となった基板
上に均一に光導電膜を形成し、最」二部の透明電極膜を
形成する工程を有するこ々を特徴とす2 、、 る固体撮像装置の製造方法。
(1) When manufacturing a solid-state imaging device in which a transparent electrode film and a photoconductive film are laminated on an upper layer, a lower electrode film is connected to a signal charge storage region, and has a transfer region for transferring the signal charge,
forming a shield for shielding the signal charge transfer region from light through an insulating layer; forming an insulating film on the shield and providing apertures in a large number of signal charge storage regions; Next, a step of forming a conductive and light-shielding electrode film connected to each of the five openings, and then vertically etching the surface exposed part of the insulating film on the shield, so that the entire surface is covered with the above-mentioned film. A process of forming a film that can have the same effect as the electrode film, removing the film by etching vertically from the surface, leaving the film only on the side surfaces of the stepped portion of the insulating film, and then etching the film uniformly over the substrate with the structure described above. 2. A method of manufacturing a solid-state imaging device, comprising the steps of: forming a photoconductive film on the first part, and forming a transparent electrode film on the second part.
(2)下層電極膜及び絶縁膜への段差形成後の膜形成材
料を同一とし、Mo、 Ta、 W、 Cr、 kl 
−4たはその珪素化物で構成された電極膜と光遮蔽体を
兼用したことを特徴とする特許請求の範囲第1項記載の
固体撮像装置の製造方法。
(2) The film forming materials after forming the step on the lower electrode film and the insulating film are the same, Mo, Ta, W, Cr, kl.
2. The method of manufacturing a solid-state imaging device according to claim 1, wherein the electrode film made of 4-4 or its silicide also serves as a light shield.
JP59118422A 1984-06-08 1984-06-08 Manufacture of solid-state image pickup device Pending JPS60262459A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59118422A JPS60262459A (en) 1984-06-08 1984-06-08 Manufacture of solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59118422A JPS60262459A (en) 1984-06-08 1984-06-08 Manufacture of solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS60262459A true JPS60262459A (en) 1985-12-25

Family

ID=14736246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59118422A Pending JPS60262459A (en) 1984-06-08 1984-06-08 Manufacture of solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS60262459A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164271A (en) * 1986-12-26 1988-07-07 Toshiba Corp Solid-state image sensing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164271A (en) * 1986-12-26 1988-07-07 Toshiba Corp Solid-state image sensing device

Similar Documents

Publication Publication Date Title
US4694317A (en) Solid state imaging device and process for fabricating the same
JP4600964B2 (en) Solid-state imager having gated photodiode and method for manufacturing the same
US4796072A (en) Solid-state imaging device with potential barriers between pixels
EP1217653B1 (en) Method of fabricating an active matrix photodiode array
US5210049A (en) Method of making a solid state image sensor
JPH06196703A (en) Thin film transistor and manufacture thereof
US4868623A (en) Image sensing device
EP0037244B1 (en) Method for fabricating a solid-state imaging device using photoconductive film
JPS60262459A (en) Manufacture of solid-state image pickup device
KR100263473B1 (en) Solid state image sensor and method of fabricating the same
US4684966A (en) Static induction transistor photodetector having a deep shielding gate region
JPH0936244A (en) Integrated circuit with cmos structure and its preparation
JPH04207076A (en) Manufacture of solid-state image pickup device
JP3421588B2 (en) Semiconductor device and manufacturing method thereof
JPH069242B2 (en) Solid-state image sensor and manufacturing method thereof
JP2904545B2 (en) High breakdown voltage planar semiconductor device and method of manufacturing the same
JP4929424B2 (en) Signal processing device
US5038190A (en) Photoelectric conversion device with disabled electrode
US6537899B2 (en) Semiconductor device and a method of fabricating the same
JPH03259570A (en) Solid-state image sensing device and manufacture thereof
KR840001604B1 (en) Method for fabrication a solid - state imaging device
JP2877656B2 (en) Method for manufacturing solid-state imaging device
JP2522832Y2 (en) Thin film transistor
JPS61198774A (en) Solid state image pick-up device and manufacture thereof
KR100340872B1 (en) thyristor device and method for manufacturing the same