JPH069242B2 - Solid-state image sensor and manufacturing method thereof - Google Patents
Solid-state image sensor and manufacturing method thereofInfo
- Publication number
- JPH069242B2 JPH069242B2 JP60226900A JP22690085A JPH069242B2 JP H069242 B2 JPH069242 B2 JP H069242B2 JP 60226900 A JP60226900 A JP 60226900A JP 22690085 A JP22690085 A JP 22690085A JP H069242 B2 JPH069242 B2 JP H069242B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating layer
- solid
- photoconductive film
- laminating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000000926 separation method Methods 0.000 claims description 15
- 238000003384 imaging method Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000012212 insulator Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims 8
- 150000003376 silicon Chemical class 0.000 description 8
- 230000007547 defect Effects 0.000 description 7
- 230000002950 deficient Effects 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000000016 photochemical curing Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910017855 NH 4 F Inorganic materials 0.000 description 1
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 229910018594 Si-Cu Inorganic materials 0.000 description 1
- 229910008465 Si—Cu Inorganic materials 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000001444 catalytic combustion detection Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000000638 solvent extraction Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000003949 trap density measurement Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
- H01L27/14667—Colour imagers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、半導体基板上に走査回路および光導電膜を積
層化した固体撮像素子およびその製造方法に関するもの
である。Description: TECHNICAL FIELD The present invention relates to a solid-state imaging device in which a scanning circuit and a photoconductive film are laminated on a semiconductor substrate, and a manufacturing method thereof.
［従来の技術］ この種の積層型の固体撮像素子においては、光感度を高
めるために、非晶質水素化シリコンによる光導電膜をMO
S型，CCD型あるいはBBD型の走査回路基板上に積層させ
ている。第４図は走査回路をMOS型とした従来の固体撮
像素子の例を示し、同図(a)は断面の概要図、同図(b)は
表面を示す平面図で絵素のレイアウトが示されている。
図において、１は半導体基板、２はソース、３はゲー
ト、４はドレイン、５は信号出力線、６は絶縁層、７は
下地電極、８は非晶質水素化シリコンによる光導電膜、
９は絵素間分離層、10はITOなどの透明電極である。[Prior Art] In this type of stacked solid-state imaging device, a photoconductive film made of amorphous hydrogenated silicon is used to enhance the photosensitivity.
It is stacked on an S-type, CCD-type or BBD-type scanning circuit board. FIG. 4 shows an example of a conventional solid-state image sensor in which the scanning circuit is a MOS type. The figure (a) is a schematic view of a cross section, and the figure (b) is a plan view showing the surface, showing the layout of picture elements. Has been done.
In the figure, 1 is a semiconductor substrate, 2 is a source, 3 is a gate, 4 is a drain, 5 is a signal output line, 6 is an insulating layer, 7 is a base electrode, 8 is a photoconductive film made of amorphous hydrogenated silicon,
Reference numeral 9 is a separation layer between picture elements, and 10 is a transparent electrode such as ITO.
絵素を区画する下地電極７は光導電層８で発生したキャ
リアを蓄積し、ソース２に注入するが、その段差部7A上
に積層された非晶質水素化シリコンにはボイドやクラッ
クなどの欠陥が発生しやすい。これら欠陥が光導電層に
生じると、欠陥部分にリーク電流が流れて特性を著しく
劣化させる原因となる。The base electrode 7 for partitioning the picture elements accumulates the carriers generated in the photoconductive layer 8 and injects them into the source 2. The amorphous hydrogenated silicon laminated on the stepped portion 7A has voids, cracks, etc. Defects are likely to occur. When these defects occur in the photoconductive layer, a leak current flows in the defective portion, which causes the characteristics to be significantly deteriorated.
このような欠点をなくすために、下地電極を二つに別け
る試みもなされている。第５図はそのような固体撮像素
子の例で、同図（ａ）は構造の概要を示す断面図、同図
(b)は表面を示す平面図である。図に示すように、下地
電極は平坦な２次電極72と、２次電極72とソース２を結
ぶ１次電極71に分割されている以外第４図の固体撮像素
子と変わらない。このように２次電極72を平坦化するこ
とによって、段差部7Aをなくすことができるが、２次電
極72の端部7Bおよび１次電極71と２次電極72の接続部7D
上に生ずる段差部7C付近に積層された非晶質水素化シリ
コンには、やはり第４図の段差部7A上におけると同様の
欠陥が発生しやすく、完全な解決策とはなっていない。In order to eliminate such a defect, attempts have been made to separate the base electrode into two. FIG. 5 shows an example of such a solid-state image pickup device, and FIG. 5 (a) is a sectional view showing the outline of the structure.
(b) is a plan view showing the surface. As shown in the figure, the base electrode is the same as the solid-state image sensor of FIG. 4 except that it is divided into a flat secondary electrode 72 and a primary electrode 71 connecting the secondary electrode 72 and the source 2. By thus flattening the secondary electrode 72, the step portion 7A can be eliminated, but the end portion 7B of the secondary electrode 72 and the connecting portion 7D of the primary electrode 71 and the secondary electrode 72 are eliminated.
Amorphous silicon hydride stacked near the step portion 7C generated above is likely to have the same defects as those on the step portion 7A in FIG. 4, and is not a complete solution.
さらにまた、非晶質水素化シリコンを利用した固体撮像
素子においては、平面方向の抵抗が固体撮像素子の要求
性能に比べて若干低いため、解像度が劣化し、混色も大
きい。この欠点を除去すべく非晶質シリコン膜を高抵抗
化した場合、キャリア移動度が低下したり、高抵抗化に
伴うトラップ密度の増加による残像の増加などの欠点が
あった。Furthermore, in a solid-state image sensor using amorphous silicon hydride, the resistance in the plane direction is slightly lower than the required performance of the solid-state image sensor, so the resolution is degraded and the color mixture is large. When the resistance of the amorphous silicon film is increased to eliminate this defect, there are drawbacks such as a decrease in carrier mobility and an increase in afterimage due to an increase in trap density accompanying the increase in resistance.
［発明が解決しようとする問題点］ そこで本発明の目的は、上述した解像度の劣化や混色の
発生という欠点を除去するために、非晶質水素化シリコ
ン膜を絵素毎に分離させると共に、その際にクラックや
ボイドなどの欠陥が発生しないように適切に処理工程を
進め、しかも工程の簡略化を計った固体撮像素子および
その製造方法を提供することにある。[Problems to be Solved by the Invention] Therefore, an object of the present invention is to separate an amorphous hydrogenated silicon film for each picture element in order to eliminate the above-mentioned drawbacks of deterioration of resolution and occurrence of color mixture. It is an object of the present invention to provide a solid-state imaging device and a method for manufacturing the solid-state imaging device, in which processing steps are appropriately performed so that defects such as cracks and voids do not occur at that time, and the steps are simplified.
［問題点を解決するための手段］ かかる目的を達成するため、本発明においては、半導体
基板上に走査回路と光導電層を積層した固体撮像素子の
製造方法において、絵素間の分離と下地電極の段差部の
除去を同時に行うことを特徴とする。[Means for Solving the Problems] In order to achieve such an object, in the present invention, in a method of manufacturing a solid-state imaging device in which a scanning circuit and a photoconductive layer are stacked on a semiconductor substrate, separation between picture elements and a base are performed. It is characterized in that the stepped portions of the electrodes are removed at the same time.
また、本発明においては、半導体基板上に走査回路と光
導電層を積層した固体撮像素子の製造方法において、１
次電極と２次電極の接続部を絵素間分離部に位置せしめ
絵素間の分離と下地電極の段差部の除去を同時に行うこ
とを特徴とする。Further, according to the present invention, in a method for manufacturing a solid-state imaging device in which a scanning circuit and a photoconductive layer are laminated on a semiconductor substrate, 1
It is characterized in that the connecting portion between the secondary electrode and the secondary electrode is located in the inter-pixel separation portion so that the separation between the picture elements and the stepped portion of the base electrode are simultaneously performed.
［作用］ 本発明によれば、絵素の分離に際して、２次電極の段差
にもとづく光導電層の欠陥部を同時に除去できるので、
絵素間のリーク、混色などを防止できる。[Operation] According to the present invention, when the pixels are separated, the defective portion of the photoconductive layer due to the step of the secondary electrode can be removed at the same time.
It is possible to prevent leakage between picture elements and color mixture.
［実施例］ 以下、図面を参照して、本発明を詳細に説明する。[Examples] Hereinafter, the present invention will be described in detail with reference to the drawings.
第１図は本発明の実施例を説明する図で、同図(ａ)は断
面の概要図、同図(ｂ)は表面を示す平面図である。Si基
盤１上に通常の方法でMOS型の走査回路を作製する。２
はソース、３はゲート、４はドレイン、５は出力線、６
はSiO2、Si3N4、ポリイミドなどからなる絶縁層、71はA
l-Si、Al-Si-CuまたはMoなどからなる１次電極である。
１次電極を形成したのち、絶縁層６で１次電極をおお
い、次に7Dのコンタクト部にコンタクトホールをあけさ
らに２次電極72をスパッタなどの方法によって形成す
る。２次電極の材質は１次電極と同様である。２次電極
72の上に例えば非晶質水素化シリコンからなる光導電層
８をSiH4のグロー放電によって堆積する。光導電層８の
表面にレジスト剤によってマスクパターンを形成し、エ
ッチングによって絵素間部の光導電層８を除去する。除
去部は11で示される。この時、本発明においては、２次
電極の端の端部7Bおよび接続部7D上の段差部7Cの一部を
同時に除去する。これによって前述した光導電層の欠陥
は除去される。光導電層の除去によって形成された溝に
SiO2、Si3N4、ポリイミドなどの絶縁物をCVD、光硬化法
などによって充填して絵素間分離層とする。溝部以外の
不要部の絶縁物をフォトエッチングにより除去し、透明
電極10を蒸着する。こうして作製された固体撮像素子
は、第１図(b)と従来例の第５図(ｂ)とを比較すると明
らかなように、絵素内に２次電極の端部7Bがなく、接続
部7D上の段差部7Cも減少している。それだけ絵素内にお
ける光導電層８の欠陥部が除去され、リーク、混色など
の発生が少ない。FIG. 1 is a diagram for explaining an embodiment of the present invention, FIG. 1 (a) is a schematic view of a cross section, and FIG. 1 (b) is a plan view showing a surface. A MOS type scanning circuit is manufactured on the Si substrate 1 by a usual method. Two
Is a source, 3 is a gate, 4 is a drain, 5 is an output line, 6
Is an insulating layer made of SiO 2 , Si 3 N 4 , polyimide, etc., 71 is A
A primary electrode made of l-Si, Al-Si-Cu, Mo, or the like.
After forming the primary electrode, the insulating layer 6 covers the primary electrode, and then a contact hole is formed in the contact portion of 7D, and the secondary electrode 72 is formed by a method such as sputtering. The material of the secondary electrode is the same as that of the primary electrode. Secondary electrode
A photoconductive layer 8 of, for example, amorphous hydrogenated silicon is deposited on 72 by glow discharge of SiH 4 . A mask pattern is formed on the surface of the photoconductive layer 8 with a resist agent, and the photoconductive layer 8 in the inter-pixel portion is removed by etching. The remover is shown at 11. At this time, in the present invention, the end portion 7B at the end of the secondary electrode and a part of the step portion 7C on the connection portion 7D are simultaneously removed. This removes the above-mentioned defects in the photoconductive layer. In the groove formed by the removal of the photoconductive layer
An insulating material such as SiO 2 , Si 3 N 4 or polyimide is filled by CVD, a photo-curing method or the like to form an inter-pixel separation layer. An unnecessary portion of the insulator other than the groove is removed by photoetching, and the transparent electrode 10 is deposited. As can be seen by comparing FIG. 1 (b) with FIG. 5 (b) of the conventional example, the solid-state imaging device thus manufactured has no secondary electrode end 7B in the pixel and has a connecting portion. The stepped portion 7C on 7D is also reduced. To that extent, the defective portion of the photoconductive layer 8 in the picture element is removed, and the occurrence of leakage, color mixing, etc. is reduced.
絵素間の分離は次の方法によることも可能である。すな
わち、２次電極72上にSiH4のグロー放電によって非晶質
水素化シリコンの光導電層８を形成する。次にスパッタ
などによってITO、酸化錫などによる透明電極10を形成
する。透明電極上にレジスト剤によるマスクパターンを
形成する。HFとNH4Fの１：６混合液によって透明電極10
の絵素間分離部をエッチングする。残された透明電極を
マスクとして非晶質水素化シリコン光導電層８をCCl F3
によってプラズマエッチする。エッチングは光導電層の
厚さ２μｍのとき、圧力170mTorr、電力300Wで10分間程
度である。形成された溝部にSiO2、Si3N4をCVDにより、
またはポリイミドを光硬化によって充填し、絵素間分離
層とする。不要部分の絶縁物をフォトエッチングまたは
プラズマエッチングによって除去する。溝部の表面にIT
Oからなる透明電極をスパッタなどによって形成し、絵
素間で切断されたITOを再接続する。Separation between picture elements can also be performed by the following method. That is, the photoconductive layer 8 of amorphous hydrogenated silicon is formed on the secondary electrode 72 by glow discharge of SiH 4 . Next, the transparent electrode 10 made of ITO, tin oxide or the like is formed by sputtering or the like. A mask pattern made of a resist agent is formed on the transparent electrode. Transparent electrode with a 1: 6 mixture of HF and NH 4 F 10
The separation between the picture elements is etched. Using the remaining transparent electrode as a mask, the amorphous silicon hydride photoconductive layer 8 is covered with CCl F 3
Plasma etch by. The etching is performed at a pressure of 170 mTorr and a power of 300 W for about 10 minutes when the thickness of the photoconductive layer is 2 μm. SiO 2 , Si 3 N 4 in the formed groove by CVD,
Alternatively, polyimide is filled by photo-curing to form an inter-pixel separation layer. The unnecessary portion of the insulator is removed by photo etching or plasma etching. IT on the surface of the groove
A transparent electrode made of O is formed by sputtering or the like, and the ITO cut between the picture elements is reconnected.
なお、透明電極をマスクとした光導電層のプラズマエッ
チングは、一度に行なうのでなく、くりかえして行なっ
てもよい。The plasma etching of the photoconductive layer using the transparent electrode as a mask may be performed repeatedly instead of once.
このように光導電層の欠陥部の除去と絵素間の分離を同
時に行なうに際して、１次電極71と２次電極72の接続部
7Dの位置を変えると、より大きな効果が得られる。In this way, when the defective portion of the photoconductive layer is removed and the pixels are separated at the same time, the connecting portion of the primary electrode 71 and the secondary electrode 72 is connected.
Changing the position of 7D has a greater effect.
第２図は本発明の他の実施例の表面を示す平面図で、１
次電極71と２次電極72の接続を２次電極の辺の全長にわ
たって行なった例で、斜線部は除去された部分である。
第１図(ｂ)の例では段差は三つの辺（うち２辺は長さが
他の辺の約半分）に存在するが、第２図の例では段差は
一辺のみに存在する。FIG. 2 is a plan view showing the surface of another embodiment of the present invention.
In the example in which the secondary electrode 71 and the secondary electrode 72 are connected over the entire length of the side of the secondary electrode, the shaded portion is the removed portion.
In the example of FIG. 1 (b), the step exists on three sides (of which two sides are about half the length of the other side), but in the example of FIG. 2, the step exists on only one side.
第３図は他の実施例における第２図と同様の平面図で、
１次電極71と２次電極72の接続部を２次電極の一隅に移
した例である。接続部の面積は４μｍ２（２μｍ角）あ
れば十分なので、第３図の例のように接続部を２次電極
一隅に移して小面積としても差支えない。FIG. 3 is a plan view similar to FIG. 2 in another embodiment,
This is an example in which the connecting portion between the primary electrode 71 and the secondary electrode 72 is moved to one corner of the secondary electrode. Since the area of the connecting portion is 4 μm 2 (2 μm square), it is sufficient to move the connecting portion to one corner of the secondary electrode to reduce the area as in the example of FIG.
第５図の従来例と比較して第１図および第２図の例では
段差部1/2以下に、第３図の例では1/3ないし1/4に減少
することができるので、段差による非晶質水素化シリコ
ンへの悪影響を取り除くことができる。Compared with the conventional example of FIG. 5, the step portions can be reduced to 1/2 or less in the examples of FIGS. 1 and 2, and can be reduced to 1/3 to 1/4 in the example of FIG. The adverse effect on amorphous hydrogenated silicon due to the above can be eliminated.
これまでの実施例では、光導電層として主に非晶質水素
化シリコンの例について述べたが、ニュービコン膜，ビ
ジコン膜（Sb2S3），ポリシリコンを光導電層として用
いた場合も同様の効果がある。また、本発明をCCD、BBD
などMOS以外の走査回路を有する固体撮像素子に適用で
きることは言うまでもない。In the above examples, the example of amorphous hydrogenated silicon was mainly described as the photoconductive layer, but the same applies to the case where a new vidone film, a vidicon film (Sb 2 S 3 ) or polysilicon is used as the photoconductive layer. Has the effect of. The present invention also applies to CCDs and BBDs.
It goes without saying that the present invention can be applied to a solid-state image sensor having a scanning circuit other than MOS.
［発明の効果］ 以上述べたように、本発明によれば、絵素の分離に際し
て、２次電極の段差にもとづく光導電層の欠陥部を同時
に除去できるので、絵素間のリーク、混色などを防止で
きる。[Effects of the Invention] As described above, according to the present invention, when the picture elements are separated, the defective portion of the photoconductive layer due to the step of the secondary electrode can be removed at the same time. Can be prevented.
第１図は本発明の実施例を説明する図、 第２図、第３図はそれぞれ本発明の他の実施例の表示を
示す平面図、 第４図、第５図はそれぞれ従来の固体撮像素子を説明す
る概要図である。 １…基板、 ２…ソース、 ３…ゲート、 ４…ドレイン、 ６…絶縁層、 ７…下地電極、 71…１次電極、 72…２次電極、 7A、7B、7C…段差部、 ８…光導電層、 ９…絵素間分離層、 10…透明電極、 11…除去部。FIG. 1 is a diagram for explaining an embodiment of the present invention, FIGS. 2 and 3 are plan views showing a display of another embodiment of the present invention, and FIGS. 4 and 5 are conventional solid-state imaging devices, respectively. It is a schematic diagram explaining an element. 1 ... Substrate, 2 ... Source, 3 ... Gate, 4 ... Drain, 6 ... Insulating layer, 7 ... Base electrode, 71 ... Primary electrode, 72 ... Secondary electrode, 7A, 7B, 7C ... Stepped portion, 8 ... Light Conductive layer, 9 ... Pixel separation layer, 10 ... Transparent electrode, 11 ... Removal section.
Claims (3)
を有する半導体基板と、該接合部に接続された第１の電
極と、該第１の電極上に積層された絶縁層と、該絶縁層
の一部上に積層された絵素間分離層と、前記第１の電極
上の所定の位置に設けられた接続部に接続され、且つ前
記絶縁層の一部上に積層された該接続部付近上に段差部
を有する第２の電極と、該第２の電極および前記絶縁層
の一部上に積層された光導電膜と、該光導電膜および前
記絵素間分離層上に積層された透明電極とを備える固体
撮像素子において、 前記絵素間分離層を前記絶縁層の一部および前記第２の
電極の一部上に積層し、前記光導電膜を前記第２の電極
の一部上に積層するように構成したことを特徴とする固
体撮像素子。1. A semiconductor substrate having a joint portion and a scanning portion adjacent to the joint portion, a first electrode connected to the joint portion, an insulating layer laminated on the first electrode, The inter-pixel separation layer laminated on a part of the insulating layer and the connection part connected to a connection portion provided at a predetermined position on the first electrode, and laminated on a part of the insulating layer. A second electrode having a step portion near the connection portion, a photoconductive film laminated on the second electrode and a part of the insulating layer, and on the photoconductive film and the inter-pixel separation layer. In a solid-state imaging device including a laminated transparent electrode, the inter-pixel separation layer is laminated on a part of the insulating layer and a part of the second electrode, and the photoconductive film is the second electrode. A solid-state imaging device, characterized in that the solid-state imaging device is configured to be laminated on a part of the.
は、 接合部およびこの接合部と隣接する走査部を有する半導
体基板を作成するステップと、 該接合部に接続される第１の電極を作成するステップ
と、 該第１の電極上に絶縁層を積層するステップと、 前記第１の電極上の所定の位置に設けられた接続部に接
続され、且つ該絶縁層の一部上に該接続部付近上に段差
部を有する第２の電極を積層するステップと、 該第２の電極および前記絶縁層上に光導電膜を積層する
ステップと、 絵素間の該光導電膜を除去する時に、前記第２の電極の
端部および段差部付近上の該光導電膜をも同時に除去し
除去部を作成するステップと、 該除去部に絶縁物を充填し絵素間分離層を作成するステ
ップと、 該絵素間分離層および前記光導電膜上に透明電極を積層
するステップとを含むことを特徴とする固体撮像素子の
製造方法。2. A method for manufacturing a solid-state imaging device, the method comprising: forming a semiconductor substrate having a junction and a scanning section adjacent to the junction; and forming a first electrode connected to the junction. A step of forming, a step of laminating an insulating layer on the first electrode, a step of connecting to a connecting portion provided at a predetermined position on the first electrode, and a step of forming the insulating layer on a part of the insulating layer. Laminating a second electrode having a step portion near the connection portion, laminating a photoconductive film on the second electrode and the insulating layer, and removing the photoconductive film between pixels. At the same time, a step of removing the photoconductive film on the edge of the second electrode and the vicinity of the step portion at the same time to form a removed portion, and filling the removed portion with an insulator to form an inter-pixel separation layer And a transparent electrode on the inter-pixel separation layer and the photoconductive film. Method for manufacturing a solid-state imaging device characterized by comprising the steps of laminating.
は、 接合部およびこの接合部と隣接する走査部を有する半導
体基板を作成するステップと、 該接合部に接続される第１の電極を作成するステップ
と、 該第１の電極上に絶縁層を積層するステップと、 前記第１の電極上の所定の位置に設けられた接続部に接
続され、且つ該絶縁層の一部上に該接続部付近上に段差
部を有する第２の電極を積層するステップと、 該第２の電極および前記絶縁層上に光導電膜を積層する
ステップと、 該光導電膜上に透明電極を積層するステップと、 絵素間の該透明電極および前記光導電膜を除去する時
に、前記第２の電極の端部および段差部付近上の前記光
導電膜をも同時に除去し除去部を作成するステップと、 該除去部に絶縁物を充填し絵素間分離層を作成するステ
ップとを含むことを特徴とする固体撮像素子の製造方
法。3. A method for manufacturing a solid-state image sensor, the method comprising: forming a semiconductor substrate having a junction and a scanning section adjacent to the junction; and forming a first electrode connected to the junction. A step of forming, a step of laminating an insulating layer on the first electrode, a step of connecting to a connecting portion provided at a predetermined position on the first electrode, and a step of forming the insulating layer on a part of the insulating layer. Laminating a second electrode having a step portion near the connection portion, laminating a photoconductive film on the second electrode and the insulating layer, and laminating a transparent electrode on the photoconductive film. And a step of removing the transparent electrode between the pixels and the photoconductive film at the same time, and removing the photoconductive film on the edge and the vicinity of the step of the second electrode. , A separation layer between picture elements filled with an insulator in the removed portion Method of manufacturing a solid-state imaging device which comprises the steps of creating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60226900A JPH069242B2 (en) | 1985-10-14 | 1985-10-14 | Solid-state image sensor and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60226900A JPH069242B2 (en) | 1985-10-14 | 1985-10-14 | Solid-state image sensor and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6286854A JPS6286854A (en) | 1987-04-21 |
| JPH069242B2 true JPH069242B2 (en) | 1994-02-02 |
Family
ID=16852351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60226900A Expired - Lifetime JPH069242B2 (en) | 1985-10-14 | 1985-10-14 | Solid-state image sensor and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069242B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6035013A (en) * | 1994-06-01 | 2000-03-07 | Simage O.Y. | Radiographic imaging devices, systems and methods |
| GB2289983B (en) * | 1994-06-01 | 1996-10-16 | Simage Oy | Imaging devices,systems and methods |
| JP4271268B2 (en) | 1997-09-20 | 2009-06-03 | 株式会社半導体エネルギー研究所 | Image sensor and image sensor integrated active matrix display device |
| KR101108852B1 (en) * | 2009-01-06 | 2012-01-31 | 유남열 | A multifunctional manual miscellaneous grain crop selector |
| JP5138107B2 (en) * | 2012-03-20 | 2013-02-06 | 株式会社半導体エネルギー研究所 | Image sensors, electronic devices |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61206258A (en) * | 1985-03-11 | 1986-09-12 | Toshiba Corp | Solid-state image pickup device |
-
1985
- 1985-10-14 JP JP60226900A patent/JPH069242B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6286854A (en) | 1987-04-21 |
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