JPS60257693A - Color solid-state image pickup device - Google Patents

Abstract

PURPOSE:To eliminate the effect of a subcarrier wave on a signal processing circuit by locking always the phase of a horizontal scanning pulse and the subcarrier wave of a solid-state image pickup device. CONSTITUTION:A JK-FF43 generates a horizontal scanning pulse phiH based on a master clock CK. A subcarrier wave generator consists of JK-FF41, 42, the master clock CK is subject to 1/2 frequency division by the JK-FF41, a pulse SC' generated continuously even during the horizontal scanning blanking period with the same phase as the phiH is obtained and the normal subcarrier wave is obtained while being subject to 1/2 frequency division at the JK-FF42. Then the state inversion of the JK-FF41 is controlled complementarily by the phiH so as to generate the 1st pulse train of the same frequency and same phase to the phiH and the train is subject to 1/2 frequency division by the JK-FF42.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a color solid-state imaging device.

Conventional configuration and problems thereof In recent years, home video cameras using color solid-state image sensors have begun to be commercially available and have become popular.

While the image pickup tube is driven in an analog manner, the solid-state image sensor is driven in a digital manner, and the driving part/I for that purpose is digital.
/me is supplied from the synchronization signal generator to the solid-state image sensor via the logic circuit.

Hereinafter, a conventional example will be explained with reference to the drawings.

FIG. 1 is a block diagram of a camera using a solid-state image sensor. In Figure 1, (1) is a solid-state image sensor, (2) is a drive pulse generator, (3) is a luminance signal processing circuit, and (4) is a brightness signal processing circuit.
is a color signal processing circuit, (5) is a balanced modulator, (6) is a mixing circuit, and (7) is a synchronization signal generator.

A synchronization signal generator (71) generates pulses for signal processing, such as clamp pulses, Planking pulses, synchronization pulses, /I/nu, and subcarriers, and sends them to each circuit.

The drive pulse generator (2) uses the pulses generated by the synchronization signal generator (7) to generate a solid-state image sensor drive pulse to drive the solid-state image sensor (1). Solid-state image sensor (1
) is sent to a luminance signal processing circuit (3) and a color signal processing circuit (4), where a luminance signal ¥1 and two color difference signals C1 and C2 are respectively generated. color difference signal C1,
C2 is then sent to a balanced modulator (5) where it is converted into a Cronus signal Cr by a subcarrier SC from a synchronization signal generator (7) and sent to a mixing circuit (6) together with the previous luminance signal Y.
The signals are sent to the NTSC signal generator and mixed to form an NTSC signal. Here, a block diagram of the synchronizing signal generator (7) and the drive pulse generator (2) is shown in FIG.

In Fig. 2, there is a 4-frequency divider circuit and various pulse generators, and these generate the synchronous signal generator (7
) is configured. (23i is a horizontal scanning pulse generator of the solid-state image pickup device, (24J is also a vertical scanning pulse generator, and these pulse generators CI!31 and (241 correspond to the drive pulse generator in FIG. 1).

This circuit uses 14.31818 as the mask clock CK.
The MH2 clock is used. Mask clock CK is 4
The frequency is divided by 4 using the frequency divider circuit, which results in 3.58 MB2
subcarrier SC is generated. The master clock is also input to various pulse generators, and simultaneously generates the blanking pulse CBJ1 period signal C81 and the clamp pulse CL, as well as pulses for creating the solid-state image sensor drive pulse.

Horizontal scanning pulse generator (23j generates horizontal scanning pulse ψH from mask clock ■. This circuit is composed of a divide-by-2 circuit with a reset terminal. Vertical scanning pulse generator 1i (23j generates horizontal scanning pulse ψH from mask clock Generates a vertical scanning pulse ψ■ for the element.

Further, FIG. 3 shows in detail the 4-frequency divider circuit (21J) and the horizontal scanning pulse generator (23j) that generate subcarriers.

In FIG. 3, the 4-frequency divider circuit l2IJ consists of cascade-connected JK flip-flops (31) and (3).
The frequency divider circuit consists of another JK flip-flop (33). These flip-flops are circuits whose output Q is inverted by clock input.

Looking at the outputs SC' and ψH of the flip-flops SI) and 63), SC2 simply divides the clock CK, so its state is determined by the timing of power-on. On the other hand, ψIT is a pulse generator (
Horizontal scanning blanking pulse ψH created by 221
Since the CLR is reset every horizontal period, its state is fixed. That is, since the blanking pulse ψHCLR is generated in response to every other pulse of the clock CK, the horizontal scanning pulse ψI-I is not activated by the corresponding clock pulse, and is generated by a clock pulse that does not correspond to ψI-ICLR. It will definitely be energized by this.

On the other hand, the phase of the 2-frequency pulse generator is set when the power is turned on (initialization).
It is determined according to the immediately following clock pulse.

Therefore, although SC2 and ψH have the same frequency, whether they are in phase or in opposite phase is determined each time the power is turned on. Since the flip-flop (321) also has two modes of turning on in response to the input pulse SC', there are four cases of the phase relationship between the subcarrier SC and the horizontal scanning pulse ψH each time the power is turned on. Put it away.

The output signal of the solid-state image sensor is output in synchronization with the phase of the horizontal scanning pulse ψH, and as shown in FIG.
, C2 are generated and sent to the balanced modulator (5) and modulated by the subcarrier SC, but since the phase of the output signal is synchronized with the phase of the horizontal scanning pulse ψH,
A horizontal scanning pulse ψ■1 is applied to the color difference signal at the stage of creating the color difference signal.
A balanced modulator (5) is connected via the power supply.
If the synchronous noise of the horizontal scanning pulse ψH sneaks into the signal 1, the output chroma signal of the balanced modulator, which is modulated with subcarriers with different phases every time the power is turned on, will be affected. Therefore, when building a circuit, it is necessary to take very careful measures to eliminate this negative effect.

Purpose of the Invention In view of the above drawbacks, the present invention provides a subcarrier for balanced modulation,
It is an object of the present invention to provide a color solid-state imaging device in which the phase relationship between a solid-state imaging device and a horizontal scanning pulse does not change and does not adversely affect color signals.

Structure of the Invention In order to achieve this object, the color solid-state imaging device of the present invention always uses not only the clock but also the horizontal scanning pulse of the solid-state imaging device to invert the first divide-by-2 circuit that divides the frequency of the Manuta clock by 2. By performing complementary control, obtain a first continuous pulse that matches the frequency and phase of the horizontal scanning pulse,
dividing the first continuous pulse by two in a second divide-by-two circuit;
The obtained second continuous pulse is used as a subcarrier signal to modulate the two color difference signals obtained from the output signal of the solid-state image sensor, thereby converting it into a chroma signal compliant with the color television standard system. This constitutes stable balanced modulation. With this configuration, the subcarrier is created based on the horizontal scanning pulse of the solid-state image sensor, so the phase relationship with the horizontal scanning pulse is fixed regardless of the timing of power-on, and it does not adversely affect the color signal. That will happen.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. ◇ FIG. 4 shows a part of a driving circuit of a solid-state imaging device according to an embodiment of the present invention. In Figure 4, (41
), (42), and (43) are JK flip-flops, which are circuits whose output Q is inverted by clock input. Flip-flops +41+ and +421 are cascade-connected as a 4-frequency divider circuit (21') of the synchronizing signal generator, and the same (43)
is wired as a horizontal scanning pulse generator as shown in the figure.

That is, the output ψH of the flip-flop (43) is equal to the horizontal scanning blanking pulse ψHC in every horizontal period.
Since it is reset by LR, the pulse timing is as shown in FIG. 5. On the other hand, the output SC' of the flip-flop (41) is clocked with the same clock as the clock CK input to the flip-flop (431), and the J terminal of the flip-flop +411 is connected to the output of the flip-flop (43). Therefore, a pulse SC' is obtained which has the same phase as the output ψt of the flip-flop (43) and is generated continuously even during the horizontal scanning blanking period.This pulse is further divided into two by the flip-flop (42). By doing this, a regular subcarrier SC is obtained.The pulse timing of the obtained subcarrier SC and the pulse SC' in the previous stage of U is also as shown in Fig. 5.In this way, the phase of the subcarrier generation circuit is adjusted horizontally. By locking with the scanning pulse generation circuit, a subcarrier SC whose phase is completely synchronized with the horizontal scanning pulse ψH can be obtained.
This phase relationship does not change at all each time the power is turned on.

As described above, according to this embodiment, by locking the phase of the subcarrier generation circuit in the horizontal scanning pulse generation circuit of the solid-state imaging device, subcarriers that are always in phase with the horizontal scanning pulse ψH can be obtained. Various problems of the conventional example can be solved.

Effects of the Invention As described above, the present invention can eliminate the influence of the subcarrier on the signal processing circuit by always locking the phase of the horizontal scanning pulse of the solid-state imaging device and the subcarrier, and its practical effects are as follows. There's something big.

[Brief explanation of drawings]

Figure 1 is a general circuit block diagram of a solid-state imaging device, Figure 2 is a general circuit block diagram of a solid-state imaging device.
The figure is a block diagram of the solid-state image sensor drive circuit part.
The figure shows a conventional subcarrier generation circuit and a horizontal scanning pulse generation circuit in the drive circuit, FIG. 4 shows a subcarrier generation circuit and a horizontal scanning pulse generation circuit in an embodiment of the present invention, and FIG. 5 shows an embodiment of the present invention. It is a pulse timing diagram in an Example. (])... Solid-state image sensor (2)... Drive pulse generator (3)... Luminance signal processing circuit (4)... Color signal processing circuit (5) ...Balanced modulator (6) ...Mixing circuit (7) ...Synchronizing signal generator conversion ...4 frequency divider circuit ...Various pulse generators c! 3)...Horizontal scanning pulse generator c! 4)...
... Vertical Parnu generator patent applicant Matsushita Electric Industrial Co., Ltd. Agent Kenbu Niimi (1 other person) Figure 1 L J

Claims (1)

[Claims] A horizontal scanning pulse generator for generating horizontal scanning pulses based on the mask clock, a first divide-by-2 circuit that divides the mask clock by two, and the divide-by-2 circuit is further divided into two.
and a subcarrier generator consisting of a second frequency divider circuit that performs frequency division, and by complementary controlling the state inversion of the first frequency divider circuit with the horizontal scanning pulse, the horizontal scanning pulse A color solid-state imaging device, characterized in that a first pulse train having the same frequency and phase is generated, and the frequency of the first pulse train is divided by two by the second frequency divider circuit.