JPS60257122A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS60257122A JPS60257122A JP11071784A JP11071784A JPS60257122A JP S60257122 A JPS60257122 A JP S60257122A JP 11071784 A JP11071784 A JP 11071784A JP 11071784 A JP11071784 A JP 11071784A JP S60257122 A JPS60257122 A JP S60257122A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- layer
- single crystal
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 239000013078 crystal Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000012535 impurity Substances 0.000 claims abstract description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 15
- 238000009792 diffusion process Methods 0.000 claims abstract description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 5
- 230000008018 melting Effects 0.000 claims description 3
- 238000002844 melting Methods 0.000 claims description 3
- 238000002425 crystallisation Methods 0.000 claims 1
- 230000008025 crystallization Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract description 7
- 239000010410 layer Substances 0.000 abstract 5
- 230000004927 fusion Effects 0.000 abstract 1
- 239000002344 surface layer Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 8
- 238000000407 epitaxy Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- -1 argon ion Chemical class 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は半導体装置の構造に関し、詳しくは絶縁膜上の
単結晶シリコン層形成を半導体基板表面に予め形成され
た不純物層を拡散することなく行なうための構造に関す
る。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the structure of a semiconductor device, and more specifically, to forming a single crystal silicon layer on an insulating film without diffusing an impurity layer previously formed on the surface of a semiconductor substrate. Concerning the structure for.
絶縁膜上の多結晶もしくは非晶質シリコン層を(1)
単結晶化する方法の1つに、ブリッジングエピタキシー
法がある。この方法は、単結晶基板上の一部に絶縁膜領
域を設け、この上に形成した多結晶もしくは非晶質シリ
コン層をエネルギービームの照射により融解せしめ、再
同化の際に結晶成長が単結晶基板上部から非晶質領域そ
して絶縁膜上へと進む事を利用したものである。従って
、この方法に於ては、結晶成長が単結晶基板上部から絶
縁膜上へ進むので絶縁膜が厚いと結晶成長が困難となる
。このため、絶縁膜を薄くする必要がある。(1) One method for converting a polycrystalline or amorphous silicon layer on an insulating film into a single crystal is the bridging epitaxy method. In this method, an insulating film region is provided on a part of a single crystal substrate, and the polycrystalline or amorphous silicon layer formed on this is melted by irradiation with an energy beam, and during reassimilation, the crystal growth is reduced to a single crystal. This takes advantage of the fact that it progresses from the top of the substrate to the amorphous region and onto the insulating film. Therefore, in this method, crystal growth proceeds from the upper part of the single crystal substrate onto the insulating film, so if the insulating film is thick, crystal growth becomes difficult. Therefore, it is necessary to make the insulating film thinner.
しかし、絶縁膜を非常に薄くすると、エネルギービーム
の照射の際、融解が絶縁膜下の下層基板にまで及び、こ
こに形成した不純物層が拡散される欠点があった。However, if the insulating film is made very thin, there is a drawback that when the energy beam is irradiated, the melting will extend to the lower substrate under the insulating film, and the impurity layer formed there will be diffused.
本発明の目的は、上記従来の問題を解決するため、ブリ
ッジングエピタキシー法による絶縁膜上の単結晶膜の製
造に関し、予め形成された半導体基板表面の不純物が拡
散されない絶縁膜厚を提供する事にある。SUMMARY OF THE INVENTION In order to solve the above-mentioned conventional problems, an object of the present invention is to provide an insulating film with a thickness that prevents impurities on the surface of a semiconductor substrate formed in advance from being diffused in the production of a single crystal film on an insulating film by a bridging epitaxy method. It is in.
(2)
〔発明の概要〕
上記目的を達成するため、本発明は絶縁膜上の多結晶も
しくは非晶質シリコン層を単結晶化する際に、上記絶縁
膜下に予め形成した半導体基板表面の不純物層が拡散さ
れない厚さの絶縁膜を形成し、ブリッジングエピタキシ
ーを行なうものである。(2) [Summary of the Invention] In order to achieve the above object, the present invention provides a method for monocrystallizing a polycrystalline or amorphous silicon layer on an insulating film, by forming a layer on the surface of a semiconductor substrate previously formed under the insulating film. In this method, an insulating film is formed with a thickness that prevents the impurity layer from being diffused, and bridging epitaxy is performed.
以下、本発明の一実施例を説明する。 An embodiment of the present invention will be described below.
まず、P型車結晶シリコン(100)基板1上にレジス
トパターン2を形成した後、5X10”cm −”のリ
ン(P)イオン注入により不純物拡散n上層3を形成し
、レジスタパターン2を除去した。この試料を第1図に
示す。次に、不純物拡散層を覆うように周知のLOCO
5酸化法により酸化膜4、さらに5IH4の熱分解によ
り厚さ0.4μmの多結晶シリコン膜5を形成した。(
第2図参照)その後、連続発振アルゴンイオンレーザ光
6を図のように走査しながら照射し、上記多結晶シリコ
ン膜5の単結晶化を行なった。照射条件は、試料(3)
基板温度を500℃とし、ビーム直径100μm、照射
パワー5〜16W、ビーム走査速度1〜100m/sと
した。First, a resist pattern 2 was formed on a P-type crystal silicon (100) substrate 1, and then an impurity-diffused n upper layer 3 was formed by implanting phosphorus (P) ions of 5×10 cm − , and the resist pattern 2 was removed. . This sample is shown in FIG. Next, the well-known LOCO is applied to cover the impurity diffusion layer.
An oxide film 4 was formed by the 5I oxidation method, and a polycrystalline silicon film 5 with a thickness of 0.4 μm was formed by thermal decomposition of 5IH4. (
(See FIG. 2) Thereafter, continuous wave argon ion laser light 6 was irradiated while scanning as shown in the figure, thereby converting the polycrystalline silicon film 5 into a single crystal. The irradiation conditions were as follows: Sample (3) substrate temperature was 500° C., beam diameter was 100 μm, irradiation power was 5 to 16 W, and beam scanning speed was 1 to 100 m/s.
例えば、ビーム走査速度10a+/sの場合の絶縁膜々
厚とレーザパワーの条件における不純物層3の拡散の有
無を調べた結果を第3図に示す。図において、領域Aは
多結晶シリコンの非融解条件、領域Bは不純物層の拡散
条件、線Cは単結晶基板から絶縁膜上の多結晶シリコン
に結晶成長が生じるための最高絶縁膜々厚条件、領域り
は最適条件領域である。すなわち、レーザパワー11.
5W以下の領域Aの場合、絶縁膜上の多結晶シリコン膜
5が融解しないため結晶成長せず、領域Bでは不純物層
の拡散が生じる。従って、不純物層の拡散が生じないた
めには、D領域の条件を選定する必要がある事がわかる
。また、上記絶縁膜上の多結晶シリコン膜が、単結晶シ
リコン上部から結晶成長したのは、絶縁膜が0.9μm
以下の膜厚であった。For example, FIG. 3 shows the results of examining the presence or absence of diffusion of the impurity layer 3 under conditions of insulating film thickness and laser power when the beam scanning speed is 10a+/s. In the figure, region A is the non-melting condition for polycrystalline silicon, region B is the diffusion condition for the impurity layer, and line C is the maximum insulating film thickness condition for crystal growth to occur from the single crystal substrate to the polycrystalline silicon on the insulating film. , the area RI is the optimum condition area. That is, laser power 11.
In the case of region A of 5W or less, the polycrystalline silicon film 5 on the insulating film is not melted, so crystal growth does not occur, and in region B, the impurity layer is diffused. Therefore, it can be seen that it is necessary to select the conditions for the D region in order to prevent diffusion of the impurity layer. In addition, the reason why the polycrystalline silicon film on the above insulating film was crystal-grown from the top of the single crystal silicon was that the insulating film had a thickness of 0.9 μm.
The film thickness was as follows.
以上の結果から、単結晶シリコン基板上部から(4)
絶縁膜上の多結晶シリコンへと結晶成長が生じる事によ
る結晶方位の画一した単結晶シリコンが得られ、絶縁膜
下層の不純物が拡散しないためには0.3〜0.9μm
の絶縁膜々厚が必要である事がわかる。この0.3〜0
.9μmの絶縁膜4を用いて、多結晶シリコン膜5に対
しレーザ照射を行なったところ不純物層3を拡散する事
なく、多結晶シリコン膜5を単結晶化する事ができた。From the above results, crystal growth occurs from the top of the single-crystal silicon substrate to the polycrystalline silicon on the insulating film (4), resulting in single-crystal silicon with uniform crystal orientation, and impurities in the lower layer of the insulating film do not diffuse. For 0.3-0.9μm
It can be seen that a thickness of the insulating film is required. This 0.3~0
.. When the polycrystalline silicon film 5 was irradiated with laser using the 9 μm thick insulating film 4, the polycrystalline silicon film 5 could be made into a single crystal without diffusing the impurity layer 3.
上記説明から明らかなように眉間絶縁膜0.3〜0.9
μm有する事により、単結晶基板と同方位の単結晶シリ
コン膜形成時に基板表面の不純物層が拡散されない。As is clear from the above explanation, the glabella insulating film is 0.3 to 0.9
By having .mu.m, the impurity layer on the surface of the substrate is not diffused when forming a single crystal silicon film in the same orientation as the single crystal substrate.
第1図および第2図は試料の断面図、第3図は絶縁膜々
厚とレーザパワー条件における不純物層の拡散の関係を
示すグラブである。
1・・・単結晶シリコン基板、2・・・レジストパター
ン、3・・・不純物層、4・・・酸化膜、5・・・多結
晶シリコン膜、6・・・連続発振アルゴンイオンレーザ
光・(5)1 and 2 are cross-sectional views of the sample, and FIG. 3 is a graph showing the relationship between the thickness of the insulating film and the diffusion of the impurity layer under laser power conditions. DESCRIPTION OF SYMBOLS 1... Single crystal silicon substrate, 2... Resist pattern, 3... Impurity layer, 4... Oxide film, 5... Polycrystalline silicon film, 6... Continuous wave argon ion laser beam. (5)
Claims (1)
半導体基板上に被着された絶縁膜を連続して覆う多結晶
もしくは非晶質シリコン膜を局所加熱融解によって単結
晶化させてなる半導体装置において、単結晶化の際に半
導体基板表面の不純物層の拡散を防止するとともに、半
導体基板の露出された表面を結晶成長の種とすることに
よる結晶方位を画一化する為に、上記絶縁膜厚を0.3
〜0.9μmとした事を特徴とする半導体装置。A semiconductor device in which a polycrystalline or amorphous silicon film that continuously covers an exposed surface of a semiconductor substrate and an insulating film deposited on a semiconductor substrate having an impurity layer on the surface is made into a single crystal by local heating and melting. In order to prevent the diffusion of the impurity layer on the surface of the semiconductor substrate during single crystallization and to standardize the crystal orientation by using the exposed surface of the semiconductor substrate as a seed for crystal growth, the insulating film is Thickness 0.3
A semiconductor device characterized in that the thickness is 0.9 μm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11071784A JPS60257122A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11071784A JPS60257122A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60257122A true JPS60257122A (en) | 1985-12-18 |
Family
ID=14542695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11071784A Pending JPS60257122A (en) | 1984-06-01 | 1984-06-01 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60257122A (en) |
-
1984
- 1984-06-01 JP JP11071784A patent/JPS60257122A/en active Pending
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