JPS60254639A - Electrode film and manufacture thereof - Google Patents

Electrode film and manufacture thereof

Info

Publication number
JPS60254639A
JPS60254639A JP10991184A JP10991184A JPS60254639A JP S60254639 A JPS60254639 A JP S60254639A JP 10991184 A JP10991184 A JP 10991184A JP 10991184 A JP10991184 A JP 10991184A JP S60254639 A JPS60254639 A JP S60254639A
Authority
JP
Japan
Prior art keywords
layer
nicr
electrode film
target
nichrome
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10991184A
Other languages
Japanese (ja)
Inventor
Toshihiro Nakayama
中山 利博
Hiroyuki Yonehara
浩幸 米原
Shinji Yoshida
真治 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10991184A priority Critical patent/JPS60254639A/en
Publication of JPS60254639A publication Critical patent/JPS60254639A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To form electrode films without damaging the quality of adhesion surfaces by a method wherein an electrode film produced by metal lamination is adhered on a nichrome layer as the lower layer by adhesion through magnetron- sputtering. CONSTITUTION:A plurality of targets 12 incorporated together with the anode and a magnet for impressing the orthogonal electromagnetic field are arranged by dispersion in opposition to the outer cylindrical plane of a substrate holder 11. A nichrome film adhred to the target-opposed surface of a substrate 14 by using the nichrome target 12 comes nearly into the same composition as that of the target 12 and is adhred at low temperature. This reduces the thermal impact received by the substrate 14 and the previously adhered layer.

Description

【発明の詳細な説明】 (a)発明の技術分野 本発明は薄膜混成集積回路等のリード端子や搭載素子等
をボンディングさせるために形成゛される電極膜に関す
る。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to an electrode film formed for bonding lead terminals, mounting elements, etc. of a thin film hybrid integrated circuit or the like.

(b)技術の背景 回路素子を形成及び搭載してなる薄膜混成集積回路にお
いて、例えば外部リード端子の一端をボンディングする
ため回路基板上に形成される電極は、一般にニクロム(
NiCr)を下地層とし、その上に金(Au)層を被着
し構成されている。かかる電極において、被ボンデイン
グ電極としての特性に優れるAu層は、アルミナ基板の
表面及び該表面に被着されたタンタル(Ta)層等に対
して被着性がない、または接着強度が十分でないことに
鑑み、その下地層としてNiCr層が介在されている。
(b) Background of the Technology In a thin film hybrid integrated circuit formed by forming and mounting circuit elements, electrodes formed on a circuit board for bonding one end of an external lead terminal, for example, are generally made of nichrome (
The base layer is made of (NiCr) and a gold (Au) layer is deposited thereon. In such electrodes, the Au layer, which has excellent characteristics as a bonded electrode, has no adhesion to the surface of the alumina substrate and the tantalum (Ta) layer deposited on the surface, or has insufficient adhesive strength. In view of this, a NiCr layer is interposed as the underlying layer.

一方薄膜混成集積回路は、該回路を搭載する機器の小型
化、高密度化の要請に伴って、その高集積化を実現させ
るためパターンの微細化が進められている。
On the other hand, with regard to thin film hybrid integrated circuits, in response to the demand for smaller size and higher density of devices in which the circuits are mounted, miniaturization of patterns is progressing in order to achieve higher integration.

(C)従来技術と問題点 第1図は薄膜混成集積回路の上に形成された電極部分の
断面を拡大模式化して示したものであり、1はアルミナ
基板、2はTa層、3は電極層であり、電極層3はニク
ロムNiCr層4を下地層としその上にAu層5が形成
されて、ボンディング用電極膜を構成している。
(C) Prior art and problems Figure 1 shows an enlarged schematic cross-section of an electrode portion formed on a thin film hybrid integrated circuit, where 1 is an alumina substrate, 2 is a Ta layer, and 3 is an electrode. The electrode layer 3 has a nichrome NiCr layer 4 as a base layer, and an Au layer 5 is formed thereon to constitute a bonding electrode film.

かかる電極層3において、NiCr層4及びAu層5を
パターン形成させるために被着されるNiCr膜及びA
u膜は、従来、真空蒸着法で被着されていた。
In this electrode layer 3, a NiCr film and an A layer are deposited to pattern the NiCr layer 4 and Au layer 5.
U films have traditionally been deposited by vacuum evaporation.

しかし、真空蒸着法は蒸着粒の発生及び膜厚分布の点か
ら、高集積化される混成集積回路の微細なパターン形成
に対し、前記蒸着粒及び膜厚分布のばらつきが障害にな
っていた。− そこで、前記膜形成の手段としてスパッタリング方法が
考えられるが、従来のスパッタリング、即ち、DC二極
スパッタ方式或いはRF(高周波)スパンタ方式と呼ば
れるスパッタリング装置で所要膜を形成するには、被着
基板が数百度に加熱されるため、基板自体及び基板の既
形成層(膜)は前記スパッタ温度に対する耐性を具えて
いる必要がある。
However, in the vacuum evaporation method, variations in the deposition particles and film thickness distribution have been an obstacle to the formation of fine patterns in highly integrated hybrid integrated circuits due to the generation of deposition particles and film thickness distribution. - Therefore, a sputtering method can be considered as a means for forming the film, but in order to form the required film using conventional sputtering, that is, a sputtering apparatus called a DC two-pole sputtering method or an RF (radio frequency) sputtering method, it is difficult to Since the sputtering temperature is heated to several hundred degrees Celsius, the substrate itself and the already formed layers (films) of the substrate must have resistance to the sputtering temperature.

(d)発明の目的 本発明の目的は、低温度、高速度である等の特徴を有す
るマグネトロンスパッタリング装置により、上記問題点
を除去し高性能化された電極膜およびその製造方法を提
供することである。
(d) Purpose of the Invention The purpose of the present invention is to provide an electrode film and a method for manufacturing the same that eliminate the above-mentioned problems and have improved performance by using a magnetron sputtering device having characteristics such as low temperature and high speed. It is.

(e)発明の構成 上記目的は、少なくともニクロム(NiCr)層を下層
としその上に金(Au)層が積層された電極膜が、マグ
ネトロンスパッタ法により被着形成されることを特徴と
した電極膜およびその製造方法により達成される。
(e) Structure of the Invention The above object is to provide an electrode characterized in that an electrode film having at least a nichrome (NiCr) layer as a lower layer and a gold (Au) layer laminated thereon is deposited by magnetron sputtering. This is achieved by a membrane and its manufacturing method.

(f)発明の実施例 以下に、図面を用いて本発明の詳細な説明する。(f) Examples of the invention The present invention will be explained in detail below using the drawings.

第2図はマグネトロンスパッタリング装置、即ち直交電
磁界を利用しローレンツの式に従って運動するプラズマ
をターゲット(カソード)近傍の局所的空間に閉じ込め
、ターゲット上をサイクロイド運動する電子がガス分子
と衝突する結果密度の高いプラズマが発生し、電子がス
パッタ基板に衝突して生じるダメージを無くするととも
に、高いスパッタ速度が得られることを特徴としたスパ
ッタリング装置の概略を説明するための模式図である。
Figure 2 shows a magnetron sputtering device, which uses orthogonal electromagnetic fields to confine plasma moving according to Lorentz's equation in a local space near the target (cathode), and electrons moving cycloidally on the target collide with gas molecules, resulting in density 1 is a schematic diagram for explaining the outline of a sputtering apparatus characterized in that high plasma is generated, damage caused by electrons colliding with a sputtering substrate is eliminated, and a high sputtering rate can be obtained.

第2図において、11は回転又は反転動可能な筒状基板
ホルダー、12はスパッタ膜材料と同じ材料にてなるタ
ーゲット、13はホルダー11とターゲソ目2との対向
間を適当に仕切る回動自在なシャッター、14はホルダ
ー11の外筒面に取り付けられた複数枚のスパッタ膜被
着用基板である。一般に、アノード電極(図示せず)及
び直交電磁界の印可用磁石(図示せず)等とともに組み
込まれたターゲット12は、基板ホルダー11の外筒面
に対向し複数個(例えば3個)が分散し配設さている。
In FIG. 2, 11 is a cylindrical substrate holder that can be rotated or reversed, 12 is a target made of the same material as the sputtered film material, and 13 is rotatable to appropriately partition the opposing space between the holder 11 and the target eye 2. The shutter 14 is a plurality of sputtered film-coated substrates attached to the outer cylindrical surface of the holder 11. In general, a plurality of targets 12 (for example, three targets) installed together with an anode electrode (not shown), a magnet for applying an orthogonal electromagnetic field (not shown), etc. It is arranged.

かかる装置により被着さたスパッタ膜、例えばニクロム
(NiCr)にてなるターゲット12を使用し基板14
のターゲット対向面に被着されたNiCr膜は、ターゲ
ット12の組成とほぼ同一であり、しかも旧来装置より
も低温度(例えば80℃)で被着さる。
A target 12 made of a sputtered film, for example, nichrome (NiCr), deposited by such an apparatus is used to form a substrate 14.
The NiCr film deposited on the target facing surface has almost the same composition as the target 12, and is deposited at a lower temperature (for example, 80° C.) than in the conventional device.

そのため、基板14及び既に被着された層(膜)が受け
る熱的衝撃は、従来のDC二極スパンタ方式或いはRF
(高周波)スパンタ方式と呼ばれるスパッタリング装置
に比べて著しく少なくなり、通常の混成集積回路におい
ては障害をもたらす要因にならない。
Therefore, the thermal shock to which the substrate 14 and already deposited layers (films) are subjected can be reduced by conventional DC bipolar spunter method or RF
(High frequency) The amount is significantly lower than that of a sputtering device called a sputtering method, and it does not become a cause of failure in ordinary hybrid integrated circuits.

第3図はマグネトロンスパッタリング装置で被着された
NiCr−Au電極膜の特性を示す図であり、(イ)は
前記電極膜に熱圧着手段でボンディングされたリード端
子の抵抗温度特性を実測によりめた図、(ロ)は前記電
極膜にポンディングされた前記リード端子の引張強さを
実測によりめた図、(ハ)は前記電極膜のはんだ食われ
特性を実測によりめた図、第4図は前記電極膜の構成及
び前記引張強さのめ方を説明するための図である。
FIG. 3 is a diagram showing the characteristics of the NiCr-Au electrode film deposited using a magnetron sputtering device, and (a) shows the resistance-temperature characteristics of the lead terminal bonded to the electrode film by thermocompression bonding means by actual measurements. (b) is an actual measurement of the tensile strength of the lead terminal bonded to the electrode film; (c) is an actual measurement of the solder erosion characteristics of the electrode film; The figure is a diagram for explaining the structure of the electrode film and how to measure the tensile strength.

第4図において、21はアルミナ基板、22は基板21
の上面に被着された窒化タンタル(TaN)層、23は
窒化タンタル層22の上面被着されたNiCr層(厚さ
約400人)、24はNiCr層の上面に被着された^
U層(厚さ約8000人)であり、幅がQ、3mmの銅
(Cu)材にAuをめっきしたリード端子25は幅Wが
0.2 mのウェッジを用い約400℃に加熱された条
件のもとで圧着されており、前記電極膜の引張り強さは
リード端子25の自由端を上方に引張ったときのリード
端子剥離強さである。
In FIG. 4, 21 is an alumina substrate, 22 is a substrate 21
A tantalum nitride (TaN) layer is deposited on the top surface, 23 is a NiCr layer (about 400 mm thick) deposited on the top surface of the tantalum nitride layer 22, and 24 is a NiCr layer deposited on the top surface of the NiCr layer.
The lead terminal 25, which is a U layer (approximately 8,000 layers thick) and has a width Q of 3 mm and is made of Au-plated copper (Cu) material, was heated to approximately 400°C using a wedge with a width W of 0.2 m. The electrode film is crimped under certain conditions, and the tensile strength of the electrode film is the lead terminal peeling strength when the free end of the lead terminal 25 is pulled upward.

第3図(イ)において、横軸は使用したNi(:rター
ゲットのNi成分比%、縦軸は温度係数T、C,Rpp
m/℃、実線Aは測定値をプロットしそれを曲線で結ん
だ電極層の温度特性であり、温度特性AはほぼNi60
%のNiCrターゲットを使用した電極層が±0であり
、その前後において増加する。従って、Ni60%のN
iCrターゲットを使用した電極膜が温度特性からみて
、最も優れていることになる。
In Fig. 3 (A), the horizontal axis is the Ni used (Ni component ratio % of the target), and the vertical axis is the temperature coefficient T, C, Rpp.
m/℃, the solid line A is the temperature characteristic of the electrode layer, which is obtained by plotting the measured values and connecting them with a curve, and the temperature characteristic A is approximately Ni60.
% of the electrode layer using a NiCr target is ±0, and increases before and after that. Therefore, N of 60% Ni
The electrode film using the iCr target is the most excellent in terms of temperature characteristics.

第3図(II+)において、横軸は使用したNiCrタ
ーゲットのNi成分比%、縦軸はリード端子の引張強さ
kg、実線Bは測定値をプロットしそれを直線で結んだ
引張強さ特性であり、B−3は電極膜を275℃で5時
間熱処理したときの引張強さ特性、B−zは電極膜を2
50℃で5時間熱処理したときの引張強さ特性、B−3
は電極膜を200℃で5時間熱処理したときの引張強さ
特性、B−4は電極膜を熱処理しないときの引張強さ特
性である。そして、引張強さ特性B−4がほぼ一定の値
であるのにたいし、各引張強さ特性B−t〜B、ははほ
ぼNi60%のNiCrターゲットを使用したとき最大
値を示しており、Ni60%のNiCrターゲットを使
用した電極膜が引張り強さの特性からみて、最も優れて
いることになる。
In Figure 3 (II+), the horizontal axis is the Ni component ratio % of the NiCr target used, the vertical axis is the tensile strength of the lead terminal (kg), and the solid line B is the tensile strength characteristic plotted by plotting the measured values and connecting them with a straight line. B-3 is the tensile strength property when the electrode film is heat-treated at 275°C for 5 hours, and B-z is the tensile strength property when the electrode film is heat-treated at 275°C for 5 hours.
Tensile strength properties when heat treated at 50°C for 5 hours, B-3
B-4 is the tensile strength property when the electrode film is heat-treated at 200° C. for 5 hours, and B-4 is the tensile strength property when the electrode film is not heat-treated. And, while the tensile strength property B-4 is a nearly constant value, each of the tensile strength properties B-t~B shows the maximum value when a NiCr target with approximately 60% Ni is used. , an electrode film using a NiCr target containing 60% Ni is the most excellent in terms of tensile strength characteristics.

第3図(ハ)において、横軸は使用したNiCrターゲ
ットのNi成分比%、縦軸は電極膜の上面に被着させた
はんだの食われ(Auがはんだに拡散されてなくなる)
率%、実線Cは測定値をプロットしそれを直線で結んだ
はんだ食われ特性であり、C−Iは第1回目のはんだデ
ィップ時特性、C−zは第2回目のはんだディップ時特
性、C−8は第3回目のはんだディップ時特性を示す。
In Figure 3 (c), the horizontal axis is the Ni component ratio of the NiCr target used, and the vertical axis is the erosion of the solder deposited on the top surface of the electrode film (Au is diffused into the solder and disappears).
%, the solid line C is the solder erosion characteristic by plotting the measured values and connecting them with a straight line, C-I is the characteristic at the first solder dip, C-z is the characteristic at the second solder dip, C-8 shows the characteristics at the third solder dipping.

そして、電極膜ははんだディップを繰り返す毎に劣化さ
れるが、Ni70%のNiCrターゲットを使用した電
極膜のはんだ食われ特性Cは、第1回目のはんだディッ
プ及びはんだディップの繰り返しによる劣化に対して、
他のものより優れていることが第3図(ハ)により明ら
かにされた。
The electrode film deteriorates each time the solder dip is repeated, but the solder erosion characteristic C of the electrode film using a 70% Ni/NiCr target is the same as the deterioration caused by the first solder dip and repeated solder dips. ,
It is clear from FIG. 3 (c) that this method is superior to the others.

従って、第3図(イ)及び第3図(0)より熱圧着によ
りリード端子等が接続される電極膜をマグネトロンスパ
ッタリングにて作成するには、Ni60%のNiCrタ
ーゲットを使用し最良の電極膜が得られる。その反面、
はんだ付けに使用される電極膜をマグネトロンスパッタ
リングにて作成するには、Ni70%のNiCrターゲ
ットを使用し、最良の電極膜を得ることができる。
Therefore, in order to create an electrode film to which lead terminals etc. are connected by thermocompression bonding by magnetron sputtering, a NiCr target containing 60% Ni is used to create the best electrode film, as shown in Fig. 3 (a) and Fig. 3 (0). is obtained. On the other hand,
To create an electrode film used for soldering by magnetron sputtering, a NiCr target containing 70% Ni can be used to obtain the best electrode film.

第5図は本発明の一実施例になる薄膜コンデンサの側断
面図、第6図は本発明の他の一実施例になる電極膜の側
断面図である。
FIG. 5 is a side cross-sectional view of a thin film capacitor according to an embodiment of the present invention, and FIG. 6 is a side cross-sectional view of an electrode film according to another embodiment of the present invention.

第5図において、31はグレーズド基板、32は基板3
1の上面に形成されたタンタル(α−Ta)層、33は
α−Ta層の一部を陽極酸化させた五酸化タンタル(T
ags)層、34はTaos層の上にパターン形成さた
一NiCr層、35NiCr層34の上にパターン形成
さたAu層、36はα−Ta層32の上にパターン形成
さたNiCr層、37NiCr層36の上にパターン形
成さたAu層であり、厚さ1500〜3000人程度に
形成されたTa05層33を誘電体とし構成されたコン
デンサは、少なくともNiCr層34及び36を形成す
るための膜がマグネトロンスパッタリングで被着されて
いる。
In FIG. 5, 31 is a glazed substrate, 32 is a substrate 3
A tantalum (α-Ta) layer formed on the upper surface of 1, 33 is a tantalum pentoxide (T) layer formed by anodizing a part of the α-Ta layer.
34 is a NiCr layer patterned on the Taos layer, 35 is an Au layer patterned on the NiCr layer 34, 36 is a NiCr layer patterned on the α-Ta layer 32, 37 NiCr The capacitor is constructed using the Ta05 layer 33, which is patterned on the layer 36 and has a thickness of approximately 1,500 to 3,000 layers, as a dielectric material, and the capacitor is composed of a film for forming at least the NiCr layers 34 and 36. is deposited by magnetron sputtering.

かかるコンデンサは、NiCr層34と36は従来真空
蒸着法で被着されたものと異なり、膜厚に比べて粗大な
蒸着粒がなく均一であるのみならず、前記蒸着粒が飛着
したときTag、層32に食い込むが如き現象が起らな
いため、並びに蒸着の如き大きな熱応力が付加されない
ため、耐圧性が向上し単位面積当たりの容量は例えば5
00〜600 pF / 顛2であったものを1000
 pF /va”程度に成し得た。
In this capacitor, the NiCr layers 34 and 36 are different from those deposited by conventional vacuum evaporation methods, and are not only uniform with no coarse deposited grains compared to the film thickness, but also have a uniform thickness when the deposited grains fly away. , because phenomena such as digging into the layer 32 do not occur, and because large thermal stresses such as those caused by vapor deposition are not applied, the pressure resistance is improved and the capacity per unit area is, for example, 5.
00 to 600 pF / 1000 pF
pF/va" level was achieved.

第6図において、41はアルミナ又はグレーズド基板、
42は基板41の上面に形成されたタンタル(tx−T
a)層、43はcx−Ta N42の上にパターン形成
さたNiCr層、44はNiCr層43層上3パターン
形成さた中間層、45は中間層44の上にパターン形成
さた1層であり、中間層44はNiCr −Auの拡散
層、又はNiCrの酸化層、或いはNiCrのガス吸着
層である。
In FIG. 6, 41 is an alumina or glazed substrate;
42 is tantalum (tx-T) formed on the upper surface of the substrate 41.
a) layers, 43 is a NiCr layer patterned on CX-Ta N42, 44 is an intermediate layer with three patterns formed on the NiCr layer 43, and 45 is one layer patterned on the intermediate layer 44. The intermediate layer 44 is a NiCr-Au diffusion layer, a NiCr oxide layer, or a NiCr gas adsorption layer.

かかる電極膜構成において、マグネトロンスパッタリン
グ装置はNiCrターゲットとAuクーゲットの双方を
同一ベルジャ−内に具えたものを用い、NiCr層形成
膜を被着完了した直後に(又は多少オーバラップさせて
) Au層形成膜を被着させると、NiCr層とAu層
との間にNiCr −Auの拡散層ができる。
In such an electrode film configuration, a magnetron sputtering device is equipped with both a NiCr target and an Au target in the same bell jar, and the Au layer is sputtered immediately after the NiCr layer has been deposited (or with some overlap). When the formation film is deposited, a diffusion layer of NiCr-Au is created between the NiCr layer and the Au layer.

そして、NiCr −Auの拡散層を中間層44とした
電極膜は、はんだ食われを該中間層44が阻止するため
、はんだ付は用の電極膜として有効である。
The electrode film having the NiCr-Au diffusion layer as the intermediate layer 44 is effective as an electrode film for soldering because the intermediate layer 44 prevents solder erosion.

他方、熱圧着用の電極膜はNiCr層とAu層との間に
NiCrの酸化層或いはNiCrのガス吸着層にてなる
中間層44を介在させることにより、NiCrとAuの
拡散を該中間層44が阻止するため、熱圧着用の電極膜
として有効である。そして、前記装置を用いた前記Ni
Cr酸化層及びガス゛吸着層は、NiCr層形成膜を被
着完了したのち、7.3 Xl0−’パスカル程度の真
空度にしたのち、適当な圧力の不活性雰囲気中でNiC
r及びAuをスパッタリングする際の残留ガスに曝すこ
とにより、厚さ数十人程度に形成させることができる。
On the other hand, in the electrode film for thermocompression, an intermediate layer 44 made of a NiCr oxide layer or a NiCr gas adsorption layer is interposed between the NiCr layer and the Au layer to prevent the diffusion of NiCr and Au. It is effective as an electrode film for thermocompression. Then, the Ni using the device
After completing the deposition of the NiCr layer, the Cr oxide layer and the gas adsorption layer are formed by applying NiC in an inert atmosphere at an appropriate pressure after creating a vacuum of approximately 7.3 Xl0-'Pascals.
By exposing it to the residual gas when sputtering r and Au, it can be formed to a thickness of about several tens of layers.

(g)発明の詳細 な説明した如く本発明供よれば、少なくともニクロム(
NiCr)層を下層としそ6上に金(Au)層が積層さ
れた電極膜を、マグネトロンスパンタ法により被着され
たことにより、その被着面の品位を損なうこと無く電極
膜の形成が可能となり、基板上に形成される薄膜コンデ
ンサ等の高性能化及び高品位化を実現せしめ、かつ、熱
圧着及びはんだ付けのそれぞれに適した電極膜を形成せ
しめる方法を実現し得た効果は極めて大きい。
(g) As described in the detailed description of the invention, according to the present invention, at least nichrome (
The electrode film, which has a gold (Au) layer stacked on the bottom layer and a gold (Au) layer on the bottom layer, was deposited by the magnetron spunter method, making it possible to form the electrode film without impairing the quality of the deposited surface. This has made it possible to achieve higher performance and higher quality of thin film capacitors formed on substrates, and the effect of realizing a method for forming electrode films suitable for thermocompression bonding and soldering is extremely significant. big.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は混成集積回路の上に形成された電極膜部分の断
面を拡大模式化した図、第2図はマグネトロンスパッタ
リング装置の概略を説明するための模式図、第3図はマ
グネトロンスパッタリング装置で被着されたNiCr−
Au電極膜の特性を説明するための図、第4図は前記電
極膜の構成及び前記引張強さのめ方を説明するための図
、第5図は本発明の一実施例になる薄膜コンデンサの側
断面図、第6図は本発明の他の一実施例になる電極膜の
側断面図である。 なお図中において、1,14,2L31,41は基板、
2゜22、32.42はタンタル層、3は電極膜、4.
23.34.36゜43はNiCr層、5,24,35
,37.45はAu層、12はターゲット、44は中間
層(Auの拡散層+ NiCrの酸化層。 NiCrのガス吸着層)、’A−Cは電極膜の特性を示
す。 峯l暗 事2閃 σ 2θ # 々 V /グ Nt’晟y(、リ (λ〕 ′#3唄 (ロ) θ d# bo 8θ lρθ (幻 #Q / (N’すα少 0 26 # 6o210 /at) A” / (Nt ftど) (2)
Figure 1 is an enlarged schematic diagram of a cross section of an electrode film formed on a hybrid integrated circuit, Figure 2 is a schematic diagram for explaining the outline of a magnetron sputtering device, and Figure 3 is a diagram of a magnetron sputtering device. Deposited NiCr-
A diagram for explaining the characteristics of the Au electrode film, FIG. 4 is a diagram for explaining the structure of the electrode film and how to measure the tensile strength, and FIG. 5 is a thin film capacitor according to an embodiment of the present invention. FIG. 6 is a side sectional view of an electrode film according to another embodiment of the present invention. In addition, in the figure, 1, 14, 2L31, 41 are substrates,
2゜22, 32.42 is a tantalum layer, 3 is an electrode film, 4.
23.34.36°43 is NiCr layer, 5,24,35
, 37.45 is an Au layer, 12 is a target, 44 is an intermediate layer (Au diffusion layer + NiCr oxide layer, NiCr gas adsorption layer), 'A-C indicates the characteristics of the electrode film. Mine 2 secrets σ 2θ # t V /g Nt'晟y(, li (λ) '#3uta (ro) θ d# bo 8θ lρθ (phantom #Q / (N'su α small 0 26 # 6o210 /at) A” / (Nt ft etc.) (2)

Claims (8)

【特許請求の範囲】[Claims] (1)少なくともニクロム(NiCr)層を下層とし、
その上に金(Au)層が積層された電極膜が、マグネト
ロンスパッタ法により被着形成されていることを特徴と
した電極膜。
(1) At least a nichrome (NiCr) layer is used as a lower layer,
An electrode film characterized in that an electrode film on which a gold (Au) layer is laminated is deposited and formed by magnetron sputtering.
(2)前記電極膜が薄膜混成集積回路の電極膜であるこ
とを特徴とする特許請求の範囲第1項に記載した電極膜
(2) The electrode film according to claim 1, wherein the electrode film is an electrode film of a thin film hybrid integrated circuit.
(3) 少なくともニクロム(NiCr)層を下層とし
、金(Au)を上層とする電極膜を、マグネトロンスパ
ッタ法により順次被着して積層形成するようにしたこと
を特徴とした電極膜の製造方法。
(3) A method for manufacturing an electrode film, characterized in that an electrode film having at least a nichrome (NiCr) layer as a lower layer and a gold (Au) layer as an upper layer is sequentially deposited and laminated by magnetron sputtering method. .
(4)前記下層を被着するマグネトロンスパッタリング
装置のターゲットの組成が、ニッケル約60%。
(4) The composition of the target of the magnetron sputtering device for depositing the lower layer is about 60% nickel.
(5)前記下層を被着するマグネトロンスパッタリング
装置のターゲットの組成が、ニッケル約70%。
(5) The composition of the target of the magnetron sputtering device for depositing the lower layer is approximately 70% nickel.
(6) 前記下層の上面にニクロム(NiCr)−金(
^U)の極膜の製造方法。
(6) Nichrome (NiCr)-gold (
^U) Method for manufacturing the polar film.
(7)前記下層の上面にニクロム(NiCr)の酸化層
を遣方法。
(7) A method of forming an oxide layer of nichrome (NiCr) on the upper surface of the lower layer.
(8)前記下層の上面にニクロム(NiCr)のガス吸
着の製造方法。
(8) A manufacturing method in which nichrome (NiCr) gas is adsorbed on the upper surface of the lower layer.
JP10991184A 1984-05-30 1984-05-30 Electrode film and manufacture thereof Pending JPS60254639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10991184A JPS60254639A (en) 1984-05-30 1984-05-30 Electrode film and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10991184A JPS60254639A (en) 1984-05-30 1984-05-30 Electrode film and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS60254639A true JPS60254639A (en) 1985-12-16

Family

ID=14522269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10991184A Pending JPS60254639A (en) 1984-05-30 1984-05-30 Electrode film and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS60254639A (en)

Similar Documents

Publication Publication Date Title
US10615327B2 (en) Monolithic ceramic electronic component
US7605683B2 (en) Monolithic electronic component
US11342122B2 (en) Electronic component assembly and method for manufacturing the same
US6433666B1 (en) Thermistor elements
JP2024038418A (en) Compact thin-film surface-mountable coupler having wide-band performance
JP7331622B2 (en) multilayer ceramic electronic components
KR20190058239A (en) Multilayer ceramic capacitor and method of manufacturing the same
JPH08107039A (en) Ceramic electronic component
JP2021136323A (en) Multilayer ceramic electronic component
JPS60254639A (en) Electrode film and manufacture thereof
JPH10116707A (en) Chip type thermistor and its manufacturing method
US4756928A (en) Method of forming electrodes of an electronic component of chip type for connecting to the external
JP3614915B2 (en) Chip-shaped electronic component and manufacturing method thereof
KR100513322B1 (en) manufacture for an outer terminal of array type chip package
JPS6145851B2 (en)
JPS60211068A (en) Formation of film
JP2001135501A (en) Chip type thermistor
JPH08250307A (en) Chip thermistor
JP2909947B2 (en) Chip type electronic components
JPH09120932A (en) Laminated electronic component
JP3290289B2 (en) Manufacturing method of chip type CR network element
JP2002110451A (en) Laminated electronic part and its manufacturing method
JPS6033793B2 (en) Ceramic body with copper coating
JPH08111349A (en) Chip component
JP2003289001A (en) Thick film electronic part