JPS60247981A - Manufacture of electrostrictive effect element - Google Patents

Manufacture of electrostrictive effect element

Info

Publication number
JPS60247981A
JPS60247981A JP59103856A JP10385684A JPS60247981A JP S60247981 A JPS60247981 A JP S60247981A JP 59103856 A JP59103856 A JP 59103856A JP 10385684 A JP10385684 A JP 10385684A JP S60247981 A JPS60247981 A JP S60247981A
Authority
JP
Japan
Prior art keywords
electrodes
exposed
internal
internal electrodes
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59103856A
Other languages
Japanese (ja)
Other versions
JPH0256828B2 (en
Inventor
Atsushi Ochi
篤 越智
Kazuaki Uchiumi
和明 内海
Masanori Suzuki
正則 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59103856A priority Critical patent/JPS60247981A/en
Publication of JPS60247981A publication Critical patent/JPS60247981A/en
Publication of JPH0256828B2 publication Critical patent/JPH0256828B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/06Forming electrodes or interconnections, e.g. leads or terminals
    • H10N30/063Forming interconnections, e.g. connection electrodes of multilayered piezoelectric or electrostrictive parts

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • General Electrical Machinery Utilizing Piezoelectricity, Electrostriction Or Magnetostriction (AREA)

Abstract

PURPOSE:To manufacture a unified solid-state element, which can be driven at low voltage, by exposing internal electrode layers in a laminated chip capacitor type laminate, in which electrostrictive materials and internal electrodes are laminated alternately, on every other layer and in the whole. CONSTITUTION:Electrostrictive materials 11 in sections in which strain is not generated and electrostrictive materials 12 in sections in which strain is generated are laminated alternately together with internal electrodes 13, 14, and a laminate is cut so that the internal electrodes 13 are exposed on one side and the internal electrodes 14 on the other side on every other layer respectively and both internal electrodes 13, 14 are all exposed on both side surfaces. Temporarily mounted external electrodes 15, 16 are applied and baked on both sides so that the electrode 15 is electrically connected to the internal electrodes 13 and the electrode 16 to the internal electrodes 14. Glass powder is attached 17 onto the internal electrodes 13, and external electrodes 21 are formed. Glass powder is also attached 17 similarly onto the internal electrodes 14 on an opposite side surface, and external electrodes are shaped.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明の方法は圧電又は電歪材料の電気5機械エネルギ
ー変換能力を利用した駆動素子、微小変位素子等の電歪
効果素子(エレクトロメカニカルデベイス)の製造方法
に関するものである。
Detailed Description of the Invention (Field of Industrial Application) The method of the present invention applies to electrostrictive elements (electromechanical devices) such as drive elements and minute displacement elements that utilize the electrical and mechanical energy conversion capabilities of piezoelectric or electrostrictive materials. The present invention relates to a method of manufacturing a base.

(従来技術) 従来、圧電又は電歪効果′fr:オリ用した素子として
は第1図(a)、し)に示すような構造のものが製造さ
れてきた。まず円筒型の圧電又は電歪材料’e0.2〜
1.0mm厚みにスライスし、上下面に電極2を焼きつ
ける。この薄板1を接着剤3で多数はシ合わせる。必要
によってはボルト等を用いて最上面と最下面とをはさみ
つけ固定させる。外部電極を一層おきに相互に接続し、
プラス側およびマイナス側の外部端子4,5に接続する
O両端子間に200Vから1ooovの直流電圧を印加
することによシ、素子は薄板の積層方向に101程度の
割合で伸長する。また拘束状態で使用すれば3.5×1
07N/m2程度の応力を発生する。
(Prior Art) Conventionally, devices using piezoelectric or electrostrictive effects have been manufactured with structures as shown in FIGS. 1(a) and 1(b). First, a cylindrical piezoelectric or electrostrictive material 'e0.2~
Slice into 1.0 mm thick pieces and burn electrodes 2 on the top and bottom surfaces. A large number of the thin plates 1 are glued together using an adhesive 3. If necessary, use bolts or the like to sandwich and fix the top and bottom surfaces. Connect the external electrodes to each other every other layer,
By applying a DC voltage of 200V to 100V between the O terminals connected to the positive and negative external terminals 4 and 5, the element expands at a rate of about 101 in the lamination direction of the thin plates. Also, if used in a restrained state, 3.5 × 1
A stress of about 0.7 N/m2 is generated.

(従来技術の問題点) 本構造の素子は小型で大きな力を発生する、応答スピー
ドが40μsec程度とかなシ速い等の特徴を持ってい
るが、いくつかの欠点を持っている口その一つはスライ
スによシ薄板を作製するため薄板の薄さに限界があ夛、
駆動するのに200v〜1000V程度の高電圧が必要
力とと0薄板金接着剤では夛合せるため薄板の厚みに反
比例してヤング率の低い接着層の合計の厚みが増加し、
駆動時の変位や発生応力を吸収してしまう、量産性に難
がある等の欠点がある。
(Problems with the conventional technology) Although the element of this structure has the characteristics of being small, generating a large force, and having a fast response speed of about 40 μsec, it has some drawbacks. Since thin plates are made by slicing, there is a limit to the thinness of the thin plates.
Since a high voltage of about 200V to 1000V is required for driving and a thin sheet metal adhesive requires force, the total thickness of the adhesive layer with a low Young's modulus increases in inverse proportion to the thickness of the thin sheet.
It has drawbacks such as absorbing displacement and generated stress during driving and difficulty in mass production.

(発明の目的) 本発明の目的は以上のような欠点を除去し100■以下
の低電圧で駆動可能な一体化固体素子を安定に量産的に
生産する製造方法を提供することである口 (発明の構成) 本発明は電歪材料と内部電極とが交互に積層された積層
チップコンデンサ型の積層体であって。
(Object of the Invention) The object of the present invention is to eliminate the above-mentioned drawbacks and provide a manufacturing method for stably mass-producing an integrated solid-state device that can be driven at a low voltage of 100 μm or less. Structure of the Invention) The present invention is a multilayer chip capacitor type laminate in which electrostrictive materials and internal electrodes are alternately stacked.

内部電極層が一層おきに露出した対向する2側面の他に
全内部電極層が露出した対向する2側面を有する積層体
を作製する工程と、前記内部電極が一層おきに露出した
2側面に第1の外部電極を形成する工程と、全内部電極
層が露出した2側面の一方の面について・一層おきの内
部電極層とその近傍部分に絶縁物を形成し、他方の面に
ついて前記絶縁物を形成した内部電極層と異なる一層お
きの内部電極層とその近傍部分に絶縁物を形成する工程
と、この絶縁物を形成した2側面のそれぞれの対向する
位置に前記露出した内部電極を横断して接続する第2の
外部電極を1組以上形成する工程と、この積層体を第1
と第2の外部電極の間又は同第1と第2の外部電極の間
及び複数組の第2の外部電極の間にて切断する工程とを
含むことを特徴とする電歪効果素子の製造方法で娶る。
A step of producing a laminate having two opposing side surfaces on which internal electrode layers are exposed every other layer and two opposing side surfaces on which all internal electrode layers are exposed; Step 1 of forming an external electrode; Forming an insulator on one side of the two sides where all the internal electrode layers are exposed; forming an insulator on every other internal electrode layer and its vicinity; and forming the insulator on the other side. a step of forming an insulator on every other internal electrode layer different from the formed internal electrode layer and its vicinity; and a step of forming an insulator across the exposed internal electrode at opposing positions on each of the two side surfaces on which the insulator is formed. a step of forming one or more sets of second external electrodes to be connected;
and a step of cutting between the first and second external electrodes or between the plurality of sets of second external electrodes. Marry by method.

(II成の詳細な説明) 本発明の製造方法は内部電極層を採用したことによシミ
極間距離を容易に100μm以下まで狭めることができ
、低電圧駆動が可能になりたOまた一体化固体素子とな
った結果、接着剤の影響を除去でき、よシ高速応答とな
った。さらに大きな積層体のままで処理することによ多
素子数10個分を同時に電気的接続できるようになル量
産可能な製造方法となった。
(Detailed explanation of II formation) By adopting the internal electrode layer, the manufacturing method of the present invention can easily narrow the distance between stain electrodes to 100 μm or less, and enable low voltage driving. As a result of becoming a solid-state device, the influence of adhesives can be removed, resulting in faster response times. Furthermore, by processing the large laminate as it is, it became possible to electrically connect 10 multi-devices at the same time, making it possible to mass produce the manufacturing method.

(実施例) 以下実施例に従って本発明の詳細な説明を行なう。マグ
ネシウムニオブ酸鉛(Pb(Mgl/3Nbν903)
およびチタン酸鉛(PbTi01)を主成分とする電歪
材料予焼粉末に微量の有機バインダを添加し、これを有
機溶媒中に分散させたスラリーを準備した口通常の積層
セラミックコンデンサの製造に使用されるキャスティン
グ製膜装置によシこのスラリーをマイラーフィルム上に
約100ミクロンの厚さに塗布し乾燥させた。これをフ
ィルムから剥離し、電歪材料グリーンシートを得た。一
部のグリーンシートには更に内部電極として白金ペース
トをスクリーン印刷した。これらのグリーンシートを数
100枚重ね、熱プレスによシ圧着一体化した後125
0℃で焼成し、電歪材料積層体を得た0これを内部電極
が一層おきに表面に露出するような位置で切断し2つの
仮設外部電極を塗布焼付けし、更に側面を切断して内部
電極を露出させた。このようにして得られた電歪材料積
層体を電気泳動法に適用する0第2図および第3図はこ
の電歪材料積層体の内部電極の露出した端面を示す斜視
図である。多数の内部電極13.14は一層おきに交互
に2つの仮設外部電極15.16にそれぞれ接続してい
る口 次に帯電したガラス粉末を含む懸濁液を以下の方法で作
製する0ホウケイ酸亜鉛系結晶化ガラス粉末30g、エ
タノール290 ml!、5%ヨウ素エタノール溶液1
0m1!を高速ホモジナイザーで混合する。ヨウ素が電
解質の役割を果たし、ガラス粉末はプラスに帯電してい
る。30分間超音波をかけた後、30分間静置して沈殿
物を除去し残シの懸濁液を使用する。
(Examples) The present invention will be described in detail below according to Examples. Magnesium lead niobate (Pb (Mgl/3Nbν903)
A slurry prepared by adding a small amount of organic binder to electrostrictive material pre-fired powder whose main component is lead titanate (PbTi01) and dispersing this in an organic solvent is used for manufacturing ordinary multilayer ceramic capacitors. This slurry was coated onto a Mylar film to a thickness of about 100 microns using a casting film forming apparatus and dried. This was peeled off from the film to obtain an electrostrictive material green sheet. Some of the green sheets were further screen-printed with platinum paste as internal electrodes. After stacking several hundred of these green sheets and pressing them together using a heat press, 125
This was fired at 0°C to obtain an electrostrictive material laminate. This was cut at a position where the internal electrodes were exposed on the surface every other layer, two temporary external electrodes were coated and baked, and the sides were further cut to reveal the internal parts. The electrodes were exposed. The electrostrictive material laminate thus obtained is applied to an electrophoresis method. FIGS. 2 and 3 are perspective views showing exposed end faces of the internal electrodes of this electrostrictive material laminate. A number of internal electrodes 13.14 are alternately connected to two temporary external electrodes 15.16 in each layer, and a suspension containing electrically charged glass powder is prepared in the following manner.Zinc borosilicate 30g of crystallized glass powder, 290ml of ethanol! , 5% iodine ethanol solution 1
0m1! Mix with a high-speed homogenizer. Iodine acts as an electrolyte, and the glass powder is positively charged. After applying ultrasound for 30 minutes, leave to stand for 30 minutes to remove the precipitate, and use the remaining suspension.

前記電歪材料積層体の内部電極が露出した端面の片面を
粘着テープで被い懸濁液にぬれるのを防いだ後、前記懸
濁液を満たした容器に沈める。積層体の付着させたい端
面の前方1c?ffの距離のところに付着させたい端面
よシひとまわシ大きなステンレス製対向電極板を沈める
。対向電極板を直流電源のプラス端子に接続し、内部電
極露出部14の上には全く付着させないようにする目的
で仮設外部電極16を対向電極に接続し同電位とする。
After covering one side of the exposed end surface of the electrostrictive material laminate with an adhesive tape to prevent it from getting wet with the suspension, the electrostrictive material laminate is submerged in a container filled with the suspension. 1c in front of the end face where you want to attach the laminate? Submerge a large stainless steel counter electrode plate at a distance of ff from the end face you want to attach. The counter electrode plate is connected to the positive terminal of a DC power source, and the temporary external electrode 16 is connected to the counter electrode to have the same potential in order to prevent the exposed portion 14 from being attached at all.

15で示す仮設外部電極をマイナス端子に接続し、20
V300秒間電圧を印加する。終了後懸濁液から引き上
げ乾燥させると、第4図に示すように内部電極露出部の
上とその周辺の電歪材料表面に巾100ミクロンのガラ
ス粉末の付着17が得られた。
Connect the temporary external electrode shown at 15 to the negative terminal, and
Apply voltage for 300 seconds. When the suspension was removed from the suspension and dried, glass powder 17 having a width of 100 microns was obtained on the surface of the electrostrictive material on and around the exposed portion of the internal electrode, as shown in FIG.

裏面の粘着テープを取υ除いた後、705℃で10分間
保持することによシ焼成固着させ、ガラス被gXを形成
する。
After removing the adhesive tape on the back side, it was held at 705° C. for 10 minutes to be baked and fixed, thereby forming a glass cover gX.

次に反対側の面にガラス被膜を形成する0既に被膜を形
成した面を粘着テープで被い保護した後、図中番号16
で示す仮設外部電極を直流電源のマイナス端子に接続し
一回目と同様な方法で電圧を印加して14で示す内部i
t靴の露出部とその周辺のセラミック上にガラス粉末を
付着させる。これ全一回目と同様に焼成して帯状のガラ
ス被膜を形成する。第5図はガラス被暎形成後の積層体
の外観図でおる。図中番号18はガラス被膜を示す。
Next, form a glass coating on the opposite side. After protecting the surface on which the coating has already been formed by covering it with adhesive tape, apply the number 16 in the figure.
Connect the temporary external electrode shown with the negative terminal of the DC power supply and apply a voltage in the same way as the first time.
t Deposit glass powder on the exposed part of the shoe and the ceramic around it. This is fired in the same manner as the first time to form a band-shaped glass coating. FIG. 5 is an external view of the laminate after forming the glass coating. Number 18 in the figure indicates a glass coating.

次に残った内部電極露出部および絶縁物を横断するよう
に数箇所に外部電極ペーストを塗布焼き付けする0積層
体裏面にも同様に外部電極を形成する。第6図は複数個
の外部電極を形成した電歪材料積層体の外観図である。
Next, external electrodes are similarly formed on the back surface of the laminate by coating and baking external electrode paste at several locations across the remaining internal electrode exposed portions and insulators. FIG. 6 is an external view of an electrostrictive material laminate in which a plurality of external electrodes are formed.

図中番号21は外部電極である。その後図中の破線で示
す部分で切断し、図中番号2oで示す部分を素子とする
Number 21 in the figure is an external electrode. Thereafter, it is cut along the part indicated by the broken line in the figure, and the part indicated by number 2o in the figure is used as an element.

第7図は電気的接続を行なった素子の外観図を示す0図
中番号22.23はそれぞれマイナス側。
FIG. 7 shows an external view of an electrically connected element. Numbers 22 and 23 in FIG. 0 are negative sides, respectively.

プラス側の外部接続端子を示す。Indicates the positive external connection terminal.

(発明の効果) 本発明の方法によシ従来の単板はυ合せ型の性能をあら
ゆる面で上まわる一体化全固体素子の電歪効果素子を安
定に量産的に製造できるようになった。すなわち駆動電
圧が200V〜100OVから100v以下に低下し、
応答スピードが40μsec程度から10μsec以下
にと改善された。また積層セラミックコンデンサの技術
と電気泳動法を用いたガラス被膜による絶縁の効果、多
数の素子を同時に処理することが可能になシ、生産性、
信頼性が大きく向上した。
(Effects of the Invention) By the method of the present invention, it has become possible to stably mass-produce an integrated all-solid-state electrostrictive effect element that exceeds the performance of the conventional single-plate υ mating type in all aspects. . In other words, the driving voltage decreases from 200V to 100OV to 100V or less,
The response speed was improved from about 40 μsec to 10 μsec or less. In addition, the insulation effect of the glass coating using multilayer ceramic capacitor technology and electrophoresis method makes it possible to process a large number of elements at the same time, increasing productivity.
Reliability has been greatly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、(b)は圧電又は電歪効果を利用した単
板はり合せ凰構造の素子およびその構成要素である薄板
を示す外観図である。図中1は圧電材料又は電歪材料の
薄板、2は焼きつけた電極、3は接着層、4,5はそれ
ぞれプラス側、マイナス側の外部接続端子を示す。 第2図および第3図は電気泳動法を適用するための仮設
外部電極付電歪材料積層体の表側および裏側を示す外観
図である。図中11は歪を発生しない部分の電歪材料、
12は歪を発生する部分の電歪材料、13.14は内部
電極、15,16は仮設外部電極、 第4図および第5図は内部電極露出部とその周辺のセラ
ミ、り上に一層おきにガラス粉末を付着させ九電歪材料
積層体を示す外観図である。図中17は付着させたガラ
ス粉末またはガラス被膜、18は付着したガラス粉末ま
たはガラス被膜、第6図は外部電極を形成し九電歪材料
積層体を示す外観図である。図中21は外部電極、第7
図は電歪効果素子を示す外観図である。図中22.23
はそれぞれマイナス側、プラス側のく履人弁理士内原 
晋 ノ 71−1 図 <b) オ 6 図 0
FIGS. 1(a) and 1(b) are external views showing an element having a veneer structure using piezoelectric or electrostrictive effects and thin plates that are its constituent elements. In the figure, 1 is a thin plate of piezoelectric material or electrostrictive material, 2 is a baked electrode, 3 is an adhesive layer, and 4 and 5 are positive and negative external connection terminals, respectively. FIGS. 2 and 3 are external views showing the front and back sides of an electrostrictive material laminate with temporary external electrodes to which electrophoresis is applied. 11 in the figure is a portion of the electrostrictive material that does not generate strain;
12 is the electrostrictive material in the part where strain is generated, 13 and 14 are internal electrodes, 15 and 16 are temporary external electrodes, and FIGS. FIG. 2 is an external view showing a nine-electrostrictive material laminate with glass powder attached thereto. In the figure, 17 is the attached glass powder or glass coating, 18 is the attached glass powder or glass coating, and FIG. 6 is an external view showing the nine electrostrictive material laminate with external electrodes formed thereon. In the figure, 21 is an external electrode, and the seventh
The figure is an external view showing an electrostrictive element. 22.23 in the figure
are negative and positive, respectively.
Jin no 71-1 Figure<b) O 6 Figure 0

Claims (2)

【特許請求の範囲】[Claims] (1)電歪材料と内部電標とが交互に積層された積層チ
ップコンデンサ型の積層体であって、内部電極層が一層
おきに露出した対向する2側面の他に全内部電極層が露
出した対向する2側面を有する積層体を作製する工程と
、前記内部電極が一層おきに露出した2側面に第1の外
部電極を形成する工程と、全内部電極層が露出した2側
面の一方の面について一層おきの内部電極層とその近傍
部分に絶縁物を形成し、他方の面について前記絶縁物を
形成した内部電極層と異なる一層おきの内部電極層とそ
の近傍部分に絶縁物を形成する工程と、この絶縁物を形
成した2側面のそれぞれの対向する位置に前記露出した
内部電極を横断して接続する第2の外部電極を1組以上
形成する工程と、この積層体を第1と第2の外部電極の
間又は同第Jと第2の外部電極の間及び複数組の第2の
外部電極の間にて切断する工程とを含むことを特徴とす
る電歪効果素子の製造方法。
(1) A multilayer chip capacitor-type laminate in which electrostrictive materials and internal electrodes are alternately laminated, with all internal electrode layers exposed in addition to two opposing sides where internal electrode layers are exposed every other layer. forming a first external electrode on two side surfaces where the internal electrodes are exposed every other layer; and forming a first external electrode on one of the two side surfaces where all the internal electrode layers are exposed. An insulator is formed on every other internal electrode layer and its vicinity on one surface, and an insulator is formed on every other internal electrode layer and its vicinity, which is different from the internal electrode layer on which the insulator is formed, on the other surface. a step of forming at least one set of second external electrodes to be connected across the exposed internal electrodes at opposing positions on each of the two side surfaces on which the insulator is formed; A method for manufacturing an electrostrictive effect element, comprising a step of cutting between the second external electrodes, between the Jth external electrode and the second external electrode, and between a plurality of sets of second external electrodes. .
(2)絶縁物の形成は積層体と対向電極板を帯電した絶
縁物粉末を含む懸濁液中に設置し、絶縁物を被覆する内
部電極層露出部と対向電極板とを電極として電気泳動法
によりて絶縁物被覆し、この後焼成固着させるととKよ
シ行なう特許請求の範囲第1項記載の電歪効果素子の製
造方法。
(2) To form the insulator, the laminate and the counter electrode plate are placed in a suspension containing charged insulator powder, and electrophoresis is performed using the exposed internal electrode layer covering the insulator and the counter electrode plate as electrodes. 2. A method for manufacturing an electrostrictive effect element according to claim 1, wherein the electrostrictive element is coated with an insulating material by a method and then baked and fixed.
JP59103856A 1984-05-23 1984-05-23 Manufacture of electrostrictive effect element Granted JPS60247981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59103856A JPS60247981A (en) 1984-05-23 1984-05-23 Manufacture of electrostrictive effect element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59103856A JPS60247981A (en) 1984-05-23 1984-05-23 Manufacture of electrostrictive effect element

Publications (2)

Publication Number Publication Date
JPS60247981A true JPS60247981A (en) 1985-12-07
JPH0256828B2 JPH0256828B2 (en) 1990-12-03

Family

ID=14365085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59103856A Granted JPS60247981A (en) 1984-05-23 1984-05-23 Manufacture of electrostrictive effect element

Country Status (1)

Country Link
JP (1) JPS60247981A (en)

Also Published As

Publication number Publication date
JPH0256828B2 (en) 1990-12-03

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