JPH01184968A - Manufacture of laminar piezoelectric element - Google Patents

Manufacture of laminar piezoelectric element

Info

Publication number
JPH01184968A
JPH01184968A JP63010208A JP1020888A JPH01184968A JP H01184968 A JPH01184968 A JP H01184968A JP 63010208 A JP63010208 A JP 63010208A JP 1020888 A JP1020888 A JP 1020888A JP H01184968 A JPH01184968 A JP H01184968A
Authority
JP
Japan
Prior art keywords
electrodes
laminate
piezoelectric body
electrode
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63010208A
Other languages
Japanese (ja)
Inventor
Hiroto Otsuki
裕人 大槻
Masaru Kobayashi
小林 眞佐留
Yoshihiro Usami
宇佐美 吉弘
Toranosuke Ashizawa
寅之助 芦沢
Masato Taya
昌人 田谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP63010208A priority Critical patent/JPH01184968A/en
Publication of JPH01184968A publication Critical patent/JPH01184968A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/80Constructional details
    • H10N30/87Electrodes or interconnections, e.g. leads or terminals
    • H10N30/871Single-layered electrodes of multilayer piezoelectric or electrostrictive devices, e.g. internal electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/05Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes
    • H10N30/053Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes by integrally sintering piezoelectric or electrostrictive bodies and electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/06Forming electrodes or interconnections, e.g. leads or terminals
    • H10N30/063Forming interconnections, e.g. connection electrodes of multilayered piezoelectric or electrostrictive parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/50Piezoelectric or electrostrictive devices having a stacked or multilayer structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/80Constructional details
    • H10N30/87Electrodes or interconnections, e.g. leads or terminals
    • H10N30/872Interconnections, e.g. connection electrodes of multilayer piezoelectric or electrostrictive devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PURPOSE:To improve in productivity by a method wherein a laminate is built of piezoelectric material sheets and inner electrodes stacked up one upon another alternately, the laminate is subjected to sintering, the edge of every other inner electrode in one side of the laminate is subjected to electrolytic etching for the creation of a groove, and the groove is filled with an insulating material which serves as an insulating layer. CONSTITUTION:A green sheet is built of a calcinated piezoelectric material powder composed mainly of lead nickel-niobate and lead titanate, and an AgPd paste to be an inner electrode 2 is applied thereto by screen-printing. About fifty of such are stacked up and bonded into a laminate under a hot press. The laminate is so cut in the direction vertical to the sheets that all the ends of the inner electrodes 2 will be exposed in the sides of the laminate. The product is then subjected to sintering. A process follows wherein provisional outer electrodes 8, 8' are built for the construction of a laminar piezoelectric body 9 of a laminar capacitor type. An electrolytic etching process follows, wherein the end of every other layer attacked in the process is replaced with a groove, in a side wherein inner electrode 2 are exposed. Grooves are formed, similarly, in the other sides. An insulating paste is allowed to flow into the thusformed grooves. The laminar piezoelectric body 9 produced in this way is cut at the provisional outer electrodes 8, 8', which results in a laminar piezoelectric body 9' lacking outer electrodes. A conductive material is applied to insulating layers 3 in the laminar piezoelectric body 9' for the formation of outer electrodes 4.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は積層型圧電素子の製造法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a laminated piezoelectric element.

(従来の技術とその問題点) 圧電逆効果による変位を利用した積層型圧電体は特開昭
49−86816号公報に示されるように圧電セラミッ
ク薄板上に電極を設け、これを多数枚接着積層した構造
のものである。第7図に示すようにセラミック薄板(圧
電材料1)K設けた内部電極2の側面に配された2つの
外部電極(リード線6)に内部電極2からのびたリード
線取出ゴ 部で一層おきに接続されている。しかしながら上を 記積層型圧電体においては、セラミック薄板の厚さを0
15mm以下にすると、内部電極2の一層おきの接続が
工業的に難かしくなるため、セラミック薄板の厚さは0
,5−以上に限られていた。したがって積層体の駆動に
要する電圧も数100V以上必要になり不便であった。
(Prior art and its problems) A laminated piezoelectric body that utilizes displacement due to the piezoelectric inverse effect is produced by providing an electrode on a piezoelectric ceramic thin plate and laminating a large number of them by bonding, as shown in Japanese Patent Laid-Open No. 49-86816. It has a similar structure. As shown in Fig. 7, the two external electrodes (lead wires 6) arranged on the sides of the internal electrode 2 provided with the ceramic thin plate (piezoelectric material 1) It is connected. However, in the laminated piezoelectric body described above, the thickness of the ceramic thin plate is 0.
If the thickness is less than 15 mm, it will be industrially difficult to connect every other layer of internal electrodes 2, so the thickness of the ceramic thin plate should be 0.
, 5- or more. Therefore, the voltage required to drive the laminated body is several hundreds of volts or more, which is inconvenient.

そこで近年小型でかつ低電圧駆動が可能な一体焼成によ
る積層圧電変位素子を得る目的で厚さ0.03〜0.5
印のセラミックグリーンシートの片面に電極ペーストを
印刷後、これを多数枚熱圧着により積層後焼成し、さら
に外部電極を形成して得られる積層コンデンサの技術の
応用が試みられ。
Therefore, in recent years, with the aim of obtaining a multilayer piezoelectric displacement element that is compact and can be driven at low voltage by integral firing, a thickness of 0.03 to 0.5
An attempt was made to apply the technology of laminated capacitors, which is obtained by printing electrode paste on one side of a ceramic green sheet, laminating a large number of sheets using thermocompression bonding, and then firing them to form external electrodes.

駆動電圧を低下させることが可能となった。しかし積層
コンデンサ型の積層圧電変位素子は第8図に示すように
各内部電極2の面積が圧電材料10面の面積より小さい
ため、電界印加により発生する内部歪の分布が不均一と
なり破壊しやすいという欠点がある。
It became possible to lower the driving voltage. However, in a multilayer capacitor type multilayer piezoelectric displacement element, as shown in Fig. 8, the area of each internal electrode 2 is smaller than the area of the piezoelectric material 10, so the distribution of internal strain generated by the application of an electric field becomes uneven, making it easy to break. There is a drawback.

この問題を解決するため第9図に示すように各内部電極
2の面積と圧電材料1の層の面積を等しくすれば圧電材
料内部の歪の分布は均一となり。
To solve this problem, as shown in FIG. 9, if the area of each internal electrode 2 and the area of the layer of piezoelectric material 1 are made equal, the strain distribution inside the piezoelectric material becomes uniform.

したがって電界のくり返し印加に対しても破壊を生ずる
ことはなくなった。しかしこの場合、各内部電極を並列
接続するには各内部電極端部を一層おきに接続しなけれ
ばならない。この方法としては例えば第9図に示すよう
に、内部電極2の端部に−層おきに金属m右を印刷によ
り形成し、これらをワイヤボンディング6′により接続
する方法(%開昭58−196072号公報)や特開昭
58−196068号公報に示されるように内部電極端
部を一層おきに絶縁ペーストを印刷、焼付し絶縁層を形
成し、その上から導電性物質層(外部電極)を形成する
方法が提案されている。
Therefore, even when an electric field is repeatedly applied, no damage occurs. However, in this case, in order to connect the internal electrodes in parallel, the ends of each internal electrode must be connected every other layer. For example, as shown in FIG. 9, a method of printing a metal m right every other layer on the end of the internal electrode 2 and connecting them by wire bonding 6' (1960-72 As shown in Japanese Patent Laid-Open No. 58-196068, an insulating paste is printed and baked on every other layer of the inner electrode end to form an insulating layer, and then a conductive material layer (external electrode) is formed on top of the insulating paste. A method has been proposed.

しかしながら、これらの方法においては圧電材料の厚さ
を変える場合、電極膜や絶縁層を形成するための印刷用
スクリーンも変える必要があり。
However, in these methods, when changing the thickness of the piezoelectric material, it is necessary to change the printing screen for forming the electrode film and the insulating layer.

また特に内部電極間隔が0.3胴以下の場合、印刷位置
ずれが起きやすく内部電極の並列接続の信頼性が不十分
であるという問題があった。
In addition, particularly when the interval between the internal electrodes is 0.3 cylinders or less, there is a problem in that printing positions tend to shift easily and the reliability of the parallel connection of the internal electrodes is insufficient.

本発明は、上記の問題点に鑑み、内部電極の面積と圧電
材料層の面積が実質的に等しく、電界のくり返し印加に
対しても破壊のおそれがなく、また内部電極の間隔が小
さい場合にも内部電極端部の並列接続を効率よく行ない
、積層型圧電素子を高い生産性で製造できる方法を提供
するものである。
In view of the above-mentioned problems, the present invention provides that the area of the internal electrode and the area of the piezoelectric material layer are substantially equal, there is no risk of destruction even when an electric field is repeatedly applied, and the space between the internal electrodes is small. The present invention also provides a method for efficiently connecting the ends of internal electrodes in parallel and manufacturing a multilayer piezoelectric element with high productivity.

(問題点を解決するための手段) 本発明は、圧電材料と内部電極を交互に複数枚積層して
焼結することにより一体化した後、対向する2つの側面
に各々仮外部電極を形成し、積層きに絶縁処理を行なう
工程と、絶縁処理した積層圧電体を仮外部電極近傍で切
断する工程と、切断した積層圧電体の絶縁処理を施した
2つの面に内部電極と接続する外部電極を形成する工程
とから成り、内部電極面の面積と圧電材料面の面積が実
質的に等しい積層型圧電素子の製造法において。
(Means for Solving the Problems) The present invention integrates a plurality of piezoelectric materials and internal electrodes by alternately stacking and sintering them, and then forming temporary external electrodes on each of two opposing sides. , a step of insulating the laminated layers, a step of cutting the insulated laminated piezoelectric body near the temporary external electrode, and an external electrode connected to the internal electrode on the two insulated surfaces of the cut laminated piezoelectric body. In a method of manufacturing a laminated piezoelectric element, the area of the internal electrode surface and the area of the piezoelectric material surface are substantially equal.

積層圧電体の内部電極の露出している一方の側面を電解
エツチング液に浸漬し、一方の仮外部電極に電圧を印加
して仮外部電極と接続されている内部電極端部を電界エ
ツチングして一方の側面の内部電極端部を一層おきに凹
部とし9次いで同様にして対向する他方の仮外部電極と
接続されている他方の側面の内部電極端部を一層おきに
凹部とし。
One side of the exposed internal electrode of the laminated piezoelectric body is immersed in an electrolytic etching solution, and a voltage is applied to one temporary external electrode to perform electric field etching on the end of the internal electrode connected to the temporary external electrode. The end portions of the internal electrodes on one side surface are made into recesses every other layer. 9 Then, the end portions of the internal electrodes on the other side surface which are connected to the opposing temporary external electrodes are made into recesses every other layer.

これらの凹部に電気絶縁性部材を充填し絶縁層を形成す
ることにより内部電極端部の絶縁処理を行なう積層型圧
電素子の製造法に関する。
The present invention relates to a method of manufacturing a laminated piezoelectric element in which the ends of internal electrodes are insulated by filling these recesses with an electrically insulating member and forming an insulating layer.

本発明において、圧電材料としてはニッケルニオブ酸鉛
、チタン酸鉛、ジルコン酸鉛、それらの混合物等電歪効
果の優れたものであれば制限はなく、薄板に成形され、
一方の面に内部電極となる例えば銀パラジウム系の導体
材料を塗り、薄板を積層して圧着し、焼結して積層型圧
電素子の素材を得る。この場合、素材の対向する2側面
には各々−層ごとに内部電極の端部が露出するように薄
板を積層する。そして素材の上記2側面に対して直角な
他の2側面を積層方向に切断して内部電極全層の端部を
露出させた後、内部電極の端部が一層おきに露出してい
る2側面に導電材料を塗布。
In the present invention, the piezoelectric material is not limited as long as it has an excellent electrostrictive effect, such as lead nickel niobate, lead titanate, lead zirconate, and mixtures thereof, and is formed into a thin plate.
One surface is coated with a conductive material, for example, silver-palladium, which will serve as an internal electrode, and thin plates are laminated, pressed, and sintered to obtain a material for a laminated piezoelectric element. In this case, thin plates are laminated on two opposing sides of the material so that the ends of the internal electrodes are exposed for each layer. Then, after cutting the other two sides perpendicular to the above two sides of the material in the stacking direction to expose the ends of all the internal electrode layers, the two sides where the ends of the internal electrodes are exposed every other layer. coated with conductive material.

焼付けて仮外部電極とし、積層圧電体とする。It is baked to form a temporary external electrode and a laminated piezoelectric material.

次に電圧を印加することによって内部電極が腐食する電
界エツチング液中に前記積層圧電体の内部電極全層の端
部が露出している面の片方を浸漬し、仮性部電極を介し
て電圧を印加して外部電極と接続されている内部電極の
端部を腐食させて一層おきに凹部を形成する。凹部の深
さは50〜500μmが好ましい。同様にしてもう一方
の内部電極全層の端部が露出している面にも凹部を形成
した後、凹部に絶縁物を充填してから、仮性部電極が形
成されている面を切断して、絶縁物を埋込んだ面に対し
て直角な2側面に内部電極の全層の端部を露出させる(
仮りの外部電極は廃棄する)。
Next, one side of the laminated piezoelectric body on which the ends of all the internal electrode layers are exposed is immersed in an electric field etching solution that corrodes the internal electrodes by applying a voltage, and a voltage is applied via the temporary electrode. An electric current is applied to corrode the ends of the internal electrodes connected to the external electrodes to form recesses in every other layer. The depth of the recess is preferably 50 to 500 μm. In the same way, a recess is formed on the surface where the end of all the layers of the other internal electrode is exposed, and then the recess is filled with an insulator, and then the surface on which the temporary electrode is formed is cut. , expose the ends of all layers of the internal electrodes on two sides perpendicular to the surface where the insulator is embedded (
(Discard the temporary external electrode).

最後に絶縁物を埋込んだ面に一層おきに内部電極と電気
的に接続する外部電極を取付けて、内部電極面の面積と
圧電材料面の面積とが実質的に等しい積層型圧電素子と
される。
Finally, external electrodes that are electrically connected to the internal electrodes are attached every other layer to the surface where the insulator is embedded, creating a laminated piezoelectric element in which the area of the internal electrode surface and the area of the piezoelectric material surface are substantially equal. Ru.

(実施例) 本発明を一実施例により図面を参照して説明する。(Example) The present invention will be explained by way of one embodiment with reference to the drawings.

実施例 第6図は本発明の実施例になる積層型圧電素子の斜視図
である。この積層型圧電素子において各圧電材料1の層
は内部電極2を介して焼結により一体化されており、内
部電極2はその端部に一層おきに絶縁層3.3′を有し
、外部電極4によって電気的に並列接続されている。
Embodiment FIG. 6 is a perspective view of a laminated piezoelectric element according to an embodiment of the present invention. In this laminated piezoelectric element, the layers of each piezoelectric material 1 are integrated by sintering via an internal electrode 2, and the internal electrode 2 has an insulating layer 3, 3' at every other layer at its end, and an external They are electrically connected in parallel by electrodes 4.

この積層型圧電素子を得る方法を次に説明する。Next, a method for obtaining this laminated piezoelectric element will be explained.

まず積層コンデンサ型の積層圧電体を得るため。First, to obtain a multilayer capacitor type multilayer piezoelectric material.

ニッケルニオブ酸鉛及びチタン酸鉛を主成分とする圧電
材料の仮焼粉に、有機結合剤として微量のポリビニルブ
チラール、可塑剤としてフタル酸ジオクチル、溶剤とし
てトリクロルエタン及びエチルアルコールの混合溶剤を
加え、ボールミルで24時間混合を行ない、スラリーを
作成した。次にこのスラリーをポリエステルフィルム上
に流し。
A trace amount of polyvinyl butyral as an organic binder, dioctyl phthalate as a plasticizer, and a mixed solvent of trichloroethane and ethyl alcohol as a solvent are added to the calcined powder of a piezoelectric material whose main components are lead nickel niobate and lead titanate. Mixing was performed in a ball mill for 24 hours to create a slurry. This slurry was then poured onto a polyester film.

ドクターブレード法によりシート成形し、厚さ280μ
mのグリーンシートを作製した。このグリーンシートを
50X50mmの大きさにパンチングした後第6図に示
すようにさらに内部電極2としてAg−Pdペースト(
Ag : pd=−y : 3 )をスクリーン印刷し
た。これらのグリーンシート13を内部電極2の端部が
交互に対向する側面に現れるように方向を180°変え
て50枚重ね、熱プレスにより圧着し一体化した後、内
部電極2の端部が一層おきに露出している側面に対して
直角方向の側面を内部電極全層の端部が露出するように
5gの幅で切断した。これを1130℃で焼成した後。
Formed into a sheet using the doctor blade method, 280μ thick
A green sheet of m was prepared. After punching this green sheet into a size of 50 x 50 mm, as shown in FIG.
Ag: pd=-y: 3) was screen printed. 50 of these green sheets 13 are stacked with the directions changed by 180 degrees so that the ends of the internal electrodes 2 appear alternately on the opposing sides, and after being crimped and integrated using a heat press, the ends of the internal electrodes 2 are The side surface perpendicular to the exposed side surface was cut to a width of 5 g so that the end of all layers of the internal electrode was exposed. After firing this at 1130℃.

内部電極2の端部が一層おきに露出している側面に導電
材料を塗付し焼付けて仮性部電極8,8′を形成し、積
層コンデンサ型の積層圧電体9とした。
A conductive material was coated and baked on the side surfaces of the internal electrodes 2 where the end portions of every other layer were exposed to form temporary electrodes 8, 8', thereby obtaining a laminated piezoelectric body 9 of a laminated capacitor type.

(第2図)。(Figure 2).

次に第3図に示すようにこの積層コンデンサ型積層圧電
体9の内部電極2の端部が露出している一つの側面を槽
12中のフェロシアン化カリウム及びシアン化ナトリウ
ムの水溶液から成る電解エツチング用液体10に浸漬し
て、同時に黒鉛製対向電極板11を沈め、これと前記仮
性部電極の一方8とを電源Sに接続し直流2.5vで2
0分間電界エツチングを行なったところ、内部電極2の
露出していた端部は一層おきに腐食され約100μmの
凹部が形成された。次に該積層圧電体の内部電極全層の
端部が露出している他方の側面についても同様な方法で
電界エツチングにより凹部を形成した。次にこれら凹部
に絶縁性ペースト(昭栄化学す9317のガラスペース
ト)を流し込んだ。
Next, as shown in FIG. 3, one side of the multilayer capacitor type multilayer piezoelectric body 9 on which the end of the internal electrode 2 is exposed is subjected to electrolytic etching using an aqueous solution of potassium ferrocyanide and sodium cyanide in a bath 12. Immerse it in the liquid 10, submerge the graphite counter electrode plate 11 at the same time, connect it and one of the temporary electrodes 8 to the power source S, and apply 2.5 V DC to the electrode plate 11.
When electric field etching was performed for 0 minutes, the exposed end portions of the internal electrodes 2 were corroded every other layer, forming recesses of approximately 100 μm. Next, a concave portion was formed by electric field etching in the same manner on the other side surface of the laminated piezoelectric body where the end portions of all layers of internal electrodes were exposed. Next, an insulating paste (glass paste manufactured by Shoei Chemical Co., Ltd. 9317) was poured into these recesses.

この時、凹部以外の積層圧電体側面に付着した絶縁性ペ
ーストは拭き取り、凹部内のペーストを乾燥後600℃
で10分間焼き付けを行なって第4図だ示すように積層
圧電体9の内部’F!&2の全層の端部が露出している
面において内部電極端部に一層おきに絶縁層3を形成し
た。
At this time, wipe off the insulating paste adhering to the side surfaces of the laminated piezoelectric body other than the recessed parts, and dry the paste inside the recessed parts at 600°C.
After baking for 10 minutes, the inside of the laminated piezoelectric body 9 was baked as shown in FIG. Insulating layers 3 were formed every other layer at the ends of the internal electrodes on the surface where the ends of all the layers of &2 were exposed.

このようにして作製した積層圧電体9を第4図に示すよ
うに仮性部電極8,8′の近傍及びその間で幅5 mm
 (図の一点鎖線の位置)で切断することにより第5図
に示すような外部電極のない積層圧電体9′を得た。
As shown in FIG. 4, the laminated piezoelectric body 9 produced in this way has a width of 5 mm near and between the temporary electrodes 8 and 8'.
By cutting at the position indicated by the dashed-dotted line in the figure, a laminated piezoelectric body 9' having no external electrodes as shown in FIG. 5 was obtained.

さらに第6図に示すように積層圧電体9′の絶縁層3を
形成した面に内部電極2の露出端部が接続されるように
導電材料を塗付、焼付けにより外部電極4を形成し、積
層型圧電素子とした。
Further, as shown in FIG. 6, a conductive material is applied and baked so that the exposed end of the internal electrode 2 is connected to the surface of the laminated piezoelectric body 9' on which the insulating layer 3 is formed, and the external electrode 4 is formed. It was made into a laminated piezoelectric element.

(発明の効果) 本発明によれば、内部電極面の面積と圧電材料面の面積
とは実質的に等しくなるため、電界を印加した際に生ず
る歪の分布が均一で破壊のおそれのない信頼性の高い積
層型圧電素子、が得られる。
(Effects of the Invention) According to the present invention, since the area of the internal electrode surface and the area of the piezoelectric material surface are substantially equal, the distribution of strain that occurs when an electric field is applied is uniform and reliable without the risk of destruction. A multilayer piezoelectric element with high properties can be obtained.

また本発明によれば、内部電極端部の一層おきの絶縁は
電界エツチングにより凹部を形成後、この凹部に電気絶
縁性部材を充填することにより行なうため、電極の間隔
が小さかったり、積層圧電体の寸法が変わったりしても
内部電極端部の絶縁処理を極めて効率よく行なうことが
でき高い信頼性で製造することが可能となる。
Furthermore, according to the present invention, the insulation of every other layer at the end of the internal electrode is performed by forming a recess by electric field etching and then filling the recess with an electrically insulating material. Even if the dimensions of the internal electrodes change, the insulation treatment at the ends of the internal electrodes can be performed extremely efficiently, making it possible to manufacture them with high reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第6図は本発明の実施例になる積層型圧1!
素子の製造法を説明する図で、第1図は圧電材料に内部
電極を印刷し積層する状態、第2図は積層圧電体の概要
、第3図は電解エツチング方法、第4図は絶縁層を形成
した積層圧電体の概要。 第5図は第4図の積層圧電体を切断した状態及び第6図
は完成した積層型圧電素子を示し、第7乃至第9図は従
来の積層型圧電素子を示す斜視図である。 符号の説明 1・・・圧電材料    2・・・内部電極3.3′・
・・絶縁層   4・・・外部電極5・・・内部電極の
リード取出し部 6・・・リード線     7・・・金属膜8.8′・
・・仮性部電極 9・・・積層圧電体10・・・電界エ
ツチング液 11・・・対向電極板12・・・檜13・
・・グリーンシート/〆、゛ 代理人 弁理士 若 林 邦 彦 ニ;1); ノ a
Figures 1 to 6 show the laminated mold pressure 1! which is an embodiment of the present invention!
These are diagrams explaining the manufacturing method of the element. Figure 1 shows the state in which internal electrodes are printed and laminated on the piezoelectric material, Figure 2 shows an overview of the laminated piezoelectric material, Figure 3 shows the electrolytic etching method, and Figure 4 shows the insulating layer. Overview of the laminated piezoelectric material formed. FIG. 5 shows a cut state of the laminated piezoelectric body of FIG. 4, FIG. 6 shows a completed laminated piezoelectric element, and FIGS. 7 to 9 are perspective views showing conventional laminated piezoelectric elements. Explanation of symbols 1... Piezoelectric material 2... Internal electrode 3.3'.
...Insulating layer 4...External electrode 5...Lead extraction part of internal electrode 6...Lead wire 7...Metal film 8.8'
...Temporary part electrode 9...Laminated piezoelectric body 10...Electric field etching liquid 11...Counter electrode plate 12...Hinoki 13.
・・Green Sheet/゛Representative Patent Attorney Kunihiko Wakabayashi;1);No a

Claims (1)

【特許請求の範囲】[Claims] 1.圧電材料と内部電極を交互に複数枚積層して焼結す
ることにより一体化した後、対向する2つの側面に各々
仮外部電極を形成し、積層コンデンサ型の積層圧電体を
得る工程と、該積層圧電体の他の両側面に露出した内部
電極端部に一層おきに絶縁処理を行なう工程と、絶縁処
理した積層圧電体を仮外部電極近傍で切断する工程と、
切断した積層圧電体の絶縁処理を施した2つの面に内部
電極と接続する外部電極を形成する工程とから成り,内
部電極面の面積と圧電材料面の面積が実質的に等しい積
層型圧電素子の製造法において、積層圧電体の内部電極
の露出している一方の側面を電解エッチング液に浸漬し
,一方の仮外部電極に電圧を印加して仮外部電極と接続
されている内部電極端部を電界エッチングして一方の側
面の内部電極端部を一層おきに凹部とし、次いで同様に
して対向する他方の仮外部電極と接続されている他方の
側面の内部電極端部を一層おきに凹部とし、これらの凹
部に電気絶縁性部材を充填し絶縁層を形成することによ
り内部電極端部の絶縁処理を行なうことを特徴とする積
層型圧電素子の製造法。
1. A process of obtaining a laminated capacitor-type laminated piezoelectric material by forming temporary external electrodes on each of the two opposing sides after integrating the piezoelectric material and internal electrodes by laminating and sintering a plurality of layers alternately; a step of insulating the ends of the internal electrodes exposed on the other both sides of the laminated piezoelectric body every other layer; a step of cutting the insulated laminated piezoelectric body near the temporary external electrode;
A multilayer piezoelectric element comprising the step of forming an external electrode to be connected to an internal electrode on two insulated surfaces of a cut multilayer piezoelectric material, and the area of the internal electrode surface is substantially equal to the area of the piezoelectric material surface. In the manufacturing method, one exposed side surface of the internal electrode of a laminated piezoelectric body is immersed in an electrolytic etching solution, and a voltage is applied to one temporary external electrode to remove the end of the internal electrode connected to the temporary external electrode. By electric field etching, the ends of the inner electrodes on one side surface are made into recesses every other layer, and then, in the same way, the end parts of the inner electrodes on the other side surface, which are connected to the opposing temporary external electrode, are made into recesses every other layer. A method for manufacturing a laminated piezoelectric element, characterized in that the end portions of the internal electrodes are insulated by filling these recesses with an electrically insulating member and forming an insulating layer.
JP63010208A 1988-01-20 1988-01-20 Manufacture of laminar piezoelectric element Pending JPH01184968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63010208A JPH01184968A (en) 1988-01-20 1988-01-20 Manufacture of laminar piezoelectric element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63010208A JPH01184968A (en) 1988-01-20 1988-01-20 Manufacture of laminar piezoelectric element

Publications (1)

Publication Number Publication Date
JPH01184968A true JPH01184968A (en) 1989-07-24

Family

ID=11743854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63010208A Pending JPH01184968A (en) 1988-01-20 1988-01-20 Manufacture of laminar piezoelectric element

Country Status (1)

Country Link
JP (1) JPH01184968A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992005593A1 (en) * 1990-09-13 1992-04-02 Hitachi Metals, Ltd. Method for manufacturing electrostrictive effect element
US6700311B2 (en) * 2000-02-12 2004-03-02 Robert Bosch Gmbh Piezoelectric ceramic body having silver-containing internal electrodes
WO2008092740A2 (en) * 2007-01-31 2008-08-07 Siemens Aktiengesellschaft Piezoceramic multilayer actuator and method for the production thereof
CN109994597A (en) * 2017-12-29 2019-07-09 苏州攀特电陶科技股份有限公司 Multilayer piezoelectric ceramic actuator and preparation method thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992005593A1 (en) * 1990-09-13 1992-04-02 Hitachi Metals, Ltd. Method for manufacturing electrostrictive effect element
DE4192278T (en) * 1990-09-13 1992-10-08
US5254212A (en) * 1990-09-13 1993-10-19 Hitachi Metals, Ltd. Method of fabricating electrostrictive-effect device
US6700311B2 (en) * 2000-02-12 2004-03-02 Robert Bosch Gmbh Piezoelectric ceramic body having silver-containing internal electrodes
WO2008092740A2 (en) * 2007-01-31 2008-08-07 Siemens Aktiengesellschaft Piezoceramic multilayer actuator and method for the production thereof
WO2008092740A3 (en) * 2007-01-31 2008-09-18 Siemens Ag Piezoceramic multilayer actuator and method for the production thereof
JP2010517311A (en) * 2007-01-31 2010-05-20 シーメンス アクチエンゲゼルシヤフト Piezoelectric ceramic multilayer actuator and manufacturing method thereof
US7905000B2 (en) 2007-01-31 2011-03-15 Siemens Aktiengesellschaft Piezoceramic multilayer actuator and method for the production thereof
CN109994597A (en) * 2017-12-29 2019-07-09 苏州攀特电陶科技股份有限公司 Multilayer piezoelectric ceramic actuator and preparation method thereof

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