JPS6024060A - Semiconductor controlled rectifying element - Google Patents

Abstract

PURPOSE:To restrain finger voltage on a turn-OFF to a small value while increasing di/dt resistance by making a resistance value between a gate electrode constituting a controlled rectifying element and a cathode electrode as a main electrode larger than that between the gate electrode and an auxiliary electrode surrounding the main electrode. CONSTITUTION:An N type layer 22 and a P type layer 23 are laminated and formed on a P type semiconductor layer 20, the back thereof has an anode electrode 21, and an N type emitter region 24 and an N type auxiliary emitter region 25, which is connected to the region 24 and extended, are diffused and formed to the layer 23. A gate electrode 28 is attached on the end section side of the region 25 while being positioned on the layer 23, and a cathode electrode 26 as a main electrode, which does not reach on the region 25, and an auxiliary electrode 27 connected to the electrode 26 are applied on the region 24. In the constitution, the region 25 is constituted by a first auxiliary emitter section 25a separating the region 24 and the electrode 28 and a second auxiliary emitter section 25b, which is separated from the electrode 28 and is in contact with the region 24. Accordingly, a resistance value R2 between the electrodes 26 and 28 is increased only by the shortening section of the electrode 26.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Background of the Invention] Conventionally, semiconductor devices shown in FIGS. 1A to 1D, for example, have been used as large-sized power devices.

1 in the figure is a P-type semi-dedicated layer. P4=71i
A P conductivity type semiconductor layer 3 is formed on the conductivity type semiconductor layer 1 with an N conductivity type semiconductor layer 2 interposed therebetween. P-type semiconductor layer 3
A main emitter region 4 made of an N conductor layer having a predetermined diffusion depth is formed in the main emitter region 4 . An auxiliary emitter region 5 extending from the main emitter region 4 is formed in the P 4Q',% type semiconductor layer 3 . On the main emitter region 4, a main electrode 6 having an extension portion 6a extending onto the auxiliary emitter region 5 is formed. An auxiliary electrode 7 is formed on the P-conductivity type semiconductor 3 so as to extend both ends onto the auxiliary emitter region 5 and surround the main electrode 6. Further, a gate electrode 8 is provided on the P conductivity type semi-dedicated peak 3 so as to face the protruding portion 6a of the main electrode 6 and the auxiliary electrode 7.

According to the semiconductor device B manufactured by 411fJ in this way,
Since it has an amplification gate-1 structure, the turn-on of the sirisk is performed in two steps, and the sentinel finker voltage VFIN is generated.

[Problems before background techniques]

In the above-mentioned semiconductor device η, as shown in FIG. 1(C), considering the case of voltage turn-on, when the gate current I is caused to flow, the main silicon risk portion ① is turned on as shown in FIG. 1(C). At this time, the auxiliary thyristor is also turned on. The turn-on current ■ of the auxiliary cylinder flows into the main cylinder, and the turn-on current ■ flows into the main cylinder. However, since the value of the resistance R1 between the gate electrode 8 and the extension 68 of the main electrode 6 is small, a part of the turn-on current flows from the auxiliary thyristor to the main thyristor even after the turn-on transition.

This current causes d l/dt breakdown. In other words,
Although the conventional semiconductor device y can reduce the finger voltage vpi N, there is a problem in that the di/dt bone resistance cannot be improved.

[Purpose of the invention]

In the present invention, the finger voltage at turn-on is set to .

[Main part of the invention In the present invention, between the gate electrode and the main electrode! The resistance value is made larger than the resistance value between the gate electrode and the auxiliary electrode, and the finger voltage at the time of Kuhn-phone is set to a small value [Embodiment of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 (Al is a plan view of a main part of an embodiment of the unexploded 1F-1, and CB of the same figure is a cross-sectional view taken along the line BB of the same embodiment). In the figure, 20 is an art electrode on the exposed back side, 21
It is a P-shaped hemifron layer formed. A P-type semiconductor layer 23 is formed on the P-type semiconductor 2o with an N-type semiconductor layer 22 interposed therebetween. A main emitter region 24 made of an N-type semiconductor layer having a predetermined diffusion depth is formed in the P-type semiconductor layer 23 . Furthermore, an auxiliary emitter region 25 extending from the main emitter region 24 is formed in the P-type semiconductor layer 23 . The auxiliary emitter region 25 includes a first auxiliary emitter portion 25a separated from the main emitter region 24 and a gate electrode 28 (described later), and a second auxiliary emitter portion 25a separated from the gate electrode 28 and connected to the main emitter region 24. part 2
5b. On the main emitter β region 24, there is a main electrode 26 having a J shape and serving as a cathode 4a. The main electrode 26 does not extend over the auxiliary emitter sacrum 25 . At the circumference 1:i of the main electrode 26, 1 part of both axes thereof are positioned 7i on the auxiliary emitter region 25, and the main electrode 26
An auxiliary electrode 27 is formed to surround the auxiliary electrode 27 . If the P-type semiconductor M; 23 has a gate electrode facing the main room 26 from between both ends of the auxiliary electrode 27, then the resistance R2 between the gate electrode 28 and the main electrode 26 is: Compared to those shown in FIGS. 1(A) to 1(D), the main electrode 26 is larger due to the absence of an extended portion thereof. As a result, when the current flows through the gate, the constant current that flows directly into the main cylinder is reduced, and the finger voltage VFIN at turn-on is <
1.5V, d+/dt tolerance is ';> 35
OA/μs, but in the conventional semiconductor device, the finger voltage VFIN can reduce the finger voltage at turn-on and achieve the same d + /dt compensation amount.

In addition to the examples, as shown in FIG.
auxiliary emitter portion 25B and second auxiliary emitter portion 2
5b,! : may be separated so that the main thyristor and the auxiliary thyristor are separated. Furthermore, d v / dt
In order to prevent a decrease in tolerance, the
), a shorting electrode 31 may be provided on the second auxiliary emitter portion 25b, which serves as a shorting hole for shorting the inner P-type semiconductor layer of the first auxiliary emitter portion 25a.

According to the invention, it is possible to suppress the finger voltage at turn-on to a small value and to improve di/dt tolerance.

[Brief explanation of drawings]

Figure 1) is a plan view of a conventional semiconductor device;
is a cross-sectional view taken along line B-B of the same example; Q is a cross-sectional view taken along line C-C of the same example; 2(A) is a plan view of essential parts of an embodiment of the present invention, FIG. 2(B) is a sectional view of the same embodiment along line B-B, and FIG. FIG. 4(A) is a plan view of the main part of another embodiment of the present invention having a short-circuit emitter section, and FIG. 4(B) is a plan view of the main part of another embodiment of the present invention. It is a sectional view taken along the line B-B of the example. 20...P-type semiconductor layer, 2no...Anode electrode, 2
2... N-type semiconductor layer, 23... P-type semiconductor layer, 24
...Main emitter region, 25...Auxiliary emitter region,
25a...First auxiliary emitter portion, 25b...Second auxiliary emitter portion, 26...Main electrode, (A) (B) (C) 297 Figure 1

Claims (1)

[Scope of Claims] 1. A semiconductor substrate of Q type, half-layers of opposite conductivity type provided on both sides of the semiconductor substrate, and a semiconductor layer of one conductivity type provided on one of the semiconductor layers. a main emitter region, a gate electrode provided on the one semiconductor layer to face the main emitter region; Evening spaced apart from the gate electrode! 1
and the opposing portion, an auxiliary emitter region of one conductivity type having a second portion spaced apart from the gate electrode and connected to the main emitter region; an auxiliary electrode that short-circuits one semiconductor layer on the main emitter region side; a cathode electrode provided in the main emitter region without contacting the auxiliary emitter region; and an anode electrode provided in the other semiconductor layer. A semiconductor-controlled rectifying element characterized by comprising: 2. The semiconductor-controlled rectifier device according to claim 1, further comprising a short-circuiting electrode that short-circuits the one semiconductor layer exposed in the first portion of the auxiliary emitter region. 3. The semiconductor i1r control rectifier element according to claim 2g1, wherein the first and second parts of the auxiliary emitter are separated by the one semiconductor layer.