JPS6023529B2 - push pull amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in push-pull amplifier circuits used in power amplifiers and the like of audio equipment.

The basis of such an amplifier circuit is a class A and class B combinational push-pull amplifier circuit.

Here, class A transistors have the advantage that a pair of output transistors always operate in the active region and never shift to the cutoff region, so switching distortion does not occur, but on the other hand, it is necessary to flow a large bias current. The disadvantage is that heat loss is large. Class B transistors have the advantage of reducing bias current and reducing heat loss, but have the disadvantage of generating switching distortion because the pair of output transistors are alternately switched between active and cutoff states. Therefore, the first object of the present invention is to eliminate the drawbacks of class A and class B push-pull amplifier circuits, and to provide a push-pull amplifier circuit with low heat loss and no switching distortion. A second object of the present invention is to provide a push-pull amplifier circuit in which the operating current of an output transistor performing push-pull amplification operation can be easily set to the minimum necessary limit. An embodiment of the present invention will be specifically described below based on the drawings.

In Figure 1, an NPN output transistor Q, and a PNP
Both emitters of output transistor Q2 of
, , R2 are commonly connected at the output point OUT, and a load RL such as a speaker is connected to the output point OU and is driven by the output amplified by the output transistors Q, , Q2. The emitters of driver transistors Q and Q4 are connected to the bases of transistors Q and Q2, respectively, and emitter resistors R3 and R4 are connected between the emitters and the output point OUT, respectively. A base bias voltage from a base bias generating means is supplied between the bases of the driver transistors Q and Q via a voltage dividing means consisting of resistors R5, R6, and R7. That is, the base bias generation means is composed of a series circuit of an NPN transistor Q, diodes D, D2 that generate a reference bias, a voltage adjustment resistor R8, and a PNP transistor Q6. The current is supplied to the input transistor Q7, and an input signal is applied by an input transistor Q7 whose base is connected to the input terminal IN'. The transistors Q5 and Q6 operate as fixed bias generating transistors, and the transistors Q5 and Q6 operate as fixed bias generating transistors.
are connected to variable bias transistors Q, Q9 that detect the currents of the output transistors Q, , Q2. In other words, the emitter of PNP transistor Q is transistor Q.
5 and the collector of transistor Q5 via resistor R9, the collector is connected to the emitter of transistor Q5, and the base is connected to resistors R, . , and the output point OUT via the diode D3, and the emitter of the NPN transistor Q is connected to the base of the transistor pine, and the resistors R, o
The collector is connected to the emitter of the transistor Q6, and the base is connected to the output point OUT via a resistor R2 and a diode D4. Resistance R,. and diode○3
and a constant current source 12 for the resistor R,2 and the diode D4,
13 is supplied, and a constant voltage is supplied to the bases of the transistors Q and Q9 with respect to the output point OUT. Here variable bias transistor Q8, Q
9, so that the operating point when there is no signal is at point A shown in Figure 2.
That is, the minimum base bias at which the collector current begins to flow is set to be released, and therefore the collector currents of the transistors Q8 and Q9 are extremely small when there is no signal.

Therefore, the voltage drop across the resistors R9, R, and o becomes very small, and the voltage between the bases of the output transistors Q, Q2 is equal to the base-emitter voltage of each of the transistors Q5, Q6, and the forward direction voltage of the diodes D, D2. It is set based on the sum of the voltage drop and the voltage generated across resistor R8. In this way, a signal is applied from the input transistor Q7, and the output point OU
When T transitions to the positive side due to its input signal, current flows through the output transistor Q, and the voltage between the base of the transistor Q and the output point OUT increases. The base-emitter voltage increases and collector current flows through transistor Q8.

If the current amplification factor of each transistor is large, most of the current flowing through resistor R9 becomes the collector current of transistor Q8, and the current flowing through resistor R8 becomes the same as when there is no signal, and flows through both collectors of transistors Q and Q. The voltage between them is kept the same as when there is no signal. On the other hand, the operating point of transistor Q shifts from point A to point B in Figure 2, but the change in the voltage between the base and emitter at this time is minute, and the voltage between the base and collector of transistor Q8 also has no signal. Almost the same as time. Also, the resistance R,. A current is coupled to the diode D3 from a constant current source, and the current drop is always constant. Therefore, transistor Q2 for output point OUT
The base voltage of Q2 is maintained at approximately the same voltage as when there is no signal, and the output transistor Q2 does not enter the cutoff region. Next, even when the output point OUT shifts to the negative side due to the input signal condition and the output transistor Q2 performs an amplifying operation, the output transistor Q does not shift to the cutoff region due to the same effect as described above.

Note that the voltage dividing means shown by resistors 5 to R7 divides the voltage generated from the bias generation circuit composed of the transistors Q and Q6, diodes D, D2, and resistor R8, and divides the voltage generated from the bias generating circuit to both the output transistors Q, Q2. It acts to apply a bias voltage between the bases.

In other words, as is clear from the above explanation, the bias generation circuit described above uses the base-emitter voltage of the transistors Q5 and Q6, so compared to a bias generation circuit using a so-called varistor, the voltage between the output transistors Q, Q2 is It is in the mirror direction where the voltage applied between the bases is greater. In other words, it may not be possible to reduce the operating current of the output transistors Q, Q2 to the minimum necessary value, and therefore the driver transistors with small base-emitter voltage, such as large chip size, are used in the bias generation circuit. etc. must be used. The above resistance R
The voltage dividing means indicated by 5 to R7 thus easily divides the bias voltage from the bias generation circuit including transistors, and makes it possible to reduce the operating current of the output transistors Q, Q2 to the minimum necessary value. This makes it possible to provide output operating characteristics with extremely low heat loss, and at the same time, by selecting various resistance values, it is possible to widen the range of transistors that can be used in the bias circuit. It is clear that the same effect can be obtained by using the above voltage dividing means by combining resistors R5 and R7 as shown in FIG. 3 or FIG. 4, or by combining resistors R6 and R7.

Since the present invention is configured as described above, the output transistor always operates in the active region and never shifts to the cut-off region, so switching distortion seen in class B push-pull amplifier circuits does not occur. In addition, since the voltage generated from the bias generation circuit is applied between both bases of the output transistor via the voltage dividing means, the output transistor can be driven with the minimum required operating current, which minimizes heat loss. There is an effect of reducing

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
The operating characteristic diagram of the transistor used in the embodiment shown in the figure, and FIGS. 3 and 4 are connection diagrams showing modifications of the voltage dividing means. Q,,Q2...output transistor, Q5,Q...bias generation transistor, Q8,Q9...current detection transistor, R5-R7...resistor (voltage dividing means). Figure l Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1. In an amplifier circuit that performs a push-pull operation using base bias means connected between the bases of first and second output transistors whose emitters are connected in common at an output point via a resistor, the base bias means is first and second constant voltage generating means for generating a constant voltage with respect to an output point; an emitter is connected to the base of the first output transistor via a resistor, and a base is connected to the first constant voltage generating means. and a second bias transistor whose emitter is connected to the base of the second output transistor via a resistor and whose base is connected to the second constant voltage generating means. , a third bias transistor having a collector connected to the base of the first output transistor, a base connected to the emitter of the first bias transistor, and an emitter connected to the collector of the first bias transistor; a fourth bias transistor having a collector connected to the base of the second output transistor, a base connected to the emitter of the second bias transistor, and an emitter connected to the collector of the second bias transistor; a reference bias generating means connected between the emitters of the third and fourth bias transistors, and a reference bias generating means connected between the bases of the first and second output transistors and the bias generating circuit; A push-pull amplifier characterized in that a means for dividing the generated voltage is connected.