JPS60216382A - Laterial dot scrol system for characters on crt screen - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (Technical Field) The present invention relates to a horizontal dot scrolling method for scrolling characters displayed on a CRT screen horizontally dot by dot. FIG. 2 is a circuit block diagram of a conventional example in which a computer system is used to display characters on a CR7 screen. In FIG. 1, reference numeral 1 specifies the display position of the character on the CRT screen and generates a fresh memory address MA, and one display area is an xXy dot matrix (where x is the number of dot lines in the vertical direction, and y is a CRT controller that generates a raster address RA that specifies a vertical dot line when the dot pattern is composed of a dot pattern (number of horizontal dot lines); 2 generates a character code CC such as an ASCII code in response to the refresh memory address MA; Text video R
AM, 3 is a character generator that outputs dot information of a character displayed on the CRT screen in response to the character code CC and the raster address RA; 4 is a character generator that outputs parallel data P from the character generator to a dot clock C; This is a shift register that responds by converting it into serial data S and outputting it. The output of this shift register 4 is given to a CRT (not shown).

In the conventional example having such a configuration, when characters are scrolled in the horizontal direction on the CR7 screen, the scrolling is performed character by character. For this reason, the movement of the character on the CRT screen is step-like, and it is not necessarily easy to see. Furthermore, it was not possible to display multiple characters on a CRT screen, and the range of applications for scrolling was not sufficient.

(Eye height) The present invention was made in view of the above circumstances, and
The character on the CRT screen can be scrolled dot by dot, so that the movement of the character on the CRT screen is continuous, making the scroll easier to see, and the characters can be overlapped on the CRT screen. The purpose is to widen the range of applications by making it possible to display images using

(Example) Hereinafter, the present invention will be described in detail based on an example shown in the drawings. FIG. 2 is a circuit block diagram according to an embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals. In this embodiment, in the same way as in FIG.
Specify the display position on the T screen or generate a fresh memory address MA, and one display area is an xXy dot matrix (where x is the number of dot lines in the vertical direction and y is the number of dot lines in the horizontal direction). A CRT controller 1 that generates a raster address RA specifying a vertical dot line when composed of a pattern, a text video RAM 2 that generates a character code CC such as an ASCII code in response to the refresh memory address MA, and the character code CC. and a character generator 3 which outputs dot information of a character displayed on a CRT screen in response to the raster address RA, and converts parallel data P from the character generator into serial data S in response to a dot clock C. A shift register 4 is provided for outputting the data.

The features of this embodiment are as follows.

That is, in this embodiment, the shift register 4 includes a shift register 4a for even columns and a shift register 4b for odd columns.
It is made up of. Each of these shift registers 4a, 4b is selectively connected to the character generator 3 by a switch means 6. This switching means 6 performs a switching operation depending on whether the fresh memory address MA of the CRT controller 1 is an even number or an odd number. This switching means 6 is configured to perform a switching operation depending on whether the least significant bit of the IJ fresh memory address MA is 0 or 1. If the least significant bit is O, for example, it is assumed that the refresh memory address MA is an even number, and the switch means 6 is switched to the even column shift register 6a side. If the least significant bit is 1, it is assumed that the refresh memory address MA is an odd number, and the switch means 6 is switched to the shift register 6b for odd columns. Note that the column here refers to a horizontal line on the CR7 screen.

Next, a further characteristic feature of this embodiment is that it is provided with a dot scroll control circuit 5 that controls scrolling of characters in the horizontal direction in accordance with scroll data. This dot scroll control circuit 5 controls the shift registers 4a and 4 for a period corresponding to the scroll data.
A control signal A for prohibiting the shift registers 4a and 4b from outputting the serial data is applied to the shift registers 4a and 4b. Therefore, this dot scroll control circuit 5
Scroll data RAM 51 includes a scroll data storage area that corresponds one-to-one to the addresses of the text video RAM 2, and in which scroll data is individually stored, and a counter that counts the dot clock C. The comparison circuit 53 outputs the control signal A until the scroll data from the scroll data RAM 51 matches the count value from the counter circuit 52. This comparison circuit 53 has a comparison circuit 53a for even columns and a comparison circuit 53b for odd columns. Both the comparison circuits 53a and 53b for even columns and odd columns are selectively connected to the scroll data RAM 51 in response to a switch operation of the switch means 54. In this case, the switch means 54 is also operated in the same way as the switch means 6, depending on whether the lowest 7th bit of the fresh memory address MA is O or 1. When the least significant bit is O, the switch means 54 switches to the even column comparison circuit 53a, and when the least significant bit is 1,
The comparison circuit for odd columns is switched to the comparison circuit 531) side. Both the switching means 6 and 54 operate in conjunction with each other. 7 is an OR date for outputting one of the outputs of the shift registers 4a and 4b to the CRT.

Next, the operation of this embodiment will be explained.

In this dot scroll control circuit 5, the scroll data RAM 51 is accessed at the same timing by the refresh memory address MA from the CRT controller 1. Therefore, text video RAM2
When a character code is output from the character code, at the same time, the scroll data RAM 51 outputs the scroll data stored at the address corresponding to the character code. This scroll data is given to one of the comparison circuits 53, 53a or 58-31]. This selection is made by switching means 5
It is determined by the switch operation in step 4. Counter circuit 52
Here, the dot clock C is counted, and the count value is similarly output to the comparison circuits 53a and 53b. Then, the comparator circuit 53a or 53b on the side switched by the switch means 54 will continue to operate the shift register 4a on the side selected by the switch means 6 until its count value matches the scroll data.
Alternatively, the control signal continues to be output to 4b. As a result, the character data from the character generator 3 remains held in the shift register 4a or 4b, and no serial data is output from the shift register 4a or 4b to the CRT.

Next, when the comparison circuit 53a or 53b stops outputting a control signal due to the match between the count value and the scroll data, the hold on the character data in the shift register 4a or 4b is released, and the shift register 4a or 4b releases the hold of the character data. 4b outputs the serially converted data from the character generator 3. In this way, data is output to the CRT with a delay of a period corresponding to the scroll data, so that the characters are displayed on the CRT screen as if they were scrolled to the right.

Since the scroll data for these scrolls is individually stored in the scroll data RAM 51, it is possible to cause each character to scroll independently.

Therefore, this firstly causes the switch means 6.54 to
For example, if the character rAJ in the even column and the character "B" in the odd column are displayed as shown in Figure 3 (A), then the character rAJ in the even column is changed to 5 dots. The scroll data RAM 51 outputs scroll data for scrolling by the number of minutes, and then the switch means 6 and 54 are switched to the odd column side, and the scroll data RAM 51 does not output scroll data, thereby scrolling the character rBJ in the odd column. If not, Figure 3 (B)
The character IAJ in the even column is displayed overlapping the character "B" in the odd column, as shown in FIG.

FIG. 4 is a block diagram specifically showing the dot scroll control circuit 5 and shift register 4 shown in FIG. 2 within broken lines.

In FIG. 4, 7 is an attribute RAM, 8.9 is a latch circuit, and 10 is a CGROM/RAM. Within the broken line, 11 and 12 are latch circuits, and 13 and 14 are gates for outputting attribute data and character dot data, respectively, when necessary.
.

When the hold of 4b is released, an external signal is used.

That is, the gates are opened when the shift registers 4a and 4b begin to output dot data, and are closed at other times to prevent data such as unnecessary noise from being output. Comparing circuits 53a and 53b are 4-pit counters, which selectively output control signals to data terminals 13 and 14 through gates 15 to control the hold operations of shift registers 4a and 4b. A latch circuit 16 is used to synchronize the timing with the output data from the RAM 2.7. 17 is a latch control circuit.

This latch control circuit 17 controls the scroll data RAM 5
In response to a data latch signal included in the scroll data starting from 1, a control signal is output indicating whether to continue latching the scroll data. 18 is a latch circuit, and this latch circuit 18 latches scroll data in synchronization with a control signal from the latch control circuit 17.

Therefore, collective scrolling is possible by simply rewriting the latch signals for the first character and the last character. Reference numeral 19 denotes an adder circuit for adding a two's complement number to the scroll data. Reference numeral 20 denotes a data latch timing generation circuit, and this data latch timing generation circuit 20 uses the dot clock C or other clocks to operate the comparison circuits 53a and 53b and the shift registers 4a and 4.
A control signal is generated to cause data b and latch circuits 11 and 12 to simultaneously latch data. This control signal is 12
- Two types are generated: one for even-numbered columns and one for odd-numbered columns. As a result, each circuit 53a, 531], 4a, 4b, 11
．． 12 can be operated independently as described in FIG.

(Effects) As described above, according to the present invention, there is provided a dot scroll control circuit that controls scrolling of characters in the horizontal direction according to scroll data, and the dot scroll control circuit controls the address of the text video RAM. A scroll data RAM having scroll data storage areas in one-to-one correspondence and in which scroll data is individually stored, a counter circuit that counts the dot clock, and the scroll data RAM provided from the scroll data RAM. The shift register includes a comparison circuit for even columns and a comparison circuit for odd columns, each outputting a control signal until the scroll data matches the count value from the counter circuit. It is composed of a register and a shift F register for odd columns, and selectively switches both of the comparison circuits to connect one of them to the scroll data RAM, and selectively switches both of the shift registers to connect one of them to the character. The comparator circuit and the shift register are connected to a generator, and when the connection is made, one for even columns and one for odd columns are selected. Since the serial data is held, characters can be scrolled dot by dot on the CR1 screen.
- It is possible to make the character's movement continuous and make the scroll easier to see.
By displaying characters overlapping each other on a CRT screen, it has become possible to widen the range of applications.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram of a conventional example, Fig. 2 is a circuit block diagram of an embodiment of the present invention, and Figs. , FIG. 4 is a concrete circuit diagram of the dot scroll control circuit and shift register of FIG. 2. 1 is CRT controller, 2 is text video RAM
, 3 is a character generator, 4 is a shift register,
5 is a dot scroll control circuit. 51 is a long crawl data RAM, 52 is a counter circuit,
53 is a comparison circuit, and 54 is a latch circuit. Applicant Sharp Co., Ltd. Agent Patent Attorney Kazuhide Oka1)

Claims (1)

[Claims] (1) Specify the display area of the character on the CRT screen and generate a fresh memory address, and one display area is an xXy dot matrix (where x is the number of dot lines in the vertical direction and y is the number of dot lines in the horizontal direction). ); a CRT controller that generates a raster address specifying a vertical dot line when configured with a dot pattern; a text/video RAM that generates a character code in response to the refresh memory address; C in response to address and
Applicable to a computer system equipped with a character generator that outputs dot information of a character displayed on an RT screen, and a shift register that converts parallel data from the character generator into serial data in response to a dot clock and outputs the serial data. A dot scroll control circuit is provided to control scrolling of characters in the horizontal direction according to scroll data, and the dot scroll control circuit is configured to control scrolling of the text video R.
A scroll data RAM having a scroll data storage area that corresponds one-to-one to the address of the AM and in which scroll data is individually stored in the scroll data storage area, a counter circuit that counts the dot clock, and the scroll data The shift register includes a comparison circuit for even columns and a comparison circuit for odd columns, each of which outputs a control signal until the scroll data given from the RAM matches the count value from the counter circuit. and a shift register for odd columns, and selectively switches both of the comparison circuits to connect one of them to the scroll data RAM, and selectively switches both of the shift registers to connect one of them to the The comparator circuit and the shift register are connected to a character generator, and when the comparison circuit and the shift register are connected, one for even columns and one for odd columns are selected. , a horizontal dot scrolling method for characters on a CRT screen, characterized in that the serial data is held.