JPS6021561A - Semiconductor protection device - Google Patents

Abstract

PURPOSE:To enable to adjust the withstand voltage to an arbitrary value less than the junction withstand voltage by prevention of a high withstand voltage transistor incorporated in a complementary type semiconductor device by a method wherein an impurity diffused region of one conductivity type is provided in a well of reverse conductivity type to that of a substrate, and then a diode is constructed between the well and the substrate. CONSTITUTION:The well 12 of reverse conductivity type to that of the semiconductor substrate 11 of one conductivity type, and the diffused layers 13 and 14 are provided in the substrate. The diffused layer 14 is of reverse conductivity type to that of the well, goes inside the boundary of the well, and exists in electrically floating state at a high concentration. The diffused layer 13 connects to the well at the same potential but has difference in impurity concentration, and the diffused layer 15 connects to the substrate at the same potential but has difference in impurity concentration; thus constructing the P-N junction diode between the well and the substrate. The withstand voltage can be determined by arbitrary selection of the distance l1 from the well end to the diffused layer 15 and the distance l2 to the diffused layer 14 based on the determination of characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output protection device for a MOB type semiconductor device, and particularly to an output protection device for a high voltage transistor in a complementary MO8 semiconductor device.

Complementary MO8 semiconductor devices are capable of low power consumption and low voltage operation, and have been used in a particularly wide range of applications in recent years. Therefore, while retaining the characteristics of this complementary MO8, there are specifications that require high-voltage operation, such as display tubes, and there are devices that incorporate high-voltage MO8) transistors.

This high voltage transistor is required to have a moderately high voltage resistance of 70 to 80 V or less.

The output transistor is operated with a high withstand voltage, but as an integrated circuit device, a protection device is also required to prevent it from being destroyed by external high voltage.

The gate insulating film thickness of MO8 semiconductor devices is also becoming thinner in order to increase drive capability and enable high-speed operation, and great efforts are being made to prevent transistor breakdown.

SUMMARY OF THE INVENTION Accordingly, the present invention provides an output protection device for a complementary MO8 semiconductor device having a built-in high voltage transistor.

Conventionally, a high voltage transistor in a complementary MO8 semiconductor device has been a transistor having the structure shown in FIG.

Complementary Δ408 allows two types of transistors, namely a p-channel transistor and an n-channel transistor, to coexist on the same semiconductor substrate, and the method for coexisting them is to form a well with impurities of the opposite conductivity type to the substrate. This separates both transistors. Therefore,
In the case of an N-type substrate, a p-type well is formed, a KN-channel transistor is formed above this well, and a p-channel transistor is formed on the N-type substrate. Conversely, in the case of a p-type substrate, an N-type well is formed, a p-channel transistor is formed on this well, and an N-channel transistor is formed on the p-type substrate.

First, the high breakdown voltage transistor in such a complementary type M08 will be explained with reference to FIG. In this explanation, the conductivity type of the substrate is N type.

In Figure 1, a semiconductor substrate of a certain conductivity type (here Nf
A well 2 (here, a p-type well) of a conductivity type opposite to that of the substrate is formed in the semiconductor substrate f1.

On this well (p6 well), when complementary fVIO8 is formed, i'L is formed, and an N-channel transistor is formed thereon.

Since the high breakdown voltage transistor section is explained here, the structure formed at the same time as the complementary type is shown in FIG. 2, and its explanation will be described later.

A high voltage transistor is characterized by using this p-well as a drain layer. Since this substrate and the opposite conductivity type well are composed of relatively low concentration impurities,
The resistance is relatively large. Then, a diffusion layer 3 and a source layer 4 of impurities of the same type as the well are formed so as to be included in this p-well. This diffusion layer is of the opposite conductivity type to the substrate, and the source and source of the transistor.
This constitutes the drain. There are two ways to form the source and drain: one is to form the source and drain before forming the gate electrode, and the other is to form the source/drain before forming the gate electrode.
As shown in the figure, there is a method of forming a gate electrode portion and then forming the gate electrode portion in a self-aligned manner depending on the electrode portion. Since this device is of the MOS type, the gate electrode and the substrate are separated by an insulating film. This insulation II! Gate Ii!
2 called membrane 5. Then, on this gate insulating film 5,
There is a gate electrode 6. This gate electrode is formed using a metal electrode (
For example, aluminum, etc.) are used, and the latter uses conductive polycrystalline silicon, a high melting point metal (for example, molybdenum, etc.), or a silicide (for example, molybdenum silicide, titanium silicide, etc.). Therefore, since the transistor does not exist independently, an insulating film 7, which is thicker than the gate insulating film 5, is grown on the substrate in order to separate the active elements. In FIG. 1, the insulating film 7 is formed by selective oxidation, and is buried inside the substrate.

In MO8 type semiconductor devices, the impurity concentration in the source/drain layer is usually increased in consideration of operating speed, so the source/drain has low resistance. Therefore, the source-drain junction breakdown voltage is about 25V, and it cannot be used with a power supply higher than this voltage. Therefore, since the complementary MO8 semiconductor 5-integrated device uses a well with a relatively thin concentration, this use was considered. Its structure is shown in FIG.

The junction breakdown voltage of a well with a relatively low concentration with respect to the substrate varies depending on the concentration, but it is 100 V or more. This pressure resistance is utilized.

The characteristic feature of this structure is that the well exists below the gate electrode across -1, and is isolated from the highly doped drain layer 3, which becomes the drain electrode, and is separated from the highly doped drain layer 3 by a certain distance. The layer should not cover the gate electrode.

The condition for having a high breakdown voltage is that the drain has a high breakdown voltage when the gate electrode and source electrode are at the same potential as the substrate. At this time, as the drain voltage increases (in the case of a p-well, it becomes a p-channel transistor, so it should not be a negative potential, and rising refers to an increase in absolute value), the boundary of the well (p-well) The depletion layer extends from the surface to both the substrate side and the inside of the p-well, and the electric field strength of (drain-substrate potential difference)/(distance of the depletion layer) is 6- If the p-well is high #J[, When the potential difference is the same, the voltage is large, so the breakdown voltage is lower.If the IA degree of the p-well is lowered, the electric field is smaller, so the breakdown voltage is higher.

The reason why the high a+i drain is separated from the gate electrode is to lower the resistance of the drain part and to connect the p-well and the electrode. This is because the drain is formed of a thin material.

As explained above, it is possible to obtain a breakdown voltage of 1.100 V or more using a high breakdown voltage transistor using a well with a low concentration. However, 17, this output transistor operates with a power supply of about 5V as other internal transistors, whereas a high voltage is applied, and the stress on the gate insulating film is large.

Therefore, it is desirable to impose a limit at a potential slightly higher than the operating voltage. Even though the junction breakdown voltage is high, the breakdown of the gate insulating film is low. High breakdown voltage is good for operation, and 91 is required to prevent high voltage from being applied in order to prevent damage.

FIG. 2 shows a diagram in which such a sieve breakdown voltage transistor and a complementary FIMO 8 are constructed on the same substrate.

Tr+ is a source/drain 22 of -i4''ili m in a substrate 20 of -conductivity type and a well 21 of an opposite conductivity layer.
23, and a gate insulating film 24. This transistor has a gate formed with a pole 25, and this well 21 is formed at the same time as the well 26 forming the drain r, ff It of the high voltage suppression transistor mentioned above. Tr is a normal transistor formed on a substrate, and its source-drain 31.32 has a conductivity ≦V opposite to that of the substrate, and has a gate insulating film 33.32. It has a gate electrode 34 and is a channel transistor of the same type as a high voltage transistor. Tr is the above-mentioned high-voltage transistor p, and the well 26 of the opposite conductivity type.
The gate electrode 30 on the gate insulating film 29 and the heavily doped drain 28 of opposite conductivity type are separated from each other. Note that 27 is a source of opposite conductivity type. As shown in Part B, high voltage transistors can be constructed on the same substrate.

Therefore, the present invention provides a protective device for a high voltage transistor using a well of a conductivity type opposite to that of the substrate in a complementary MO8''P conductor device. This is a device that allows the withstand voltage to be adjusted to any value below the junction withstand voltage determined by.

FIG. 3 shows a structural sectional view of a protection device according to an embodiment of the present invention.

A semiconductor substrate 11 of one conductivity type has a well 12 of a conductivity type opposite to that of the first substrate, similar to the well used in a curved high-voltage transistor, so that the well 12 is completely contained in the well,
There are diffusion layers 13 and 14.

° This diffusion layer 13 is of the same conductivity type as the well, serves as an electrode for connection to the shell, is connected to the output high voltage part, and has the same structure as the drain of the high voltage transistor. Next, the diffusion layer 14 is a characteristic of the present invention, and is of a conductivity type opposite to that of the well (same conductivity type as the substrate).
It is completely included in the well, extends inward from the boundary of the well, and is shorter than the distance between the diffusion layer 13 and the boundary of the well. In that case, the diffusion layer 14 only exists in a highly concentrated and electrically floating state.

There is a Jy plate 11K outside the well 12 and another diffusion N159-, which also exists at a certain distance from the boundary of the well 2 and has the same conductivity type as the substrate. Therefore, the diffusion layer 1
5 is connected to the board and has the same potential.

The concentration is higher than that of the substrate and similar to that of the diffusion layer 14.

In this structure, the diffusion layer 13 is connected to the well with the IZI conductivity type, and the diffusion layer 15 is at the same potential but has a difference in impurity concentration, and the diffusion layer 15 is connected to the substrate with the same conductivity type. Although the potential is different, there is a difference in impurity concentration between the well, the substrate, and the PN [combined diode].

The potential applied to the diffusion layer 13 becomes the potential of the well, and since the well has a relatively low concentration, the depletion layer extends toward the substrate side and inside the well, resulting in a high voltage. When the end of the depletion layer 9 comes into contact with a high-concentration region, the expansion of the depletion layer is inhibited at that part, and a region where the local W' boundary strength is large occurs, causing a break.
7, resulting in a voltage failure.

At this time, inhibition by the diffusion layer 14 of the opposite conductivity type is more effective than inhibition by the amount-reducing diffusion layer in the well. On the other hand, the spread of the depletion layer toward the substrate side is inhibited by the diffusion layers 10 to 15 (same conductivity type as the substrate), and the withstand voltage is limited to a value lower than that of the well alone.

The spread of the depletion layer into the well and the spread into the substrate are different! The distance 11 between the well edge and the diffusion layer 15 and the distance 1 between the well edge and the diffusion layer 14 differ depending on W.
It cannot be compared with 2 and must be changed. The withstand voltage can be determined by arbitrarily selecting and selecting it based on the understanding of its characteristics. Distance between well edge and diffusion layer 13!
, it also depends, but the most determinable is the hora. Since the concentration of the well is usually higher than the concentration of the substrate, the breakdown voltage can be uniquely determined by making it dependent on the distance between the well and the diffusion layer of the opposite conductivity type within the well. Therefore, let it be determined by it>7l-zs! ll! ! You can decide on a final decision.

As explained above, in the present invention, a well of a conductivity type opposite to that of the substrate is formed in one semiconductor substrate, and is included in this well and is spaced a certain distance inward from the end of the well.
The feature is that an impurity diffusion layer of the opposite conductivity type to the well is provided, the distance between the end of the well and the diffusion layer is arbitrarily selected, and the junction breakdown voltage between the well and the substrate is selected to protect a high breakdown voltage transistor. It is a semiconductor protection device.

In forming this device, a diffusion layer of the substrate conductivity type is formed using the method used to form a channel transistor of the opposite conductivity type to that of the substrate, and a diffusion layer of the substrate conductivity type is formed in the well using the method used to form a channel transistor of the opposite conductivity type to that of the well. By using the method described above and using the mask process and diffusion when forming the same type channel L transistor as an internal element, a device with a built-in high voltage transistor and an output protection device can be obtained as a complementary MO8 semiconductor device.

The diffusion layer explained above can be separated by 1) a method of separating in a mask process, 2) a field insulating film 1 shown in FIG.
3) a method of separating in a self-aligned manner using a gate, polycrystalline silicon, etc., and various methods can be adopted.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view of the structure of a conventionally used high-voltage transistor, and Figure 2 is a cross-sectional view of a complementary MO8 semiconductor device illustrating the construction of high-voltage transistors on the same substrate. It is a diagram. FIG. 3 is a structural sectional view showing the semiconductor protection device of the present invention. 1.11.20... Semiconductor substrate, 2,21°2
6...Substrate and opposite conductivity type well, 14, 15°2
2.23...Diffusion layer of the same conductivity type as the substrate, 5, 24
゜29.33...Gate insulating film, 3, 4, 13
゜31.32,27,2B...Substrate and opposite conductivity type diffusion layer, 6,25.30.34...Gate electrode, 7゜16...Field insulating film It is. 13-

Claims (1)

[Claims] In the complementary MO8''P conductor device, - in the semiconductor substrate,
A well of opposite conductivity type to the substrate is provided, included in the well and spaced a certain distance inwardly from an end of the well,
- A semiconductor protection device in which a conductive type impurity diffusion region exists in an electrically floating state, and a diode is configured between the well and the substrate.