JPS60214046A - 異常終了処理制御方式 - Google Patents
異常終了処理制御方式Info
- Publication number
- JPS60214046A JPS60214046A JP59070380A JP7038084A JPS60214046A JP S60214046 A JPS60214046 A JP S60214046A JP 59070380 A JP59070380 A JP 59070380A JP 7038084 A JP7038084 A JP 7038084A JP S60214046 A JPS60214046 A JP S60214046A
- Authority
- JP
- Japan
- Prior art keywords
- processing
- abnormal termination
- processing block
- control
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59070380A JPS60214046A (ja) | 1984-04-09 | 1984-04-09 | 異常終了処理制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59070380A JPS60214046A (ja) | 1984-04-09 | 1984-04-09 | 異常終了処理制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60214046A true JPS60214046A (ja) | 1985-10-26 |
| JPS6365978B2 JPS6365978B2 (enExample) | 1988-12-19 |
Family
ID=13429775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59070380A Granted JPS60214046A (ja) | 1984-04-09 | 1984-04-09 | 異常終了処理制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60214046A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6446107A (en) * | 1987-08-13 | 1989-02-20 | Niigata Engineering Co Ltd | Automatic machine tool |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7090509B1 (en) | 1999-06-11 | 2006-08-15 | Stratos International, Inc. | Multi-port pluggable transceiver (MPPT) with multiple LC duplex optical receptacles |
-
1984
- 1984-04-09 JP JP59070380A patent/JPS60214046A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6446107A (en) * | 1987-08-13 | 1989-02-20 | Niigata Engineering Co Ltd | Automatic machine tool |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6365978B2 (enExample) | 1988-12-19 |
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