JPS60213992A - Mos-ic - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an IC for driving an LCD, outputs for driving a FLII LCD, two or more power supply systems, and an internal level foot circuit.

[Prior art]

As a conventional example, a diagram of a Loll driving IC is shown in FIG. The LCIJ driving IC is as shown in Fig. 1.
A shift register for serial data transfer, a latch for storing data in the shift register, a control circuit for synthesizing the latched data and a signal 1111B'i, a level shift circuit for connecting power supply system 1 and power supply system 2 circuits, and an LCD. The LCIJ drive circuit that generates the drive output constitutes a circuit for one bit, and usually about 10 to 100 bits are grouped into one CK. If the circuit diagram in Figure 1 is made of cMos-xa on the 7zlJ board, the P- well will consist of a shift register, a latch, and one well as shown in Figure 2.
In this way, the conventional method requires one well for the control circuit, and one additional well is required for the control circuit.
Therefore, there is a problem in that the chip area of the entire IC becomes large. Further, this well usually has an elongated shape, which increases the resistance of the well, resulting in a problem of poor latch-up characteristics. FIG. 5 shows an example of the level shift circuit shown in FIG.
11c is connected to a signal that is the product of the signal FND and the signal LDn representing the contents of the latch, and the gate VC of the other P-type MOS transistor is connected to an inverted signal of the product. In FIG. 3, the signals 0UTn and 0UTn are logically as follows.

0UTn=BNB -LDn fl) OUTn=EINB・LIJn +21 [Purpose] The present invention solves these problems by combining a logic circuit and a level shift circuit that require more than two people into one, thereby reducing the number of wells. The purpose of this is to reduce the area of the IC.

〔overview〕

In the MOS-IC of the present invention, in the level shift circuit,
It is characterized by having a logical function that requires more than two people.

〔Example〕

FIG. 4 is a circuit example of an LCD driving IC according to the present invention. Compared to FIG. 1, there is no control circuit, and the level shift circuit has the functionality of the control circuit. Therefore, when the circuit shown in FIG. 4 is used, the well for the control circuit shown in FIG. 2 is eliminated. FIG. 5 shows a detailed example of one bit of the level 778 circuit in FIG. 4. Compared to the conventional level 778 circuit shown in FIG. 6, the level shift circuit shown in FIG.
Two MOS transistors are added, which create the function of the control circuit shown in FIG. A signal EN is applied to the gate of the serial P-type MO8) resistor in Fig. 5.
A signal EBB and a signal LUn are connected to the parallel P-type MO8) transistor. In FIG. 5, the signals 0UTn and 0UTn are logically as follows.

OUT n = E N B-L + n +3)
OUTn=ENB-LIJn (41 This logic is the same as the signal QUTn and signal 0UTn in FIG. 6, and by using the level shift circuit in FIG. 5, the control circuit in FIG. 1 becomes unnecessary.

6 is another example of the level shift circuit in FIG. 4, and the signals 0UTn and 0UTn are
It is the same as that in the figure.

〔effect〕

As described above, according to the present invention, the area of the IC can be reduced by making the wells slightly smaller, and the cost of the IC can be reduced.

Furthermore, CMO6-■o can improve latch-up characteristics and is also effective in improving reliability.

In addition, in the explanation of the present invention, the (g) side is used as the common electrode and the level shift (0)k is described as an example, but the level software on the ←) side may also be used as the eOIIllffi common electrode. ,
As a control circuit, two-man NAND? f is used but 2
Any logic circuit can be used as long as it requires more than human power.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional LCD driving IC.
are each manual input buffer, 2 is the output buffer, 6 is the two-manpower NANIJ, 4 is the inverter, signal CL is the shift register transfer lock, signal operator N is the manual data, signal LP is the latch clock, signal IJOUT is the output data, the output of each latch from signal LIJ1 to LDnFi, and the signal 0
The LCD drive output signal E'NB corresponding to each bit from 1 to Onf is a control signal. , Figure 2 shows an example of the shape of a well when the shift register, latch, and control circuit fcMOB-IC shown in Figure 1 is used. , Figure 3 shows an example of the level shift circuit in Figure 1. It is. Figure 4 is a circuit diagram of an LCD driving IC according to the present invention, and each signal is the same as that in Figure 1. Signal LD1 to signal L TJ n are '1l)1 of each latch.
˜1·Dn is the inverted output, and 5 is the inverted buffer of the signal ENB. FIG. 5 is an example of the level shift circuit shown in FIG. 4. FIG. 6 is another example of the level 778 circuit in FIG. Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Mogami OL 02 0n Figure 1 Figure 2 Figure 5 01 02 On Figure 4

Claims (1)

[Claims] In a MOS-IC containing two or more power supply systems, a level shift circuit to which any two power supply system circuits are connected is provided with a logic function that requires two or more human power.