JPS60209847A - Picture forming device - Google Patents

Picture forming device

Info

Publication number
JPS60209847A
JPS60209847A JP59066496A JP6649684A JPS60209847A JP S60209847 A JPS60209847 A JP S60209847A JP 59066496 A JP59066496 A JP 59066496A JP 6649684 A JP6649684 A JP 6649684A JP S60209847 A JPS60209847 A JP S60209847A
Authority
JP
Japan
Prior art keywords
runaway
date
cpu1
time
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59066496A
Other languages
Japanese (ja)
Inventor
Sokichi Funabashi
船橋 壮吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Konica Minolta Inc
Original Assignee
Konica Minolta Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konica Minolta Inc filed Critical Konica Minolta Inc
Priority to JP59066496A priority Critical patent/JPS60209847A/en
Publication of JPS60209847A publication Critical patent/JPS60209847A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Control Or Security For Electrophotography (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To grasp accurately the date, when program runaway occurs and to analyze easily causes of program runaway by providing a program runaway detecting circuit. CONSTITUTION:A CPU1 continues to transmit runaway detection clear pulses to a runaway detecting circuit 7 in the normal state. If this clear pulse signal is broken, runaway of the CPU1 is detected, and a reset signal is transmitted to the CPU1, and a runaway detection signal is outputted for a certain period. When the CPU1 is reset, an initial routine is executed; and if the runaway detection signal is outputted in this case, the date of this output is read out from a calendar IC5 and is written in a prescribed storage area of a non-volatile RAM6. Meanwhile, the runaway detecting circuit 7 clears the runaway detection signal when several detection clear pulses are inputted thereafter.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は画像形成装置に関し、特に、コンピュータに
より動作を制御する画像形成装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image forming apparatus, and particularly to an image forming apparatus whose operation is controlled by a computer.

(従来技術〕 一般に、電子写真記録装置等の画像形成装置においては
、その制御のプログラム動作を実行する中央制御装置で
あるCPUが、電源ラインノイズ、静電気ノイズ、電源
瞬断等の種々の原因によって暴走し、制御不能の危険な
状態になることがあった。
(Prior Art) In general, in an image forming apparatus such as an electrophotographic recording apparatus, the CPU, which is the central control unit that executes the control program operations, is affected by various causes such as power line noise, static electricity noise, and momentary power interruption. There were times when the vehicle spun out of control and became dangerously out of control.

そのために従来は中央制御装置であるCPUが暴走した
際には外部出力をオフしたり前記中央制御装置であるC
PUをリセットしたりして安全性を確保するようにした
ものがあった。
For this reason, in the past, when the central control unit CPU went out of control, the external output was turned off or the central control unit CPU
There were some that ensured safety by resetting the PU.

しかしながらこのような従来のものにあっては、事後に
暴走の原因である電源ラインノイズ、静電気ノイズ、電
源瞬断等を解明し、その原因を取り除いて暴走の再発を
未然に防止するための手がかりを得ることが困難で、多
くの場合、サービスマンが後日点検しても暴走の発生日
時を正確に知ることが出来ないために原因を解明するこ
とができず、適切な処理をとれないまま暴走の再発を招
いてしまうという欠点を有していた。
However, with such conventional methods, it is difficult to identify the cause of the runaway after the fact, such as power line noise, static electricity noise, momentary power interruption, etc., and to remove the cause and prevent the runaway from happening again. In many cases, even if a service person inspects the vehicle at a later date, they are unable to accurately determine the date and time when the runaway occurred, making it impossible to determine the cause and causing the vehicle to run out of control without being able to take appropriate measures. This method has the disadvantage of causing recurrence of the problem.

〔発明の目的〕[Purpose of the invention]

この発明は前記のような従来のもののもつ欠点を排除し
て、コンピュータのプログラム暴走の原因を解明する資
料として暴走の発生日時を正確に知ることのできる画像
形成装置を提供することを目的とする。
It is an object of the present invention to eliminate the drawbacks of the conventional ones as described above and to provide an image forming apparatus that can accurately determine the date and time of occurrence of a program runaway as data for elucidating the cause of a computer program runaway. .

〔発明の構成〕[Structure of the invention]

この発明は、コンピュータにより動作を制御する画像形
成装置において、前記コンピュータのプログラム暴走を
検出する手段と、前記暴走検出手段が検出したプログラ
ム暴走の発生日時を記憶する不揮発性メモリーとを具え
た構成を有している。
The present invention provides an image forming apparatus whose operation is controlled by a computer, including means for detecting program runaway in the computer, and a nonvolatile memory for storing the date and time of occurrence of the program runaway detected by the runaway detecting means. have.

〔発明の実施例〕[Embodiments of the invention]

以下、図面に示すこの発明の実施例について説明する。 Embodiments of the invention shown in the drawings will be described below.

第1図にはこの発明による画像形成装置の制御部が示さ
れており、lは中央処理装置であるCPU、2はROM
、3はRAM、4は入出力装置であるI10ボートIC
l3はバッテリーバックアップされたカレンダIC16
は不揮発性RAM、7は暴走検出回路、8はリセット回
路である。
FIG. 1 shows a control section of an image forming apparatus according to the present invention, where l is a central processing unit, ie, a CPU, and 2 is a ROM.
, 3 is RAM, 4 is I10 boat IC which is input/output device
l3 is a battery-backed calendar IC16
7 is a nonvolatile RAM, 7 is a runaway detection circuit, and 8 is a reset circuit.

前記CPUはコンピュータの中央処理装置であって、画
像形成装置の動作を制御するとともに、正常状態にある
ときは暴走検出クリアパルス(周期T以下のパルス)を
暴走検出回路7へ送り続けるようになっている。前記暴
走検出回路7は周期Tの時間中パルスが到来しないとき
暴走検出クリアパルス信号が途絶えたこと、すなわち、
前記CPUIが暴走したことを検出して、ただちにCP
UIヘリセット信号を送るとともに、リセット信号に続
いて暴走検出信号を一定時間出力するようになっている
The CPU is the central processing unit of the computer, and controls the operation of the image forming apparatus, and when in a normal state, continues to send runaway detection clear pulses (pulses with period T or less) to the runaway detection circuit 7. ing. The runaway detection circuit 7 detects that the runaway detection clear pulse signal is interrupted when no pulse arrives during the period T, that is,
Detects that the CPUI has gone out of control and immediately shuts down the CPU.
In addition to sending a UI reset signal, a runaway detection signal is output for a certain period of time following the reset signal.

そして、前記CPU、1は第2図のフローチャートに示
すように、電源スィッチのオンによるリセット、手動に
よるリセット、または暴走検出回路7によるリセットが
なされると、イニシアルルーチンを実行し、その際に暴
走検出信号があれば、その時点(その時現在)の日時を
前記カレンダlc5から読出して不揮発性RAM6の所
定の記憶エリアに書込み、また、暴走検出信号がなけれ
ば、前記カレンダIC5からの読出しおよび不揮発性R
AM6への書込みを行わないでコピー動作ルーチンを実
行するようになっている。
As shown in the flowchart of FIG. 2, when the CPU 1 is reset by turning on the power switch, manually reset, or reset by the runaway detection circuit 7, it executes an initial routine, and at that time, the runaway detection circuit 7 executes the initial routine. If there is a detection signal, the date and time at that point in time (current at that time) is read from the calendar lc5 and written into a predetermined storage area of the nonvolatile RAM 6, and if there is no runaway detection signal, the date and time at that time (current at that time) is read from the calendar IC5 and written into a predetermined storage area of the nonvolatile RAM 6. R
The copy operation routine is executed without writing to AM6.

前記不揮発性RAM6への書込みは、第3図に示すよう
に、8ビツトからなるメモリーを5ハイド使用し、たと
えば、1984年1月16日13時46分の場合には、
各バイトに西暦年の下2桁“84”、月“01”、日“
16′、時“13”、分“46”を順番に割り当てて、
それにより、1948年1月16日13時46分を書込
むようになっている。
As shown in FIG. 3, writing to the non-volatile RAM 6 uses 5 8-bit memories. For example, in the case of 13:46 on January 16, 1984,
Each byte contains the last two digits of the year “84”, the month “01”, and the day “
16', hour "13", minute "46" in order,
As a result, 13:46 on January 16, 1948 is written.

また、新しいデータを書込むときは、データが書込まれ
ていない番地で、かつ、その番地より前にはすでにデー
タが書込まれている番地を選んで書込むことによって、
前記CPUIの暴走日時をその発生順に書込むようにな
っている。
Also, when writing new data, select an address where no data has been written, and an address where data has already been written before that address.
The date and time of the CPUI runaway is written in the order in which it occurred.

次ぎに前記のものの作用について説明する。Next, the operation of the above will be explained.

まず、前記CPUIが動作中に暴走検出クリアパルス信
号が途絶えると、前記暴走検出回路7がこれを検出して
直ちに前記CPUIにリセット信号を送るとともに、暴
走検出信号を出力する。すると前記cpuiはリセット
信号によりイニシアルルーチンを実行し、しかも暴走検
出信号を検知するから、その時点の日時を前記カレンダ
IC5から読出して不揮発性RAM6に書込むことにな
る。
First, when the runaway detection clear pulse signal is interrupted while the CPUI is operating, the runaway detection circuit 7 detects this and immediately sends a reset signal to the CPUI and outputs a runaway detection signal. Then, the CPUI executes the initial routine in response to the reset signal and also detects the runaway detection signal, so it reads the date and time at that point from the calendar IC 5 and writes it into the nonvolatile RAM 6.

一方、前記暴走検出回路7は、その後検出クリアパルス
信号が数パルス入力されると、暴走検出信号をクリアす
る。
On the other hand, when the runaway detection circuit 7 receives several pulses of the detection clear pulse signal thereafter, it clears the runaway detection signal.

また、このようにして不揮発性RAM6に書込まれ、か
つ記憶された暴走発生日時のデータは、キーボード等の
入力手段によってモード設定されると不揮発性メモリー
から読出され、表示部に表示されるか、または外部記録
手段に記録されることとなり、しかも、このモード設定
は、暴走発生直後に限らず任意の時期に行うことができ
、したがって、表示部の表示または外部記録手段の記録
を見れば、それまでに発生した暴走の発生日時および頻
度を知ることができるものである。
Furthermore, the data on the date and time of runaway occurrence written and stored in the non-volatile RAM 6 in this way is read out from the non-volatile memory and displayed on the display section when the mode is set using an input means such as a keyboard. , or recorded in the external recording means.Moreover, this mode setting can be done at any time, not just immediately after the runaway occurs, so if you look at the display on the display or the record on the external recording means, It is possible to know the date, time and frequency of runaway incidents that have occurred up to that point.

なお、前記実施例に限定することなく、前記CP U、
1の暴走発生日時を書込むための不揮発性RAM6の記
憶エリアを、たとえば5回分、25バイトに限定し、新
しいデータが書込まれると記憶エリアがオーバフローす
る場合は最も古いデータを消すことによって、つねに新
しいデータを保存するようにしても良いことは勿論であ
る。
Note that, without being limited to the above embodiments, the CPU,
By limiting the storage area of the non-volatile RAM 6 for writing the date and time of runaway occurrence of 1 to 25 bytes for five times, for example, and erasing the oldest data if the storage area overflows when new data is written, Of course, it is also possible to always save new data.

〔発明の効果〕〔Effect of the invention〕

この発明は前記のように構成したことにより、コンピュ
ータのプログラム暴走の発生日時を自動的に記録するこ
とができ、そのために後日になっても暴走発生日時を正
確にしることができて、暴走の原因を解明する資料とし
て用いることができ、たとえば毎日決まった時間に暴走
が発生する場合には、その時刻に、同一電源ラインにつ
ながった消費電力の大きな機器が起動するため瞬時停電
の現象が起きて暴走が発生するのではないかと推定する
ことができ、したがって適切な措置を講じて暴走の再発
を未然に防止することが可能となるなどのすぐれた効果
を有するものである。
By configuring the invention as described above, it is possible to automatically record the date and time when a computer program runaway occurred, and therefore, even at a later date, the date and time when the runaway occurred can be accurately recorded. It can be used as data to clarify the cause. For example, if a runaway occurs at a fixed time every day, a momentary power outage may occur because equipment with large power consumption connected to the same power line starts up at that time. This has an excellent effect in that it is possible to estimate whether a runaway will occur, and therefore to take appropriate measures to prevent the runaway from happening again.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明による画像形成装置の制御部の一実施
例を示すブロック図、第2図は要部のフローチャート、
第3図は不揮発性−メモリーの説明図である。 1−・−CP U 2−−−−−−−ROM3−−−−
−− RA M 4−−−−1 / Oボート5−−−
−−一カレンダIC6−・−・不揮発性メモリー7−−
−−−−−暴走検出回路 8−−−−−−−リセット回
路第1図 第2図 了ドレス F700st乞 F2O3” F2O3q F2O3・ F2O3=− 第3図
FIG. 1 is a block diagram showing an embodiment of the control section of an image forming apparatus according to the present invention, FIG. 2 is a flowchart of the main part,
FIG. 3 is an explanatory diagram of non-volatile memory. 1-・-CP U 2---------ROM3----
--- RAM 4----1/O boat 5----
---Calendar IC6--Nonvolatile memory 7--
-------Runaway detection circuit 8---------Reset circuit Fig. 1 Fig. 2 Completed dress F700st F2O3'' F2O3q F2O3・F2O3=- Fig. 3

Claims (1)

【特許請求の範囲】 (11コンピュータにより動作を制御する画像形成装置
において、前記コンピュータのプログラム暴走を検出す
るプログラム暴走検出手段と、前記プログラム暴走検出
手段が検出したプログラム暴走の発生日時を記憶する不
揮発性記憶手段とを具えたことを特徴とする画像形成装
置。 (2)前記不揮発性記憶手段は、不揮発性メモリーであ
る特許請求の範囲第1項記載の画像形成装置。 (3) 前記不揮発性メモリーが記憶したプログラム暴
走の発生日時は必要に応じて検出される特許請求の範囲
第2項記載の画像形成装置。
Scope of Claims (11) An image forming apparatus whose operation is controlled by a computer, including a program runaway detecting means for detecting a program runaway in the computer, and a non-volatile memory device for storing the date and time of occurrence of the program runaway detected by the program runaway detecting means. (2) The image forming apparatus according to claim 1, wherein the nonvolatile storage means is a nonvolatile memory. (3) The image forming apparatus comprises a nonvolatile storage means. 3. The image forming apparatus according to claim 2, wherein the date and time of occurrence of program runaway stored in the memory is detected as necessary.
JP59066496A 1984-04-03 1984-04-03 Picture forming device Pending JPS60209847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59066496A JPS60209847A (en) 1984-04-03 1984-04-03 Picture forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59066496A JPS60209847A (en) 1984-04-03 1984-04-03 Picture forming device

Publications (1)

Publication Number Publication Date
JPS60209847A true JPS60209847A (en) 1985-10-22

Family

ID=13317475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59066496A Pending JPS60209847A (en) 1984-04-03 1984-04-03 Picture forming device

Country Status (1)

Country Link
JP (1) JPS60209847A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6490692B1 (en) 1993-12-27 2002-12-03 Minolta Co., Ltd. Image forming apparatus with improved monitoring system for operation of microprocessor controlling image forming operation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5614358A (en) * 1979-07-13 1981-02-12 Nec Corp Operation log storing system
JPS5697161A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Logging method for trace information
JPS57203150A (en) * 1981-06-10 1982-12-13 Fujitsu Ltd History recording system of logical device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5614358A (en) * 1979-07-13 1981-02-12 Nec Corp Operation log storing system
JPS5697161A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Logging method for trace information
JPS57203150A (en) * 1981-06-10 1982-12-13 Fujitsu Ltd History recording system of logical device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6490692B1 (en) 1993-12-27 2002-12-03 Minolta Co., Ltd. Image forming apparatus with improved monitoring system for operation of microprocessor controlling image forming operation

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