JPS60209848A - Picture forming device - Google Patents

Picture forming device

Info

Publication number
JPS60209848A
JPS60209848A JP59066497A JP6649784A JPS60209848A JP S60209848 A JPS60209848 A JP S60209848A JP 59066497 A JP59066497 A JP 59066497A JP 6649784 A JP6649784 A JP 6649784A JP S60209848 A JPS60209848 A JP S60209848A
Authority
JP
Japan
Prior art keywords
runaway
cpu1
runaway detection
clear
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59066497A
Other languages
Japanese (ja)
Inventor
Sokichi Funabashi
船橋　壮吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Konica Minolta Inc
Original Assignee
Konica Minolta Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konica Minolta Inc filed Critical Konica Minolta Inc
Priority to JP59066497A priority Critical patent/JPS60209848A/en
Publication of JPS60209848A publication Critical patent/JPS60209848A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Abstract

PURPOSE:To grasp accurately the operation mode at the time, when program runaway occurs, to clear up easily causes of program runaway by storing the operation mode then. CONSTITUTION:A CPU1 continues to transmit runaway detection clear pulses to a runaway detecting circuit 6 in the normal state. If this clear pulse signal is broken, runaway of the CPU1 is detected, and a reset signal is transmitted immediately to the CPU1, and a runaway detection signal is outputted for a certain period. When the CPU1 is reset, an initial routine is executed; and if the runaway detection signal is outputted then, the copy mode just before runaway is written in a storage area of a RAM5. Meanwhile, the runaway detecting circuit 6 clears the runaway detection signal when several runaway detection clear pulses are inputted thereafter.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は画像形成装置に関し、特に、コンピュータに
より動作を制御する画像形成装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image forming apparatus, and particularly to an image forming apparatus whose operation is controlled by a computer.

〔従来技術〕[Prior art]

一般に、電子写真記録装置等の画像形成装置においては
、その制御のプログラム動作を実行する中央制御装置で
あるＣＰＵが、電源ラインノイズ、静電気ノイズ、電源
瞬断等の種々の原因によって暴走し、制御不能の危険な
状態になることがあった。In general, in image forming apparatuses such as electrophotographic recording apparatuses, the CPU, which is the central control unit that executes the control program operations, may run out of control due to various causes such as power line noise, static electricity noise, and instantaneous power interruption. There were times when I was in a dangerous situation.

そのために従来は中央制御装置であるＣＰＵが暴走した
際には外部出力をオフしたり前記中央制御装置であるＣ
ＰＵをリセットしたりして安全性を確保するようにした
ものがあった。For this reason, in the past, when the central control unit CPU went out of control, the external output was turned off or the central control unit CPU
There were some that ensured safety by resetting the PU.

しかしながらこのような従来のものにあっては、事後に
暴走の原因である電源ラインノイズ、静電気ノイズ、電
源瞬断等を解明し、その原因を取り除いて暴走の再発を
未然に防止するための手がかりを得ることが困難で、多
くの場合、サービスマンが後日点検しても暴走発生時の
動作モードを正確に知ることができないために原因を解
明することができず、適切な処理をとれないまま暴走の
再発を招いてしまうという欠点を有していた。However, with such conventional methods, it is difficult to identify the cause of the runaway after the fact, such as power line noise, static electricity noise, momentary power interruption, etc., and to remove the cause and prevent the runaway from happening again. In many cases, even if service personnel inspect the vehicle at a later date, they are unable to accurately determine the operating mode when the runaway occurs, making it impossible to determine the cause and take appropriate action. This had the drawback of inviting a recurrence of the out-of-control behavior.

〔発明の目的〕[Purpose of the invention]

この発明は前記のような従来のもののもつ欠点を排除し
て、コンピュータのプログラム暴走の原因を解明する資
料として暴走発生時の動作モードを正確に知ることので
きる画像形成装置を提供することを目的とする。An object of the present invention is to eliminate the drawbacks of the conventional ones as described above, and to provide an image forming apparatus that can accurately determine the operating mode at the time of runaway as a material for elucidating the cause of computer program runaway. shall be.

〔発明の構成〕[Structure of the invention]

この発明は、コンピュータにより動作を制御する画像形
成装置において、前記コンピュータのプログラム暴走を
検出するプログラム暴走検出手段と、前記プログラム暴
走検出手段が検出したプログラム暴走発生時の動作モー
ドを記憶する不揮発性記憶手段とを具えた構成を有して
いる。The present invention provides an image forming apparatus whose operation is controlled by a computer, including program runaway detection means for detecting program runaway in the computer, and non-volatile memory for storing an operating mode at the time of program runaway detected by the program runaway detection means. It has a configuration comprising means.

〔発明の実施例〕[Embodiments of the invention]

以下、図面に示すこの発明の実施例について説明する。 Embodiments of the invention shown in the drawings will be described below.

第１図にはこの発明による画像形成装置の制御部が示さ
れており、１は中央処理装置であるＣＰＵ、２はＲＯＭ
、３はＲＡＭ、４は入出力装置であるＩ１０ボートＩＣ
ｌ３は不揮発性ＲＡＭ、６は暴走検出回路、７はリセッ
ト回路である。FIG. 1 shows a control unit of an image forming apparatus according to the present invention, in which 1 is a central processing unit, ie, a CPU, and 2 is a ROM.
, 3 is RAM, 4 is I10 boat IC which is input/output device
13 is a nonvolatile RAM, 6 is a runaway detection circuit, and 7 is a reset circuit.

前記ＣＰＵはコンピュータの中央処理装置であって、画
像形成装置の動作を制御するとともに、コピー動作中ま
たはアイドリング中にコピーモード（高圧出力、給紙、
ＡＤＦ動作、ソータ動作中等）の変化があったとき、新
たなコピーモードを不揮発性ＲＡＭ５の所定の記憶エリ
アに書込み、また、正常状態にあるときは暴走検出クリ
アパルス（周期Ｔ以下のパルス）を暴走検出回路６へ送
り続けるようになっている。The CPU is the central processing unit of the computer, and controls the operation of the image forming apparatus, and also controls the copy mode (high voltage output, paper feeding,
When there is a change in the ADF operation, sorter operation, etc., a new copy mode is written to a predetermined storage area of the non-volatile RAM 5, and when the condition is normal, a runaway detection clear pulse (pulse with period T or less) is sent. It continues to be sent to the runaway detection circuit 6.

前記暴走検出回路６は周期Ｔの時間中パルスが到来しな
いとき暴走検出クリアパルス信号が途絶えたこと、すな
わち、前記ＣＰＵＩが暴走したことを検出して、ただち
にＣＰＵＩヘリセット信号を送るとともに、リセ・ノド
信号に続いて暴走検出信号を一定時間出力するようにな
っている。The runaway detection circuit 6 detects that the runaway detection clear pulse signal has been discontinued when no pulse arrives during the period T, that is, that the CPU has runaway, and immediately sends a CPU reset signal and resets the CPU. Following the throat signal, a runaway detection signal is output for a certain period of time.

そして、前記ＣＰＵＩは第２図のフローチャートに示す
ように、電源スィッチのオンによるリセット、手動によ
るリセット、または暴走検出回路６によるリセットがな
されると、イニシアルルーチンを実行し、その際に暴走
検出信号があれば、暴走する直前におけるコピーモード
を不揮発性ＲＡＭ５の暴走記憶用エリアに書込み、また
暴走検出信号がなければ、不揮発性ＲＡＭ５からのコピ
ーモードの読出しおよび暴走記憶用エリアへの書込みを
行わないでコピー動作ルーチンを実行するようになって
いる。Then, as shown in the flowchart of FIG. 2, when the CPU is reset by turning on the power switch, manually reset, or reset by the runaway detection circuit 6, the CPU executes an initial routine, and at that time, the runaway detection signal is output. If there is, the copy mode immediately before the runaway is written to the runaway storage area of the nonvolatile RAM 5, and if there is no runaway detection signal, the copy mode is not read from the nonvolatile RAM 5 and written to the runaway storage area. The copy operation routine is executed with .

前記不揮発性ＲＡＭ６の暴走記憶用エリアへの書込みは
、第３図に示すように、８ビツトからなるメモリーを暴
走１件当たり１バイト使用して、書込むようになってい
る。As shown in FIG. 3, writing to the runaway storage area of the nonvolatile RAM 6 is performed by using 1 byte of 8-bit memory for each runaway event.

また、新しいデータを書込むときは、データが書込まれ
ていない番地で、かつ、その番地より前にはすでにデー
タが書込まれている番地を選んで書込むことによって、
前記ＣＰＵ１の暴走発生時のコピー動作モードを時系列
的に書込むようになっている。Also, when writing new data, select an address where no data has been written, and an address where data has already been written before that address.
The copy operation mode when the runaway of the CPU 1 occurs is written in chronological order.

次ぎに前記のものの作用について説明する。Next, the operation of the above will be explained.

まず、前記ＣＰＵＩが動作中に暴走検出クリアパルス信
号が途絶えると、前記暴走検出回路７がこれを検出して
直ちに前記ＣＰＵＩにリセット信号を送るとともに、暴
走検出信号を出力する。すると前記ＣＰＵＩはリセット
信号によりイニシアルルーチンを実行し、しかも暴走検
出信号を検知するから、暴走直前のコピー動作モードを
不揮発性メモリー５の暴走記憶用エリアに書込むことと
なる。First, when the runaway detection clear pulse signal is interrupted while the CPUI is operating, the runaway detection circuit 7 detects this and immediately sends a reset signal to the CPUI and outputs a runaway detection signal. The CPU then executes the initial routine in response to the reset signal and also detects the runaway detection signal, so the copy operation mode immediately before the runaway is written in the runaway storage area of the nonvolatile memory 5.

一方、前記暴走検出回路６は、その後検出クリアパルス
信号が数パルス入力されると、暴走検出信号をクリアす
る。On the other hand, when the runaway detection circuit 6 receives several pulses of the detection clear pulse signal thereafter, it clears the runaway detection signal.

また、このようにして不揮発性ＲＡＭ５に書込まれ、か
つ、記憶された暴走発生時のコピー動作モードは、キー
ボード等の入力手段によってモード設定されると不揮発
性メモリー５から読出され、表示部に表示されるか、ま
たは外部記録手段に記録されることとなり、しかも、こ
のモード設定は、暴走発生直後に限らず任意の時期に行
うことができ、したがって、表示部の表示または外部記
録手段の記録を見れば、それまでに発生した暴走発生時
のコピー動作モードを知ることができるものである。Further, the copy operation mode at the time of runaway occurrence written and stored in the non-volatile RAM 5 in this way is read out from the non-volatile memory 5 and displayed on the display section when the mode is set by input means such as a keyboard. Moreover, this mode setting can be performed at any time, not just immediately after the runaway occurs, so that the display on the display or the recording on the external recording means can be set. By looking at , you can know the copy operation mode at the time of runaway occurrence that has occurred up to that point.

なお、前記実施例に限定することな（、前記ＣＰＵＩの
暴走発生時のコピー動作モードを書込むための不揮発性
ＲＡＭ５の記憶エアリを、たとえば、１０回分、１０バ
イトに限定し、新しいデータが書込まれる記憶エリアが
オーバーフローする場合にはデータの番地を全部繰り上
げてつねに新しいデータを保存するようにしても良いこ
とは勿論である。Note that the present invention is not limited to the above embodiment (for example, the storage area of the non-volatile RAM 5 for writing the copy operation mode when the CPUI runs out is limited to 10 bytes for 10 times, and new data is written). Of course, if the storage area in which the data is stored overflows, all data addresses may be incremented to always store new data.

〔発明の効果〕〔Effect of the invention〕

この発明は前記のように構成したことにより、プログラ
ム暴走発生時のコピー動作モードを自動的に記録するこ
とができ、そのために後日になっでも暴走発生時のコピ
ー動作モードを正確に知ることができて、暴走の原因を
解明する資料として用いることができ、たとえば、高電
圧通電中に暴走が発生した場合には落雷が原因で、また
、給紙中１．ＡＤＦ動作中、ソータ動作中に暴走が発生
した場合にはそれぞれの個所での静電気ノイズが原因で
暴走が発生したのではないかと推定することができ、し
たがって適切な措置を講じて暴走の再発を未然に防止す
ることが可能となるなどのすぐれた効果を有するもので
ある。By configuring the present invention as described above, it is possible to automatically record the copy operation mode when a program runaway occurs, and therefore it is possible to accurately know the copy operation mode when a program runaway occurs even at a later date. This can be used as data to clarify the cause of runaway. For example, if runaway occurs while high voltage is being applied, it may be caused by a lightning strike, or 1. If a runaway occurs during ADF operation or sorter operation, it can be assumed that the runaway occurred due to static electricity noise at each location, so appropriate measures can be taken to prevent the runaway from occurring again. This has excellent effects such as making it possible to prevent accidents from occurring.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明による画像形成装置の制御部の一実施
例を示すブロック図、第２図は要部のフローチャート、
第３図は不揮発性メモリーの暴走記憶用エリアの説明図
である。 １−−−−−−−　ＣＰ　Ｕ２−−−−−−　ＲＯＭ３
−・・−−−−ＲＡ　Ｍ　４−−−−−−１　／　Ｏポ
ート５−−−−−−一不揮発性メモリ− ６−−−−−一暴走検出回路　７−−−−−−−リセソ
ト回路特許出願人　小西六写真工業株式会社 第１図 第２図 第３図FIG. 1 is a block diagram showing an embodiment of the control section of an image forming apparatus according to the present invention, FIG. 2 is a flowchart of the main part,
FIG. 3 is an explanatory diagram of the runaway storage area of the nonvolatile memory. 1-------- CPU U2----- ROM3
----RAM 4---------1/O port 5--Nonvolatile memory 6------Runaway detection circuit 7--------- Recessoto circuit patent applicant Konishiroku Photo Industry Co., Ltd. Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】 ＋１１　コンピュータにより動作を制御する画像形成装
置において、前記コンピュータのプログラム暴走を検出
するプログラム暴走検出手段と、前記プログラム暴走検
出手段が検出したプログラム暴走発生時の動作モードを
記憶する不揮発性記憶手段とを具えたことを特徴とする
画像形成装置。 （２）前記不揮発性記憶手段は、不揮発性メモリーであ
る特許請求の範囲第１項記載の画像形成装置。 （３）前記不揮発性メモリーが記憶したプログラム暴走
発生時の動作モードは必要に応じて検出される特許請求
の範囲第２項記載の画像形成装置。[Scope of Claims] +11 In an image forming apparatus whose operation is controlled by a computer, a program runaway detection means for detecting program runaway of the computer, and an operation mode at the time of program runaway detected by the program runaway detection means are stored. An image forming apparatus comprising a non-volatile storage means. (2) The image forming apparatus according to claim 1, wherein the nonvolatile storage means is a nonvolatile memory. (3) The image forming apparatus according to claim 2, wherein the operating mode at the time of program runaway stored in the nonvolatile memory is detected as necessary.
JP59066497A 1984-04-03 1984-04-03 Picture forming device Pending JPS60209848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59066497A JPS60209848A (en) 1984-04-03 1984-04-03 Picture forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59066497A JPS60209848A (en) 1984-04-03 1984-04-03 Picture forming device

Publications (1)

Publication Number Publication Date
JPS60209848A true JPS60209848A (en) 1985-10-22

Family

ID=13317506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59066497A Pending JPS60209848A (en) 1984-04-03 1984-04-03 Picture forming device

Country Status (1)

Country Link
JP (1) JPS60209848A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114999A (en) * 1987-10-29 1989-05-08 Mitsubishi Electric Corp Abnormality detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114999A (en) * 1987-10-29 1989-05-08 Mitsubishi Electric Corp Abnormality detector

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