JPS60209837A - Microprogram controller - Google Patents

Abstract

PURPOSE:To make branching high-speed while providing the universal utility by determining branch conditions in accordance with values of a branch condition register, where required branch conditions are stored, and a memory where required information are stored. CONSTITUTION:In case that microprogram MP instructions in two continuous addresses which are read out from an MP memory 1 are selected by a selector 3, all constituting elements which are used to determine individual branch conditions required for execution of an MP are stored in a branch condition register 4, and the number of all branch conditions required for execution of the MP is held in a memory 5 as a word number (m), and individual words are allowed to correspond to individual branch conditions. Branch conditions required for execution of the MP are decided in accordance with the value of one word in the memory 5 and the value of contents of the register 4 by branch condition deciding means 6, and obtained branch conditions are fed to the selector 3.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a microprogram control device in a data processing device, and more particularly to a method for determining branch conditions of a microprogram.

(Prior Art) A branch condition of a microprogram in a conventional microprogram control device is stored in a branch condition register in which each piece of information necessary for determining the branch condition, that is, each component of the branch condition, is stored. , K, and other registers to make a final determination.

Therefore, although the above-mentioned method has versatility, it has the drawback that it takes 1T time each time one bit of each component is determined, resulting in poor b1 performance. In addition, when trying to improve performance in the conventional technology, it is necessary to change the components of the branch condition to one
Instead of making a decision bit by bit, a method was adopted in which the logic for making a decision on a branch condition was configured in hardware from all the constituent elements of each branch condition, and then making a decision on a branch condition.

In the case of the above method, determining the branch condition requires only IT time.
As mentioned above, we tried to improve the performance, but since the above logic was configured with hardware, it was not easy to change it.
It had the disadvantage of lack of versatility.

(Objective of the Invention) An object of the present invention is to provide a branch condition register for storing all components of each branch condition necessary for execution of a microprogram, and a branch condition register necessary for determining each branch condition in each word. The above-mentioned drawbacks can be solved by providing a memory for storing expected values of information, and a means for determining a branch condition based on the values of the branch condition register and the contents of the memory. An object of the present invention is to provide a microprogram control device configured to be capable of speeding up branching of a microprogram while having the following features.

(Structure of the Invention) A microprogram control device according to the present invention includes a microprogram memory, an address register, a selector,
It comprises a branch condition register, a memory, and a branch condition determination means, and the branch condition determines a microprogram instruction consisting of a first plurality of consecutive words read from the My/Robot program memory at an address indicated by the address register. The configuration is such that the selection is made based on the branching condition determined by the determining means.

The microprogram memory is capable of storing microinstructions and allowing the first plurality of words to be read in parallel.

The address register is for indicating the address of the microprogram memory.

The selector is for selecting, by a branch condition, a microprogram instruction consisting of a first plurality of consecutive words read from the microprogram memory at an address indicated by the address register.

The branch condition register is for storing in bits all the components of each branch condition necessary to execute a microprogram established by a microprogram instruction, and has a second plurality of bit widths. It is something.

The memory has a bit width that is twice the bit width of the branch condition register, and both the upper second plurality of bits and the lower second plurality of bits have the same bit correspondence as the contents of the branch condition register. and has the types of all branch conditions necessary to execute the microprogram as a third number of words. In the upper second plurality of bits, for each bit composing the word corresponding to the branch condition, a valid bit indicating whether or not the bit is necessary for determining the branch condition is stored as information. However, the second plurality of lower bits are used to store expected values that can be branch conditions corresponding to each effective bit position of each word.

The branch condition determining means is for determining a necessary branch condition in accordance with the contents of the branch condition register and memory.

(Example) Next, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a microprogram control device according to the present invention, and is a diagram showing a case where a microprogram branches to two two-way branches.

In FIG. 1, l is a microprogram memory that can read two words in parallel, 2 is an address register that indicates the address of the microprogram memory l, and 3
is a two-way selector for selecting microprogram instructions at two consecutive addresses read from the microprogram memory 1 according to a branch condition.

Reference numeral 4 denotes a branch condition register consisting of a set of registers for storing in bit units all the constituent elements necessary for determining each branch condition necessary for executing the microprogram.

In this embodiment, the above-mentioned component is 4 bits, and the combination of these 4 bits can determine the branch conditions for all the children necessary to execute the microprogram. Reference numeral 5 denotes a memory having a bit width of 8 bits, which is twice that of the branch condition register 4, and having the number of words m, which is the total number of branch conditions necessary to execute the microprogram. It corresponds to the branch condition. The upper 4 bits and lower 4 bits of each word correspond to each pit position in the branch condition register 4, and store the information necessary to judge the branch condition in the upper 4 bits of the branch condition register 4. 1 is stored in the pit position where it is, and 0 is stored in the pit position where it is not. On the other hand, a value obtained by inverting the expected value of a specific branch condition is stored in the bit position necessary for determining the lower 4 bits of the branch condition. 6 corresponds to the value of one word of the memory 5 for storing information necessary for determining the branch condition and the value of the contents of the branch condition register 4, and is necessary for executing the microprogram. This is a means for determining the branch condition that has become .

In the above configuration, microprogram instructions are read from two consecutive addresses 000A and 000B in microprogram memory l, and the microprogram instructions are read from address 0.
Choose whether to branch to OOA or address 000B.
The branch condition when selecting by selector 2 is X (DO
N"l"0ARE). When branch condition X is satisfied, control is assumed to branch to address 000, and when branch condition X is not satisfied, control is assumed to be branched to address oooB.

In the memory 5, the expected value of information necessary for determining the branch condition X is stored in advance in word A, and the address of the memory 5 is shown as part of the microinstruction word b.

In FIG. 1, the upper four bits of word A in memory 5 are 0101, which indicates that the values of bits 1 and 3 of register 4 are the information necessary to determine branch condition X. It is shown. On the other hand, the lower 4 bits are XlX0. This indicates that the branch condition is satisfied when the value of the bit 1 in the branch condition register 4 is 0 and the value of the bit 3 is 1, and that the branch condition is not satisfied otherwise. At this time, the value of the contents of register 4 is 1001
This value and the value of the lower 4 bits of word A in the memory 5 are compared bit by bit by the branch condition determining means 6, and the value of the upper 4 bits is set for the bits that are not necessary for determining the branch condition. By masking by , and ANDing the logical values of all the resulting bits, it is determined whether the branch condition X is satisfied or not.

In the case of this embodiment, the result is 1, branch condition X is satisfied, and control branches to address 0OOA. Although the present invention has been described above with reference to the embodiments, versatility can be improved by providing the expected value of information necessary for determining a branch condition inside a memory configured to be easily written. However, by configuring all the constituent elements of a branch condition as a set of registers, branch conditions can be judged in ITO time, realizing faster branching of microprograms.

(Effects of the Invention) As explained above, the present invention provides a branch condition register for storing all components of each branch condition necessary to execute a microprogram, and a branch condition register necessary for determining each branch condition. The branch condition is determined according to the values of the branch condition register and the memory, and the branch condition is determined in accordance with the values of the branch condition register and the memory. It has the effect of being able to measure the change in

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a microprogram control device according to the present invention. l...Micro program memory 2.4...Register 3...Selector 5...Memory 6...Branch condition determination means Patent applicant Hisashi Inoro, agent for NEC Corporation Patent attorney

Claims (1)

[Claims] a microprogram memory capable of storing microinstructions and capable of reading a first plurality of words in parallel; an address register for indicating an address of said microprogram memory; and an address register indicated by said address register. a selector for selecting, according to a branch condition, a microprogram instruction consisting of the first plurality of consecutive words read from the microprogram memory according to an address; and a selector necessary for executing a microprogram formed by the microprogram instruction. a second plurality of bit-width branch condition registers for storing in bits all components of each branch condition;
Bits having a bit width twice as large as the bit width of the branch condition register, and a second plurality of upper bits and a second plurality of lower bits of the bit width are both similar to the contents of the branch condition register. A third plurality of words corresponds to the types of all branch conditions necessary to execute the microprogram, and the number of words for the branch conditions is stored in the upper second plurality of bits. For each bit constituting the corresponding word, a valid bit indicating whether or not the bit is necessary for determining the branch condition is stored as information, and further stored in the second plurality of lower bits. a memory for storing an expected value of a value that can be the branch condition corresponding to each effective bit position of each word;
branch condition determining means for determining a necessary branch condition in accordance with the values of the contents of the branch condition register and the memory; A microprogram control device characterized in that said first plurality of consecutive words of microprogram instructions are selected according to a branch condition determined by a branch condition determination means.