JPS6020765B2 - logical device - Google Patents

Description

[Detailed description of the invention] TECHNICAL FIELD The present invention relates to a logic device with diagnostic functionality.

Recently, methods using a diagnostic control processing device (hereinafter referred to as a diagnostic device) have been generally explored as a diagnostic method for particularly large-scale logical devices in order to provide flexibility in diagnosis.

Various methods have been proposed for the diagnosis function of logic devices, but the key issue is how to access the memory elements in the logic device during diagnosis.

According to Japanese Patent Application Laid-Open No. 48-74145, a shift path is provided for data setting and observation of flip-flops, and a group of flip-flops that simultaneously set parallel data during diagnosis is operated as a shift register. It becomes possible to set and observe flip-flop data. Below, the 1974-74145 will be explained in more detail. FIG. 1 is a block diagram of one example.

In the figure, a logic device 1 is diagnosed by a diagnostic device 2 via a diagnostic connection line 4 and a diagnostic control unit 11. The storage device 3 of the logical device 2 stores diagnostic programs and diagnostic data. The portion of the logic device 1 that executes instructions in the normal state includes logic packages 12, . . .
27, and several logic elements are mounted on this logic package.

The logic package 17 is equipped with an arithmetic register 32 that becomes visible according to a program and a register 33 that holds the extracted data, and supplies the arithmetic data to an arithmetic circuit (not shown) through a signal line 37. The logic package 13 is equipped with a register 31 that receives data on a signal line 36 that is a calculation result and holds it as write data to the calculation register 32, and a register 30 that specifies one of several calculation registers. A register number field in the instruction code is set in the register 30 via a signal line 34. FIG. 2 shows the diagnostic control section and its interface portion of a logic device to which Tokukan Sho 48-74145 is applied. Logic packages are interconnected by a cable that connects a multilayer printed board called a backboard and the backboard.

One of the areas surrounded by thick lines in FIG. 2 indicates one backboard, and the shaded area 12 therein indicates one package. If the package position within the backboard is called a column position, package mounting position information can be displayed using the backboard position and column position. A register 111 in the diagnostic control unit 11 is a diagnostic shift register that stores setting/observation data for the flip-flops of each package, and is used to write and set observation data from the diagnostic device via the diagnostic connection line 4. Data is proposed. The package for data setting and observation is specified by setting the backboard position and column position from the diagnostic bag pupil to the resistor 112 via the diagnostic connection line 4.

The backboard position designation is decoded by the decoding circuit 113 and output to signal lines 121, . . . , 124.
The column position designation is postcoded by the decoding circuit 114 and output to signal lines 125, . . . , 128. By setting the value of the signal line 117 to '11, the decoding circuit 1
13, 114 are suppressed and the signal lines 121,...
128 is set to ``1'' at the same time to select all packages and enable data settings for all packages at the same time. Figure 3 shows logic package 13 applying Tokukan Sho 48-74145.
It has 17 configurations.

Flip-flops 301, 302, 303 and register 3
0, flip-flops 311,...,314, resistor 31, flip-flops 331,...,334
A cross register 33 is configured. The value of the flip-flop 300 is set depending on the type of instruction code or the case.

If it is '01', it instructs to read the arithmetic register, and if it is '1', it instructs to write to the arithmetic register. Arithmetic register 3
2 is composed of a scratch pad memo IJ element.

Flip-flop 300 mounted on package 13,
...,303,311,. . . . , 314 performs normal logic operation using the clock signal line 132 with the signal lines 34, 35, and 36 as inputs. Diagnostic clock signal 1
33 is valid when both input terminals 134 and 135 are '1', and the flip-flops 300, . . . , 303, 311, .
. . , 314 are operated as shift registers. When operating as a shift register, diagnostic data is input through the input terminal 131 and output is through the output terminal 36. The flip-flop of package 17 is also of the same type; signal 172 is a normal clock, signal 173 is a diagnostic clock, signals 174 and 175 are package selection signals, and input as a shift register, that is, input of diagnostic data, is through terminal 171. , output of diagnostic data as a shift register is performed via a terminal 176.

Terminals 131 and 171 in FIG. 3 are connected to signal line 115 in FIG. 2, and terminals 136 and 176 are connected to signal line 116 and terminal 1
34 is the signal line 124, the terminal 135 is the signal line 126,
The terminal 174 is the signal line 123 and the terminal 175 is the signal line 126.
Connect with.

When setting and observing data on the flip-flop of package 13, if package mounting information is set in register 112 through diagnostic device 2 or diagnostic connection line 4, signals 124 and 126 for selecting package 13 are output by decoding circuits 113 and 114. 1' becomes AND gate 137,
138 is opened, and a shift register having terminal 131 as an input and terminal 136 as an output becomes effective according to instructions from the clock signal 133.

Since the number of flip-flops in the package 13 is now 8, if the clock signal line 133 is advanced by 8 steps, the output terminal 13
6 to flip-flop 300,...,303,311
,...,314 has a value of 314,...,311,303,
...They are taken out in the order of 300. Conversely, the value from the terminal 131 is the flip-flop 314,... 311,30
３．・・・・・・． They are set in the order of 300. terminal 13
The diagnostic shift register 1 is synchronized with the clock signal of 3.
By operating 11 as a shift register with signal 116 as input and signal 115 as output, flip-flops 300, . . . , 303, 311, . . . , 31
A value of 4 can be stored in register 111. Conversely, the value of the register 111 can be set in a flip-flop. Data observation is performed by outputting the value of the register 11 to the storage device 3 of the diagnostic device through the diagnostic connection line 4, and data setting is performed by setting the value of the register 111. However, the above method can be used to set and observe data for memory elements such as scratchpad memory IJ elements, which cannot be configured into shift registers, for example, where it is difficult to provide a shift data path connecting each memory element because of a high-density integrated circuit. Needless to say, this is impossible.

In this case, it is necessary to collect the operation results using one step of the normal clock.

The following will explain data setting and observation of the scratchpad memory 32 shown in FIG. 3 as an example.

When observing the scratch pad memo IJ element, specify 0' to the flip-flop 300 and set the address to issue to the flip-flops 301, 302, and 303 using the flip-flop data setting method. The contents of the device are read out but not exposed to the observable flip-flop.

When the normal clock signal 172 of the package 17 is applied for one step, the output of the scratch pad memo IJ element is output to the flip-flops 331, . I.J.
Devices can be observed. In the case of data setting of the scratch pad memo IJ element, flip-flop 30 is connected to 11' which specifies writing, and flip-flop 301, 302 is set.
, 303 contain the address of the scratchpad memory element to be written, and the flip-flops 311, . . .
, 314, write data is set by the flip-flop data setting method described above, and writing is performed when the normal clock signal 172 of the package 17 is applied for one step. However, when a normal clock is applied to read or write the scratchpad memo IJ, the state of the entire device changes.

In order to maintain the state of the device in the state before accessing the scratch pad memory IJ element, the values of the flip-flops of all logic packages are temporarily saved in the memory 3 of the diagnostic device using the data observation method, and then After reading and setting write designation flip-flops other than flip-flop 300 using the data setting method so that writing to the scratch pad memo IJ element is not performed, the scratch pad memo IJ element is accessed by the above operation, Thereafter, the values of the flip-flops of all the logic packages can be recovered from the memory 3 of the diagnostic device using the data setting method.

However, since the amount of data that must be saved and restored is extremely large, the memory 3 of the diagnostic device must have a large capacity, and there is a drawback that saving and restoring requires a long execution time.

SUMMARY OF THE INVENTION An object of the present invention is to provide a device for efficiently performing diagnosis by reducing the capacity of a storage device that a diagnostic device must have and by shortening the transfer time between a package under test and the diagnostic device. It is in.

The present invention includes a logic circuit that operates only when a clock is supplied, a diagnostic data provider that supplies diagnostic data to at least the logic circuit that performs diagnosis among the logic circuits, and a logic circuit that performs the diagnosis. an instruction means for instructing;
and clock supply means for supplying a clock for processing the diagnostic data only to the logic circuits instructed by the instruction means.

Next, one embodiment of the present invention will be described using the drawings.

A logic device according to an embodiment of the present invention is configured to be diagnosed by a diagnostic device, and is shown in FIG. Its operation is similar to that described previously. FIG. 2 shows a block diagram of the diagnostic control unit and the connection state with the part to be diagnosed. Its operation is almost the same as the above explanation, but the signal line 117 has a logic value of '01. In addition to setting data for all logic packages at the same time, at the time of diagnosis, by setting the value to '1', a specific package from all the logic packages is selected and the selected logic package is caused to operate.

FIG. 4 shows an embodiment of a logic package to which the present invention is applied, and logic packages 28 and 29 correspond to logic packages 13 and 17 in FIG.

Flip-flops 801, 802, 803 and register 3
0, flip-flops 811,...,814, register 31, flip-flops 831,...,8
34 constitutes a resistor 33. flipflop 80
The value of 0 is set depending on the type of instruction code or the case. If it is '0', it specifies that the arithmetic register 32 consisting of the scratchpad memo IJ element be set;
In the case of 11, writing to the calculation register 32 is instructed.
-Flip Flop 800
, . . . , 803, 811, .
6 is used as a data input line to perform normal logic operations.

At the time of diagnosis, when the selection signal lines 284 and 285 are both ``1'', the diagnostic clock operates as a shift register by inputting through the terminal 283, inputting through the terminal 281, and outputting through the terminal 286. Package 29 flippuff.

The same is true for the terminals; the normal clock is supplied through the terminal 292, the diagnostic clock is supplied through the terminal 293, the package selection signal is supplied through the signal lines 294 and 295, and the terminal 291 is supplied as the input of the shift register during diagnosis. Then, the terminal 296 becomes valid as the output of the shift register during diagnosis. The terminals 281 and 291 in FIG. 4 are the signal lines 115 in FIG.
is connected to terminals 286 and 296 for inputting diagnostic data.
is connected to the signal line 116 to output diagnostic data,
The terminal 284 is connected to the signal line 124, and the terminal 285 is connected to the signal line 12.
6, the terminal 294 is connected to the signal line 123, and the terminal 295 is connected to the signal line 126. The data setting/observation procedure for the flip-flops in packages 28 and 29 is the same as the data setting/observation procedure for the flip-flop in package 13 in FIG. 3 described above. When observing the data in the scratchpad memo 1, that is, the arithmetic register 32, the flip-flop 80 is set to 0 to designate readout, the flip-flops 801, 802, and 803 are set to the address of the memory to be observed, and the data in the flip-flop is set to 0. Set according to the setting method. When the package mounting information of the logic package 29 is set in the register 112 from the diagnostic device 2 through the diagnostic connection line 4, the information is decoded and the terminals 294 and 295 are both set to 11' via the selected signal lines 123 and 126. The normal clock of clock signal 292 becomes valid. Normally, when one step of the clock is applied from the signal line 292, the arithmetic register 3, which is a scratch pad memory,
2 outputs are flip-flops 831,...,834
Therefore, according to the flip-flop data observation method, the flip-flops 831, . . . , 8
By observing the value of 34, it becomes possible to observe the scratch pad memo IJ element. The parts where data was set for the scratch pad memo IJ element observation are the write designation flip-flop 800 of the package 28 and the flip-flops 801, 802, and 803 of the address register, and the parts changed by advancing the normal clock are the parts of the package 28.
9 flip-flop. These packages 28,
By simply saving and restoring the values of the flip-flops No. 29, the state before the scratch pad memory element was observed can be maintained.

When setting data for the scratch pad memo IJ element 32, the flip-flops for setting the data are the write designation flip-flop 800, the flip-flops 801, 802, 803 of the address register 30, and the write register 3.
1 flip-flops 811, . . . , 814. The package 29 normally provides one clock pulse for writing to the scratchpad memo 1', thereby changing the flip-flops 831, . . . , 834 of the package 29. In the case of data setting of the scratch pad memo IJ element, the state before data setting of the scratch pad memo IJ element can be maintained simply by saving and restoring the flip-flops of the packages 28 and 29. As explained above, by configuring the clock step to be performed on a package-by-package basis, the flip-flops to be saved and restored become only a small portion of the logic device, and therefore the amount of memory required by the diagnostic device is drastically reduced. Furthermore, since the amount of data transferred between the diagnostic device and the diagnostic control unit is small, there is an effect of shortening the time for saving and restoring. Furthermore, since it is not necessary to set data to a flip-flop for controlling writing to other scratch pad memory elements, the creation of diagnostic data is facilitated. Although the present invention has been specifically explained above using one embodiment thereof, the present invention is not limited to this embodiment and can be applied to the following cases.

First, the unit that provides the clock is not limited to the package, but is generally extended to the device division unit according to a certain division period rule.

Second, this function is not only used to set and observe data for devices that do not have a diagnostic shift path, such as the Scratchpad Memo 1 device, but also to change the state of other parts of the device when diagnosing a part of the device. It can also be applied when diagnosing without

Thirdly, in this embodiment, a diagnostic clock and a normal clock are used.

However, if a special flip-flop is used, there is no need to share and integrate the diagnostic clock.

[Brief explanation of the drawing]

FIG. 1 is a diagram schematically showing a diagnostic device and a logical device that is a device to be diagnosed. FIG. 2 is a diagram schematically showing the diagnostic control section in the logic device shown in FIG. 1 and the device to be diagnosed. FIG. 3 is a diagram showing a logic circuit that is a part to be diagnosed in a logic device, which is an example of the prior art. FIG. 4 is a diagram showing a logic circuit which is a part to be diagnosed in a logic device according to an embodiment of the present invention. 1・
...Logic device, 2...Diagnostic device, 3...
...Storage device in the diagnostic device, 4...Diagnostic connection line,
11...Diagnosis control unit, 12-17...
For diagnosis, 30, 31, 33...Register, 32...Arithmetic register, 111...Diagnostic shift register, 112...Address register, 113,1
14...Decoding circuit, 300, 301, 302,
303, 312, 313, 314, 331, 332, 3
33,334...flipflop, 137,138,
177,178...Gate, 800,801,
802, 803, 811, 812, 813, 814, 8
31,832,833,834. ．． ．． ．． ．． ．． Flip flop, 287, 288, 289, 297, 298, 2
99""" Gate. Tsutomu Figure 28 Figure 3 Purple Figure

Claims (1)

[Claims] 1 A logic circuit that operates only when a clock is supplied, a diagnostic data supply means that supplies diagnostic data to at least the logic circuit that performs diagnosis among the logic circuits, and a diagnostic data supply means that reads diagnostic data from the logic circuit that performs diagnosis. an instructing means for validating an instruction to the logic circuit to be diagnosed while the clock supply to the logic circuit to be diagnosed is stopped; supply means for supplying a clock for processing diagnostic data.