JPS60198978A - Driving method of charge transfer image pickup device - Google Patents

Abstract

PURPOSE:To prevent the generation of flicker by transferring an electric charge of the 1st vertical transfer electrode group and an electric charge of the 2nd vertical transfer electrode group and mixing the charges so as to form them into a unit picture element signal charge. CONSTITUTION:Since the electric charge stored in a photoelectric conversion storage diode 1 is transferred to transfer electrodes phiV2, phiV4 of a vertical charge transfer register 9, the highest voltage is applied. The electrode of the highest level is applied with the phiV2 and with the phiV4 after a prescribed time. Then the phiV2 and the phiV4 are applied with a prescribed time difference so as to transfer the stored charge of the diode 1 to the register 9. The two charges are mixed after that and the result is outputted sequentially. On the other hand, the electrodes phiV1, phiV3 are closed when the stored charge of the diode 1 is transferred to the phiV2 and phiV4 to prevent flicker due to the leakage of the charge caused by capacitor coupling.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of driving a charge transfer imaging device.

(Conventional configuration and its problem A) Figure 1 shows the configuration of a conventional charge transfer imaging device.
A plurality of photoelectric conversion storage diodes (hereinafter referred to as diodes) 1 are formed by a plurality of n-layers separated and arranged two-dimensionally on a p-well layer on an n-type silicon substrate, and the charge of this diode 1 is vertically distributed every horizontal period. It includes a vertical charge transfer register 2 that transfers charges in parallel, and a horizontal transfer charge readout register 3 that sequentially reads out the parallel transfer charges of the vertical charge transfer register 2.

In addition, since the 2-to-1 interlace operation is performed to prevent image flickering, the first vertical electrode φv1 and the second
One diode 1 is provided for each vertical transfer electrode φv2, and the charge of this diode 1 forms a potential barrier (FIG. 2 8) provided adjacent to the diode 1 under the vertical transfer electrode. It can be read completely by the configuration. In order to suppress pluming, which destroys images when excessive charges are generated, a method is used in which diodes are formed with an npn structure.

FIG. 2 is a cross-sectional view showing the structure near the pixel.

A voltage vsua is biased between the p-well 5 and the n-type substrate 6, and the second layer 7 of the pn junction diode 1 is depleted.

In FIG. 2, 8 is a potential barrier section, 9 is a channel (buried layer) of a vertical charge transfer register, and 1 is a potential barrier section.
0 is a vertical transfer electrode, 11 is a channel stopper, 12
is a light shielding film and a 13Fi insulating film.

FIG. 3 (ω) is an explanatory diagram for showing the blooming suppression function.

The charge in the diode 1 becomes empty as shown at 14 in the figure by opening the potential barrier section 8 and transferring the signal charge to the channel 9 of the vertical charge transfer register. Charges are accumulated by the light incident on the diode 1, and the potential well becomes shallow as shown at 14. The two layers 7 and n of the diode are set so that the potential of the two layers 7 of the diode is always deeper than the potential of the transfer gate section.
The bias voltage V80B between the mold substrates 6 is adjusted.

Therefore, the charges accumulated in the diode 1, in the state of excess charge, flow toward the Kn type substrate 6 as shown by 15 before flowing into the channel 9 of the vertical charge transfer register, and as a result, the blooming charges are absorbed. It will be possible.

FIG. 3(b) is an example of a clock pulse applied to the vertical charge transfer register. A voltage vH higher than a clock pulse vM for transferring signal charges is applied. The potential barrier section 8ri is common to the transfer electrode 10 of the vertical charge transfer register 2, and is not opened when transferring the signal charge of the vertical charge transfer register 2 to the horizontal transfer charge readout register 3, but from the diode 1 to the vertical charge transfer register 2. It has a barrier structure that opens when signal charges are transferred.

FIG. 4 shows the clock pulses applied in the field accumulation operation, and shows the clock pulses applied to the vertical charge transfer register when the above-described image pickup apparatus performs image pickup according to the standard television system.

A clock pulse that drives φvl and a clock pulse that drives φV2 are applied to the vertical charge transfer register 2.

In the first field, during the vertical blanking period t1, the corresponding charge of the diode 1 is read out to the vertical charge transfer register 2 by the φv1 clock pulse to which a high clock pulse is applied, and thereafter it is sequentially transferred vertically and horizontally and output. However, in the second field, the vertical blanking period t
The charge of the diode 1 corresponding to φV2K is read out to the vertical charge transfer register 2 by the φ7□ ρ pulse 2 at 2, and is thereafter driven to be transferred and output in the same manner as the first field. According to such a driving method, since charges of diodes in different vertical directions are read out in the first and second fields, a perfect 2:1 interlacing operation is realized and high vertical resolution is obtained. Furthermore, each diode is read out once for two fields, resulting in two-field accumulation, that is, a frame accumulation operation. Although it is possible to capture an image with almost no problems even when capturing an image using such a frame accumulation operation, when capturing an object that moves at high speed, the t! An injury occurs;
Satisfactory images cannot be obtained.

FIG. 5 shows drive pulses in the conventional example, and shows clock pulses applied to reduce the blurring of the accumulation time as described above.

Basically, it is sufficient to read out each diode field by field, and in the image sensor shown in FIG. 1, the accumulated charge in the diode is φ70. If φv2 is set to a high voltage at the same time, φVllφ.

The electric charge of each diode corresponding to each field can be read out simultaneously. The interlacing operation, which is still indispensable in the standard television system, uses charges read out at the same time, for example, in the first field, φ7. The charge of φ7□ was transferred to φ7□ by one vertical transfer and mixed with the charge of φv2, and then sequentially transferred vertically and horizontally and output. In the second field, the charge of φ7□ was transferred to φ7 by vertical transfer and mixed. This can be done by sequentially transferring the data vertically and horizontally and outputting it.

However, even though the field accumulation driving method is feasible from the element configuration, it has been found that when the element is actually driven, a large signal level difference occurs from field to field, resulting in flicker on the screen, making it impossible to obtain satisfactory imaging. ing. The following driving methods are available to suppress this flicker. That is, in the first field, after reading out the accumulated charge of the diode corresponding to either the first or second vertical transfer electrode to the vertical charge transfer register, this charge is vertically transferred one time, and then the first diode read out is The accumulated charges of different diodes are read out to a vertical charge transfer register, mixed with the charges read out first, and sequentially read and output. In the second field, the accumulated charges of diodes different from the first field are transferred vertically. 6. Read it to the register, perform one vertical transfer, read the accumulated charge from the other diode, mix it, and sequentially output it.

However, it has become clear that this method is not perfect in reducing flicker. Although the reduction effect is recognized, when a bright subject is projected or when the illuminance is near saturation, flicker occurs that cannot be ignored, and in cases such as color imaging that requires a large gain, this flicker is accentuated.
It turns out that this method is not possible. When we investigated the cause of this, we found that there was a problem with the transfer from the diode to the vertical charge transfer register.

That is, when transferring from a diode to a vertical charge transfer register, the charge stored in the diode is first transferred to the vertical charge transfer V register where no charge exists, but then this charge is vertically transferred and then transferred to the diode that is read out. has been moved to position. Under these conditions, the accumulated charges of the diodes are transferred to the vertical charge transfer registers and mixed. That is, the transfer from the first diode to the vertical charge transfer register and the transfer from the next diode to the vertical charge transfer register, the former is a transfer where there is no charge in the vertical charge transfer register, whereas the latter It was found that this is due to the fact that the transfer efficiency is different because the charge is transferred to the location where it exists. In particular, it has been found that the transfer from the diode to the vertical charge transfer register is an incomplete transfer of the UIIBD transfer type and is susceptible to this effect, and the effect is large when a large amount of charge exists in the vertical charge transfer register. This is the cause of the increase in illuminance of the subject, which becomes a force.

In this way, it is difficult to suppress flicker by field accumulation operation.

In light of this, we repeated detailed experiments to investigate the 7 errors associated with reading from the diode to the vertical register, and found the following.

■ Vertical transfer registers with a two-layer structure tend to cause flicker.

■ A transfer gate electrode that performs transfer from a diode to a vertical charge transfer register is more likely to generate 7 losses than one that uses a transfer electrode of the vertical charge transfer register and has a barrier structure (Figure 2). .

■ The flicker of a vertical charge transfer register with a two-layer structure changes depending on the complementarity of clock pulses.

■Those with a four-phase structure are resistant to 7 losses, and will not cause 7 losses even if accumulated charges are transferred from the diode to the vertical charge transfer register at the same time.

(2) Even with a four-phase structure, flicker occurs due to the method of transferring the accumulated charge from one diode to the vertical charge transfer register, vertically transferring it, and transferring the accumulated charge of the other diode to the vertical charge transfer register and mixing.

From the above experimental results, the vertical charge transfer register is a 4-phase built-in structure, and the transfer of charge from the diode to the vertical charge transfer register is performed using a common transfer electrode with the vertical charge transfer register.
We have found that flicker does not occur by using a driving method that uses a structure that provides a potential barrier, simultaneously transfers the charges accumulated in the diode to a vertical charge transfer register, and then vertically transfers the two charges to mix them. With this method, it has become possible to perform a field accumulation operation without any errors. However, a problem arose here. This is due to the p-well structure and has nothing to do with flicker.

As mentioned above, in order to absorb excess charge due to pluming deep into the substrate, a bias f is applied between the p-well layer and the n-substrate.
li voltage VsuB is applied, but it has been found that the stable range of this voltage can only be set extremely narrowly. That is, V8UBMX, which has a larger v8UI+, absorbs excess charge and remains at a voltage that does not suck out signal charges, and vStlBMN, which has a smaller value, is a voltage that does not inject false charges from the n-substrate to the p-well. This ■8UBMX and VsUBM
It was found that the voltage range of N can only be about O and SV. This poses a practical problem when considering the temperature and stability of the power supply. When we investigated the reason why the voltage was only around 0.5V even though the device was designed with around 5V in mind, we found that the p-well layer fluctuates greatly in response to the clock pulse applied to the transfer electrode. I found out that The p-well layer is still a problem in practical use, although some improvement can be seen by providing a structure in which a contact is provided to stabilize the potential as much as possible.

(Objective of the Invention) The present invention is intended to solve the above-mentioned problems, and is intended to provide a stable method for driving a charge transfer imaging device U without any damage.

(Structure of the Invention) The present invention has a plurality of two-dimensionally arranged photoelectric conversion regions and vertical charge transfer registers corresponding to the photoelectric conversion regions, and the vertical charge transfer registers are operated by four-phase drive. The vertical transfer electrodes of the vertical charge transfer register are arranged every other in the J-th vertical transfer electrode group and the second vertical transfer electrode group, corresponding to the photoelectric conversion region, and In a charge transfer imaging device equipped with a horizontal transfer charge readout register that sequentially reads parallel transfer charges of vertical charge transfer registers, charges accumulated within the same field time in the charge conversion region are transferred to the corresponding vertical charge transfer registers. The start of the charge transfer is different between the first vertical transfer electrode group and the second vertical transfer electrode group, and after the charge transfer to the first and second vertical transfer electrode groups is completed, Transfer charges are transferred in a predetermined direction within the vertical charge transfer register by transferring the charges of the first vertical transfer electrode group and the charges of the second vertical transfer electrode group in a predetermined direction and mixing them to form a unit pixel signal charge. It is a fc type with a structure that provides wide stability of the bias voltage v8oBK without any distortion or bias.

(Description of Embodiment) FIG. 6 is a diagram showing an example of the waveform of a clock pulse according to an embodiment of the present invention, and shows an enlarged view of the A field at the four-phase drive pulse and the vertical blanking time t1. .

The accumulated charge of the diode is transferred to the transfer electrode φ of the vertical charge transfer register, 2. φV4, so the highest voltage is applied to this transfer electrode.This highest voltage is transferred to φV2.
In this embodiment, φV4 is applied after 0.5μIIeC is applied. That is, φV□ and φV4 are 0.
It is applied with a time difference of 5 μsec to transfer the accumulated charge of the photodiode to the vertical charge transfer register. After this, the two charges are mixed and sequentially output.

φVllφV3 is the accumulated charge of the 7 otodiodes φ,
It is closed when transferred to 2°φV4, and serves to prevent flicker caused by leakage of charge due to capacitive coupling, which rarely occurs in the prior art. Therefore, clock pulses with no complementarity will cause errors, but no flicker will occur.

In this example, the voltage range Δv8UB between VsuillJx and VBUBMN was approximately 5V, and stable operation was demonstrated. Time difference t3 and ΔV between pulse application times of φ9□ and φV4
When I investigated 8UB, when applied at the same time, about 0.5V was almost constant at about 0.2μBee, and 91vR.
It became clear that UB could be obtained and that about 5V could be secured.

In the above example, the case where there is an overlap between the pulses applying high voltages φ7□ and φv4, but the same effect can be obtained even if the time difference is such that there is no overlap. When applying a high pulse ■□, K.

It is expected that this will be the most severely affected, and it is thought that this will be alleviated by allowing some time to pass.

(Effects of the Invention) When the image sensor was imaged using the driving method of the present invention as described above, no flicker was observed at all, and even in color imaging using a high amplifier gain, the The effect is that there is no problem in practical use, and the stable range of voltage applied to the p-well layer and n-substrate to suppress blooming in such a state is 5V.

[Brief explanation of the drawing]

Figure 1 shows the configuration of a conventional charge transfer imaging device;
The figure is a cross-sectional view showing the structure near the pixel, FIG. 3(a) is an explanatory diagram showing the blooming suppression function, and FIG. , flc4 is a diagram showing applied clock pulses for field accumulation operation, FIG. 5 is a diagram showing driving pulses in a conventional example, and FIG. 6 is a diagram showing an example of a clock pulse waveform according to an embodiment of the present invention. 1......Photoelectric conversion storage diode, 2
...Song Theory - Direct Charge Transfer Register, 3...Song・
・Horizontal transfer charge read register, 9...
・Vertical charge transfer register channel (buried layer),
1o...Mountain...Vertical transfer electrode, 11 track/channel stopper, 12...Light shielding film, 13
...Curved insulating film. Patent applicant Matsushita Electronics Co., Ltd. Figure 1 Figure 2 Figure 3 (al Figure 4 φ□VL Figure 5

Claims (2)

[Claims] (1) A plurality of photoelectric conversion regions separated and arranged two-dimensionally,
It has a vertical charge transfer register corresponding to the photoelectric conversion area, and has a structure in which the vertical charge transfer register is operated by four-phase drive, and the vertical transfer electrode of the vertical charge transfer register corresponds to the photoelectric conversion area. A charge transfer device comprising horizontal transfer charge readout registers arranged every other time between the first vertical transfer electrode group and the second vertical transfer electrode group and sequentially reads out the parallel transfer charges of the vertical charge transfer registers. The start of charge transfer for transferring accumulated charges in the photoelectric conversion region within the same field time of the imaging device to the corresponding vertical charge transfer register is between the first vertical transfer electrode group and the second vertical transfer electrode group. Different from the group, @1
And after the charge transfer to the second vertical transfer 'IIL pole group is completed, the transferred charges are transferred in the vertical charge transfer register,
Driving a charge transfer imaging device characterized in that charges of the first vertical transfer electrode group and charges of the second vertical transfer electrode group are transferred in a predetermined direction and mixed to form a unit pixel signal charge. Method. (2) Driving the charge transfer imaging device according to claim (1), wherein the charge transfer completion time for transferring the accumulated charge in the photoelectric conversion region to the corresponding vertical charge transfer register is different. Method.