JPS60198647A - In-circuit emulator - Google Patents

Abstract

PURPOSE:To omit the replacement of a common function despite the replacement of the 2nd CPU by using a bus to secure connection between common functions of the 1st and 2nd CPUs. CONSTITUTION:An RAM31 and an I/O 32 are connected to a CPU1 via a bus 3; while an RAM41 and I/O 42 are connected to a CPU2 via a bus 4 and a switch 9. A bus 5 is provided in addition to buses 3 and 4, and these buses are connected to each other via adaptors 6 and 7. Thus no replacement is needed for a trigger 51 a tracer 52, i.e., common functions despite the replacement of the CPU2.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention provides an in-circuit emulator having a second CPU controlled by a first CPU.
) A third bus is provided so that even if U is replaced, the common functions do not need to be replaced.

(b) Embodiment of the Invention First, a block diagram of an embodiment of the invention is shown in FIG.

1 in Figure 1 is the CPU, 2 is the CPU controlled by the CPUI
, 3 is a bus connected to CPUI, 4 is a bus connected to CPU 2, 5 is a bus connecting common functions, 6 is CPU
Adapter that connects I and bus 5, 7 connects CPU 2 and bus 5
8 is a controller, and 9 is a switch.

RAM 31 and 11032 are connected to CPU 1 via bus 3.

Furthermore, the AM41 and I/0.42 are connected to the CPU 2 via a bus 4 and a switch 9.

A trigger 51 and a trace 52 connected to the bus 5 constitute a common function; the trigger 51 stores the movement of the bus 4, and the trace 32 judges it.

The RAM 41, 11042 and bus 4 in FIG. 1 constitute a user system, and components other than the user system constitute an in-circuit emulator.

The user system is controlled by the CPU 2, and the movement of the bus 4 is determined by the specifications of the CPU 2.

Since the conventional in-circuit emulator does not have the bus 5 and adapter 7 shown in FIG. 1, there is a problem in that when changing the CPU 2, common functions such as the trigger 51 and the trace 52 must be replaced at the same time.

This invention provides an in-circuit emulator with a bus 5 in addition to buses 3 and 4, and connects each bus through an adapter 6 and an adapter 7, so that even if the CPU 2 is replaced, a trigger 51 and a common function are provided. The trace 52 and the like are designed so that they do not need to be replaced.

In FIG. 1, the trigger 51 and trace 5 connected to the bus 5 are
2 can be freely controlled.

Also, when the CPU 2 is executing a user program, information on the bus 4 in the user system is simultaneously transferred to the bus 5.
The state of the bus 4 can be transmitted to each circuit connected to the bus 5.

Next, an example of information on buses 4 and 5 is shown in FIG.

Figure 2 (A) shows the configuration when accessing the bus 5 from the CPUI, where A is the control, B is the R/W1C is the 7
The bit address D indicates 72-bit data.

Figure 2 (a) shows information on bus 4, where E is the CPU
2 is a control for transmitting the operating state to the common function, F is the status of the CPU 2, G is the address of the CPU 2, and H is the data of the CPU 2.

As is clear from FIG. 2, status F and address G on bus 4 are replaced with data D on bus 5.

(c) Effects of the Invention According to this invention, when a user system is operated by the CPU 2 controlled by the CPUI, by newly installing a third bus, the common functions do not need to be changed even if the CPU 2 is changed. This reduces the cost of in-circuit emulators.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment according to the present invention, and FIG. 2 is a diagram showing an example of information on buses 4 and 5. 1...CPU12...CPU13...
... bus, 4 ... bus, 5 ... bus, 6 ... adapter, 7 ... adapter, 8
...Controller, 9...Switch,
31...RAM, 32...Ilo, 4
1...RAM, 42...Ilo, 52
... River) IJ Ga, 52... Trace. Agent Patent Attorney Kin Tsukasa KomataFigure 1Figure 2

Claims (1)

[Claims] 1. A first bus connected to the first CPU;
A second CPU controlled by the CPU, a second bus connected to the second CPU, a third bus that connects both M1 functions, and a third bus that connects the first CPU and the third bus. An in-circuit emulator comprising: a first adapter; and a second adapter connecting a second CPU and a third bus.