JPS60192575U

JPS60192575U - liquid crystal television

Info

Publication number: JPS60192575U
Application number: JP8023184U
Authority: JP
Inventors: 村田　充裕
Original assignee: シチズン時計株式会社
Priority date: 1984-05-30
Filing date: 1984-05-30
Publication date: 1985-12-20

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

、゛第１図は、本考案の１実施例による液晶テレビの全
体システムを示すブロック線図で、第２図は、従来のグ
ループ分割型Ｘ−Ｙマトリクス型液　、　　−高表示素
子の構成を示す回路図。６．１６・・・・・・上信号側駆動７゛ロック、７，１
７・・・・・・下信号側駆動−ブロック′、９，１９・
・・・・・液晶表示素子、９Ａ、１９Ａ・・・・・・上
ブロック、９Ｂ、１９Ｂ・・・・・・下プロ、ツク、１
５・・・・・・表示駆動ブロック、２０・・・・・・テ
レビ信号受信部、３０・・・・・・表示モード切り換え
ブロック、４０・・・・・・表示状態制御ブロック、Ｖ
ａ・・・・・・映像信号、Ｖｄ・・・・・・現表示信号
。, ``Figure 1 is a block diagram showing the overall system of a liquid crystal television according to one embodiment of the present invention, and Figure 2 is a block diagram showing the structure of a conventional group-divided X-Y matrix type liquid crystal television. The circuit diagram shown. 6.16・・・Upper signal side drive 7゛lock, 7,1
7...Lower signal side drive-block', 9, 19.
...Liquid crystal display element, 9A, 19A...Top block, 9B, 19B...Bottom pro, Tsuku, 1
5...Display driving block, 20...TV signal receiving section, 30...Display mode switching block, 40...Display state control block, V
a...Video signal, Vd...Current display signal.

Claims

[Scope of utility model registration request]

(1) An A/D conversion circuit that sequentially converts the video signal from the television broadcast receiver into a digital front signal and outputs it, and a matrix type liquid crystal display element that is divided into an upper surface water block and a lower surface water block. a serial/parallel conversion circuit that converts display signals supplied serially into parallel signals; a line memory that latches the output signal of the serial/parallel conversion circuit; signal-side drive circuits that supply drive signals to the signal-side electrode groups of the liquid crystal display element based on the above are provided independently of each other corresponding to the upper and lower display blocks, and In a liquid crystal television configured so that the lower half is displayed independently in the upper and lower display blocks, the upper display block is configured to store display signals constituting the upper and lower halves of the image, respectively. , selectively performs serial/parallel conversion of any one of the signals from the lower display memory and the A/D conversion circuit, and the signals from the upper and lower display memories. Display signal switching means for supplying the respective signals to the circuits, an image freeze switch, and display state control means for switching the liquid crystal display element to a still image display state in conjunction with operation of the image freeze switch are provided. Normally, among the upper and lower display blocks, for the block to which the current display signal currently output from the A/D conversion circuit belongs, the current display signal is sent to the serial/parallel conversion circuit. At the same time, the current display signal is used to refresh the display memory, and for the block side to which the current display signal does not belong, the signal from the display memory is supplied to the serial/parallel conversion circuit. further, when switching to the still image display state, signals from the display mechanism are supplied to the serial/parallel converter circuits for either side of the upper or lower display blocks, respectively. An LCD television characterized by having the following configuration.

(2) The liquid crystal television set according to claim 1, wherein the upper and lower display memories share addressing means for specifying their respective addresses.