JPS60189356A - Amplitude modulator - Google Patents

Abstract

PURPOSE:To improve sufficiently an on-off ratio of an input carrier wave by simple constitution, to make an amplitude modulator small in size, and to improve its performance by combining a small number of logical gates and a resistance synthesizing circuit. CONSTITUTION:A carrier wave input from the input terminal 20 of an amplitude modulator is provided to a gate 23 for fetching an OR output an NOR output through a capacitor 28. To this gate 23, a bias voltage is applied by resistances 26, 27, and it is operated by a threshold level. An OR output (e) from this gate 23 is provided to an NOR gate 24, and an NOR output (f) is provided to an OR gate 25. To the other input of these gates 24, 25, a pulse wave (d) from a modulating signal input terminal 21 is provided by inverting the polarity by an invertor 23. Subsequently, outputs of output waveforms (i), (j) of the gates 24, 25 are generated from an output terminal 22 in accordance with whether the pulse wave (d) is high or low, an on-off ratio of the carrier wave is improved sufficiently, a constitution of the modulator is simplified, and also its performance is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplitude modulator that turns a carrier wave ON and OFF using a binary digital signal in a communication device.

Conventionally, a ring modulator is often used as this type of amplitude modulator. This modulator is constructed as shown in the circuit example in Fig. 1. When this modulator is used as an amplitude modulator for ON/OFF switching, its operation can be seen with reference to the time chart in Fig. 2. I will explain. In these figures, it is assumed that the modulating signal to be switched has a .Gulus wave as shown in b. When the pulse wave applied to the modulation signal input terminal 8 becomes sufficiently positive, the switching diodes 3 and 4 become conductive, and the output of the carrier wave oscillator 1 applied via the hybrid transformer 2 is applied to the output terminal 10 of the hybrid transformer 7. Appears as C. However, when the pulse wave applied to the terminal 8 approaches Ov, the switching diodes 3 to 6 are all cut off, and no carrier wave appears at the output terminal 10.

In this way, the carrier input is
N, an OFF signal is obtained. This ring modulator type amplitude modulator has a wide frequency range.
Generally widely used. However, this modulator is 1
Since it is essentially a linear modulator, that is, an analog type modulator, carrier wave leakage (local leakage) occurs, making it difficult to achieve an ION and QFF ratio of around 60 dB in a single stage. .

There is a drawback that the circuit becomes complicated in order to obtain the QFF ratio.

The object of the present invention is to eliminate the above-mentioned conventional drawbacks and to
With a simple configuration using
The object of the present invention is to provide an economical amplitude modulator that can obtain a sufficient QFF ratio.

According to the present invention, a carrier wave is input, and its OR output and N
a first dart that takes out an OR output; a NOR dart that has one input as the OR output taken out from the first dart and receives a pulse of a modulation signal on the other input and gates the first dart; an OR dart whose one input is the NOR output taken out from the NOR gate, and whose other input is gated by receiving a pulse in phase with the pulse of the modulation signal;
An amplitude modulator is obtained which is provided with means for resistance-synthesizing the output of the R gate and the output of the OR dart.

Next, we will give an example of an amplitude modulator according to the present invention.
This will be explained with reference to the drawings.

FIG. 3 is a circuit diagram showing the configuration of an embodiment according to the present invention. According to this example, the carrier power d applied to the input terminal 20 is applied to the gate 23 via the DC blocking capacitor 28.

Note that resistors 26 and 27 connect the sine wave of the carrier wave to Dinotal I.
This is a bias resistor for operating near the threshold level of C. From Gate 23.

The OR output e and the NOROR output are applied to one input of a NOR gate 24 and an OR gate 25. The relationship between these input and output signals can be seen in the time chart of FIG. Further, to the other inputs of the NOR gate 24 and the OR gate 25, the pulse wave g is applied in phase from the modulation signal input terminal 21 via the inverter 32 as a Tahars wave with its polarity inverted. . This inverter 32 is added to invert the polarity in order to guide the input carrier wave to the output terminal 22 when the ON/OFF input due to the pulse wave g is at a high level. As a result, the Noyals wave g
When the ON and OFF signals are at a high level, the output of the NOR gate 24 has a waveform of 9. as shown in the waveform i of the time chart in FIG. The output of the OR gate 25 has a waveform j. Output i of NOR gate 24 and OR gate 2
The output J of 5 is a resistor 29 connected to each output side.
and 30 to the resistor 31, where vector synthesis of the two is performed to form a composite wave.9. Output terminal 22
guided by.

) Figure 5 shows the modulation signal zf and 7 wave g of the modulation signal in Figure 3.
This figure shows the relationship between ON and OFF-controlled carrier waves in a long-term operating state. If you look at this time chart, the embodiment shown in Figure 3 is ON.

It will be seen that it operates as an amplitude modulator of the carrier wave by OFF switching. In this case, in the OFF state of the carrier wave, the input carrier waves e and f are the NOR dart 24 and the OR gate 25, respectively.
Theoretically, the cut is made with an infinite ON and QFF ratio (5) using both digital IC darts.

As is clear from the above description, according to the present invention, the ON and QFF ratios of the input carrier can be sufficiently increased with a small and simple configuration by combining a few logic darts and a resistance combining circuit. The effect of improving performance and economic efficiency is significant.

[Brief explanation of the drawing]

FIG. 1 is a circuit example showing the configuration of a conventional amplitude modulator. FIG. 2 is a time chart for explaining the ON and OFF switching operations of the conventional example in FIG.
The figure is a circuit diagram showing the configuration of an embodiment according to the present invention. FIG. 4 is a time chart for explaining the operation in the embodiment of FIG. 3, and FIG. 5 is a time chart showing the relationship between the Norse wave of the modulation signal in FIG. It is a time chart shown in the operating state of time. In the figure, 20 is a carrier wave input terminal, 21 is a modulation signal input terminal, 22 is an output terminal, 23 is an OR output and a NOR
Dart that takes out the output, 24 is NOR dart, 25
is an OR gate, 26, 27, 29, 30 degrees (6) 31 is a resistor, 28 is a capacitor, and 32 is an inverter. Figure 1 Figure 2 C-Tama Tomowan 1 → book (7) ■ and -shi -b bao ω Δ

Claims (1)

[Claims] 1. A 10th gate that inputs a carrier wave and takes out its OR output and NOR output, and the OR output taken out from the first gate is used as one input, and a modulation signal is input to the other input. a NOR gate that gates in response to a pulse of the modulation signal, and the NOR output taken out from the first dart as one input, and the other input gates the gate in response to a pulse in phase with the pulse of the modulation signal. An amplitude modulator comprising an OR dart and means for resistively synthesizing the output of the NOR gate and the output of the OR gate.