RU1811642C - Frequency demodulator - Google Patents

Abstract

Usage: communication technique, demodulation of frequency-modulated signals. The inventive frequency demodulator contains an amplifier-limiter (1), two one-shot (2, 8), three inverters (6, 7, 9), four AND elements (3, 4, 10, 11), two OR elements (12 , 13) and trigger (5). In the frequency demodulator, separation of the sign of the difference in the duration of the input signals and signals from the single-vibrators (2, 8) and conversion into pulses during each half-cycle of the frequency-modulated signal are carried out. These pulses control the operation of trigger (5), the periodicity of which changes in state corresponds to each half-cycle of frequency manipulation. 2 ill.

Description

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The invention relates to communication technology and can be used to demodulate frequency modulated signals.

The purpose of the invention is to improve the performance of the device.

Fig. 1 is a structural electrical diagram of a demodulator; in FIG. 2 - timing diagrams of signals.

The demodulator contains an amplifier-limiter 1, the first one-shot 2, the first part And 3, the second part And 4, the trigger 5, the first b and second 7 inverters, the second one-shot 8 and the third inverter 9, the third 10 and fourth 11 elements And, the first 12 and second 13 elements OR.

The frequency demodulator operates as follows.

The input frequency-manipulated signal is converted into rectangular pulses by an amplifier-limiter 1. Each pulse of the obtained sequence triggers a single-shot 2 with its leading edge and a second one-shot 8 through the inverter 6 with a trailing edge. The pulse duration of the single-shots 2 and 8 is the same and equal to the half-cycle of the central frequency. The pulses of single-vibrators 2 and 8 of constant duration and an amplifier-limiter 1 of variable duration with an And 3 element with an inverter 7, And 10 with an inverter 9, on the one hand, and And 4 with an inverter 6, And 11, on the other hand, are divided 71 on the sign of the difference in duration and are converted into pulses during each half-cycle of the frequency-modulated signal.

Separated pulses through elements OR 12 and 13 are fed to the inputs of trigger 5 and control its operation. The frequency of change in the state of trigger 5 corresponds to each half-cycle of frequency manipulation.

The proposed demodulator provides the ability to demodulate frequency-manipulated signals, for which each bit of digital information is represented by a minimum time interval equal to the half-period of the carrier frequency

(for example, O is the half-period of the lowest frequency, and 1 is the half-period of the upper frequency).

Thus, the speed of the frequency modulator is increased; the proposed modulator allows demodulating

frequency-manipulated signals in which the ratio of the amount of transmitted information to the carrier frequency is maximum.

fifteen

Claims (1)

The claims A frequency demodulator containing a trigger, an amplifier-limiter, the input of which is an input of a frequency demodulator, and the output is connected to the first input of the first element And, to the inputs of the first one-vibrator and inverter, while the output of the first one-vibrator is connected to the first input of the second element And and through the second inverter to the second input of the first element And, and the output of the first inverter is connected to the second input of the second element And, t is that in order to improve performance, between the output of the first the inverter and the first input of the trigger, the outputs of which are the outputs of the frequency demodulator, the second one-shot, the third inverter, the third AND element, the other input of which is connected to the output of the first inverter, and the first OR element, the other input of which is connected to the output of the first element 14, are connected in series and between the output of the amplifier-limiter and the second input of the trigger are connected in series the fourth AND element, the other input of which is connected to the output of the second one-shot, and the second OR element, the other input to orogo connected to the output of the second member I. FIG. 1