JPS60186940A - 符号誤り訂正方法 - Google Patents
符号誤り訂正方法Info
- Publication number
- JPS60186940A JPS60186940A JP59014039A JP1403984A JPS60186940A JP S60186940 A JPS60186940 A JP S60186940A JP 59014039 A JP59014039 A JP 59014039A JP 1403984 A JP1403984 A JP 1403984A JP S60186940 A JPS60186940 A JP S60186940A
- Authority
- JP
- Japan
- Prior art keywords
- error
- correction
- code
- words
- error correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012937 correction Methods 0.000 title claims abstract description 143
- 238000001514 detection method Methods 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims description 50
- 238000012545 processing Methods 0.000 abstract description 16
- 208000011580 syndromic disease Diseases 0.000 description 9
- 238000012360 testing method Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000008929 regeneration Effects 0.000 description 2
- 238000011069 regeneration method Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Detection And Correction Of Errors (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59014039A JPS60186940A (ja) | 1984-01-27 | 1984-01-27 | 符号誤り訂正方法 |
US06/695,067 US4627058A (en) | 1984-01-27 | 1985-01-25 | Code error correction method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59014039A JPS60186940A (ja) | 1984-01-27 | 1984-01-27 | 符号誤り訂正方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60186940A true JPS60186940A (ja) | 1985-09-24 |
JPH0512737B2 JPH0512737B2 (enrdf_load_stackoverflow) | 1993-02-18 |
Family
ID=11849979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59014039A Granted JPS60186940A (ja) | 1984-01-27 | 1984-01-27 | 符号誤り訂正方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60186940A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6425046B1 (en) | 1991-11-05 | 2002-07-23 | Monolithic System Technology, Inc. | Method for using a latched sense amplifier in a memory module as a high-speed cache memory |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS576417A (en) * | 1980-06-11 | 1982-01-13 | Matsushita Electric Ind Co Ltd | Error correction system |
JPS58111539A (ja) * | 1981-12-25 | 1983-07-02 | Sony Corp | エラ−訂正方法 |
-
1984
- 1984-01-27 JP JP59014039A patent/JPS60186940A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS576417A (en) * | 1980-06-11 | 1982-01-13 | Matsushita Electric Ind Co Ltd | Error correction system |
JPS58111539A (ja) * | 1981-12-25 | 1983-07-02 | Sony Corp | エラ−訂正方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6425046B1 (en) | 1991-11-05 | 2002-07-23 | Monolithic System Technology, Inc. | Method for using a latched sense amplifier in a memory module as a high-speed cache memory |
US6483755B2 (en) | 1991-11-05 | 2002-11-19 | Monolithic System Technology, Inc. | Memory modules with high speed latched sense amplifiers |
Also Published As
Publication number | Publication date |
---|---|
JPH0512737B2 (enrdf_load_stackoverflow) | 1993-02-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |