JPS60185173A - Detection of connection stage of logical circuit - Google Patents

Abstract

PURPOSE:To make it possible to continuously monitor the change at a connection part with the elapse of time, by detecting a connection state on the basis of the integrated value of the output from a ring oscillator constituted of a logical circuit containing the connection part of the electrode and the terminal of LSI. CONSTITUTION:A ring oscillator 16 is constituted of a logical circuit containing the electrode and the terminal of LSI. The output of this oscillator 16 is integrated by an integrator circuit 17 having predetermined time constant and the voltage of the integrated rusult is compared with reference voltage being constant voltage by a reference voltage comparator circuit 18. A judge circuit 19 judges a connection state on the basis of the magnitude of the integrated voltage to said reference voltage and a judge result is monitored. By this constitution, the change in the micro-bonding part of the connection part of the electrode and the terminal of an LSI logical circuit is continuously monitored and the point of time, when connection inferiority is generated, can be accurately grasped.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method for detecting the connection state of LSI logic circuits, etc., and particularly to the connection portion between electrodes and terminals of an LSI chip, flip chip bonding, etc. (hereinafter simply referred to as r microbonding). 2. A method for detecting the connection state of a computer.

[Background of the invention]

There are various methods for so-called micro bonding, which connects electrodes and terminals of logic circuits such as silicon LSI chips, but all of them connect terminals to extremely small electrodes of LSI chips, etc., so the connection state of the connection part is different. need to be detected. Conventionally, the method of detecting the connection state of the micro-bonding part involves applying electricity to the LSI chip through the micro-bonding part, measuring the electrical resistance value of the micro-bonding part after a certain period of time, and measuring the electrical resistance value of the micro-bonding part before the certain period of time has elapsed. A method of detecting whether the connection status is good or bad by comparing it with the measured value of A method of physically destroying and observing the microbonding portion is widely used.

However, with any of the above methods, it is not possible to continuously observe the connection state of microbonding, so it is not possible to accurately grasp the time when connection failure occurs, that is, the lifespan of microbonding. The drawback was that it could not be removed.

[Purpose of the invention]

The present invention has been made in view of the above points, and is based on the LS
Continuously monitor connections between electrodes and terminals of I logic circuits, such as changes in connection over time at microbonding parts, accurately grasp the point at which a connection failure occurs, and take measures according to the purpose of monitoring (for example, The object of the present invention is to provide a method for detecting the connection state of a logic circuit that can perform power off, record the date and time of occurrence, etc.).

[Summary of the invention]

In order to achieve the above object, the present invention configures a ring oscillator with a logic circuit including a micro-bonding section such as an LSI, and outputs the output of the ring oscillator so that when the ring oscillator is operating normally, the integral value is constant above and below. input into an integrating circuit with an integral constant that falls within the range level,
If the output of the ring oscillator becomes a logic level of 111gg or ``0'' continuously due to a connection failure in the microbonding section, and the output level of the integrating circuit exceeds a certain upper and lower range, this will be detected and the microbonding section will be activated. Detect poor connection status.

[Embodiments of the invention]

Embodiments of the present invention will be described below based on the drawings.

Figure 1 is a diagram showing the state in which the terminals are connected to the electrodes of the Sl chip.
Multiple electrodes 11 with a diameter of about 100 μm are mounted on the SISl chip.
is provided, and a terminal 12 is connected to the electrode 11.

The connecting portion between the electric current tliA11 and the terminal 12 is what is called a micro bonding portion.

In the LSIS chip as described above, for example, if the terminals 12 are connected as shown by the broken line 13, a ring oscillator of a logic circuit as shown in FIG. 2 is constructed.

In FIG. 2, reference numerals 14 and 15 are microbonding portions that connect the electrode 11 and the terminal 12.

FIG. 3 is a block diagram of one embodiment of the present invention. In the figure, 16 is a ring oscillator as shown in FIG.
is input and integrated.

The output of the integrating circuit 17 is compared with a reference voltage of a certain level in a reference voltage comparison circuit 18, and the result is sent to a determination circuit 19.
to detect whether the connection state of the micro bonding part is good or bad.

Figure 4 shows the output of the ring oscillator 16 and the integration circuit 17.
3 is a timing chart showing the output of FIG.

In the figure, the output RO of the ring oscillator 16 is a rectangular wave output with the theoretical value level +1111 and the occupation time of 0'' equal to each other.
It operates normally until the micro bonding part 14'
, 15 etc. at time t. Assume that the operation has become abnormal. The output ■0 of the integrating circuit 17 is from time t to t
. Until then, the output of the ring oscillator 16 is integrated at a constant upper and lower level■. This shows a waveform during normal operation that falls within the range of IVL, but at time 1o, the microbonding part 14 or 15 becomes defective, and the output RO of the ring oscillator 16
When becomes a continuous logic level ``1'' or logic level ``O1'' as shown by a solid line 101 or a broken line 102, the output of the integrating circuit 17 becomes a logic level ``'1'' as shown by a real line 103 or a broken line 104, respectively. ``'' or logic level tr 01J. This logic level "1" or logic level "0" is reached according to the integration constant of the integrating circuit 17. Here, as a reference voltage for determining that the microbonding part is in a normal state, A value obtained by adding or subtracting the circuit operation margin voltage "゛Δ■"' to the upper and lower voltages of the output IO of the integrating circuit 17, that is, V,
and ■1.

FIG. 5 is a circuit diagram embodying FIG. 3.

The output of the ring oscillator 16 is amplified by an amplifier 20, and an integration circuit 17 consisting of a resistor R1 and a capacitor C.
is input. The output of the integrating circuit 17 is inputted to a reference voltage comparison circuit 18 that includes a comparator 21 , a comparator 22 , and an OR circuit 23 .

The output of the reference voltage comparison circuit 18 is inputted via an inverter 25 to a determination circuit 19 that includes a flip-flop 26 and a reset circuit 27 that generates a reset signal when the power is turned on. The comparator 21 has a reference voltage ■1. is entered,
It is determined whether the output of the integrating circuit 17 is below the reference voltage vL, and the comparator 22 receives the reference voltage ■. is input, and it is determined whether the output of the integrating circuit 17 is equal to or higher than the reference voltage (■8).

In the circuit shown in Fig. 5, when the power is turned on, the cell I
- A reset signal is output from the circuit 27 to reset the flip-flop 26. Link oscillator 16 is activated and produces a continuous rectangular pulse output RO. Even if the logic levels '1' and '0' of the output RO are integrated by the integrating circuit 17, as long as the microbonding is normal,
The output IO of the integrating circuit 17 is both at the reference voltage V. , ■,
Therefore, neither of the comparators 21 and 22 outputs an output, and the output terminal 28 of the 1 determination circuit 19 does not receive an output. However, as shown in FIG. 4, at time t. When the ring oscillator becomes abnormal, the solid line 1
01 or consecutive logic levels # like the broken line 102
+, gg or logic level "0", the output IO of the integrating circuit 17 gradually rises or falls according to its integration time constant to become a continuous 1" or rr Ou as shown by the solid line 103 or the broken line 104. Comparator 21 or comparator 22 outputs an output when the output of integration circuit 17 exceeds the level of reference voltage vL or reference voltage vH, and the output passes through OR circuit 23 and inverter 25 and sets flip-flop 26. , outputs to the terminal 28 to notify the micro bonding section that a connection failure has occurred.The output signal of the flip-flop 26 is used for various control signals, such as powering off the system under test, recording the date and time of occurrence, etc. It can be used as a signal.

According to the above embodiment, the micro bonding part 14.1
Since it is possible to continuously monitor the connection changes over time such as No. In addition, continuous monitoring allows us to accurately identify the occurrence of connection failures in the microbonding section, making it possible to extract control signals for subsequent treatment.Furthermore, it is possible to evaluate the connection life of the microbonding section while operating the logic circuit. ,
The lifespan of microbonding can be measured under actual usage conditions.

〔Effect of the invention〕

As explained above, according to the present invention, a ring oscillator is configured with a logic circuit including a connecting part between an electrode and a terminal of an LSI, etc., and the output of the ring oscillator is integrated by an integrating circuit, and the integrated value is equal to or higher than a certain level. Alternatively, the connection status of the connection part is detected based on whether or not it is below a certain level, so it is possible to continuously monitor changes in the connection part over time, and it is also possible to accurately grasp the point at which a connection failure occurs, and to prevent connection failures from occurring. An excellent effect can be obtained in that appropriate measures can be taken against the problem.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the connection state of electrodes and terminals of an LSI chip, Fig. 2 is a diagram showing the configuration of a ring oscillator, Fig. 3 is a block diagram showing an embodiment of the present invention, and Fig. 4 is a link oscillator. FIG. 5 is a circuit diagram embodying the embodiment of FIG. 3. FIG. DESCRIPTION OF SYMBOLS 10... LSI chip, 11... Electrode, 12... Terminal, 14.15... Micro bond ink part, 16...
...Ring oscillator, 17...Integrator circuit, 18.
. . . Reference voltage comparison circuit, 19 . . . Judgment circuit. Figure 1: ゛♂ ♂ Figure 2 Figure 31vl Figure 44 Figure 5 Figure 7

Claims (1)

[Claims] (1) A ring oscillator is configured with a logic circuit including a connection part between electrodes and terminals of an LSI, etc., and the output of the ring oscillator is integrated by an integrating circuit, and the integrated value in the integrating circuit is above a certain level or below a certain level. A method for detecting a connection state of a logic circuit, characterized in that the connection state of the connection portion is detected based on whether or not the connection state of the connection portion is determined.