JPS60182145A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS60182145A
JPS60182145A JP59036477A JP3647784A JPS60182145A JP S60182145 A JPS60182145 A JP S60182145A JP 59036477 A JP59036477 A JP 59036477A JP 3647784 A JP3647784 A JP 3647784A JP S60182145 A JPS60182145 A JP S60182145A
Authority
JP
Japan
Prior art keywords
aluminum
semiconductor chip
bonding
electrode
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59036477A
Other languages
Japanese (ja)
Inventor
Kazuhide Sato
和秀 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59036477A priority Critical patent/JPS60182145A/en
Publication of JPS60182145A publication Critical patent/JPS60182145A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent generation of defective products having cracks and the like by a method wherein an electrode located on a semiconductor chip and the lead- out conductor provided on the circumference of the semiconductor chip are connected through the intermediary of an aluminum ball formed on the electrode. CONSTITUTION:A semiconductor chip 2 is fixed to the bed 1 of a lead frame by performing a die-bonding, and on the circumference of the bed 1, an external lead-out conductor 3 is arranged in radial form. An aluminum ball 4 is provided on the load-out electrode formed on the upper circumferential part of the bed 1, an aluminum wire is led out from said aluminum ball 4, and it is connected to the external lead-out conductor 3.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a semiconductor device.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

半導体装置には半導体チップ上の周囲に設けられた電極
と外部リードとの間を熱圧着法による金線接続または超
音波ボンディング法によるアルミニウム線接続を行うこ
とによって結合するワイヤボンディング方式のものと、
半導体チップ上に金やはんだなどで形成された突起（バ
ンプ）を電極として外部導体に直接接続するフリップチ
ップ方式、金バンプを有する多数の半導体チップ全長尺
のポリイミドチーブに配列したＴへｓ　（Ｔａｐθへｕ
ｔｏｍａｔｅｉ　Ｂｏｎｄｉｎｇ　）方式等のワイヤレ
ス方式のものとがある。Semiconductor devices include wire bonding type devices in which electrodes provided around the semiconductor chip and external leads are bonded by gold wire connection by thermocompression bonding or aluminum wire connection by ultrasonic bonding method;
The flip-chip method uses protrusions (bumps) formed of gold, solder, etc. on a semiconductor chip as electrodes and connects them directly to an external conductor. Heu
There are also wireless methods such as the Tomatei Bonding method.

このうち、ワイヤボンディング方式における金ボールに
よるボンディングでは熱と圧力によって下地の素子に歪
を生じ、リーク電流の発生やクラックの発生を招くとい
う問題がある、ボール形成が可能な金属としては銀や銅
があるがビッカース硬度で金４０に対し銀４４、銅５４
であってこれらは金よシもさらにクラックを発生させや
すく使用できない。したがって、下地クラックの発生を
防止するため、ポリイミド等の有機材料を被膜しその上
に電極を形成する等の対策が必要と六る。Among these, bonding using gold balls in the wire bonding method has the problem of causing distortion in the underlying element due to heat and pressure, leading to leakage current and cracks. Metals that can form balls include silver and copper. However, the Vickers hardness is 40 for gold, 44 for silver, and 54 for copper.
However, these materials cannot be used because they are more likely to cause cracks. Therefore, in order to prevent the occurrence of base cracks, it is necessary to take measures such as coating an organic material such as polyimide and forming an electrode thereon.

一方、バンプを使用する半導体装置においては、パンダ
形成の際に半導体チップの上面のガラス保静膜のクラッ
クおよび接合不良が生ずることがあるので、バンプ形成
部には軸数の金属ｊ−を設ける必要がある。このような
複数金属層としては、半導体チップのアルミニウムパタ
ーンの上ｒ（クロム、銅、金を重ねて金バンプを形５Ｖ
するもの、同様にクロム、クロム＋銅、銅すず合金ｆ！
：重ねてはんだバンプを形成するもの等が知られている
。On the other hand, in semiconductor devices that use bumps, cracks and poor bonding may occur in the glass retaining film on the top surface of the semiconductor chip during panda formation, so a metal j- of the number of axes is provided in the bump formation area. There is a need. Such multiple metal layers include gold bumps formed on top of the aluminum pattern of the semiconductor chip (chromium, copper, and gold are stacked on top of each other).
Similarly, chromium, chromium + copper, copper-tin alloy f!
: There are known methods in which solder bumps are formed by overlapping them.

しかしながら、このような異種金属層を形成するには多
くの工程が必要であり、工数の増加に伴うコスト増を招
いている。However, many steps are required to form such a dissimilar metal layer, leading to an increase in cost due to an increase in the number of steps.

〔発明の目的〕[Purpose of the invention]

本発明は上記間四点に棟み、クラック等の不良を招くこ
とがなく、しかもコストを低下させることのできる半導
体装（＠全提供することを目的とする。The present invention addresses the above four points and aims to provide a semiconductor device that does not cause defects such as cracks and can reduce costs.

〔発明の概要〕[Summary of the invention]

上記目的達成のため、本発明においては半導体チップ上
の電極とその周囲に配設された引出導体とを電極上に形
成されたアルミニウムボールを介して接続することを特
徴としており、低硬度で、しかも転延性にすぐれたアル
ミニウムの性質からクラック等の発生を防止し、しかも
コストダウン効果が大きいものである。In order to achieve the above object, the present invention is characterized in that the electrode on the semiconductor chip and the lead-out conductor arranged around it are connected via an aluminum ball formed on the electrode, and has a low hardness. Moreover, aluminum's excellent rollability prevents the occurrence of cracks, etc., and has a significant cost reduction effect.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照しながら本発明の実施例のいくうかを
詳細に説明する。Hereinafter, some embodiments of the present invention will be described in detail with reference to the drawings.

第１図は本発明の一実施例を示す中央断面図で６って、
リードフレームのベッドｌ上に半導体チップ２がダイボ
ンディングにより固着されておシ、このベッド１の周囲
には外部引出し導体３が放射状に配設されている。また
、ベッドｌの上面周囲部に設けられた引出州都：極には
アルミニウムボール４が設けられ、このアルミニウムボ
ール４からはアルミニウムワイヤ５が引出され、外部引
出し導体３と接続が行われている。FIG. 1 is a central sectional view showing one embodiment of the present invention.
A semiconductor chip 2 is fixed on a bed 1 of a lead frame by die bonding, and external lead conductors 3 are arranged radially around the bed 1. Further, an aluminum ball 4 is provided on a lead-out pole provided around the upper surface of the bed l, and an aluminum wire 5 is drawn out from this aluminum ball 4 and connected to an external lead-out conductor 3.

第２図は第１図の実施例とほぼ同様の実施例を示す中央
断面図であるが、アルミニウムボール６は半導体チップ
２の周囲部の引出用’を極からではなく、半導体チップ
２内のトランジスタ等の電極位置からそのま１引出さ匁
ている。FIG. 2 is a central cross-sectional view showing an embodiment substantially similar to the embodiment shown in FIG. It is pulled out directly from the electrode position of a transistor, etc.

このような半導体装置を製造するには次のように行う。Manufacturing such a semiconductor device is performed as follows.

まず、酬１１いアルミニウムワイヤをボンディングキャ
ピラリ先端より引き出し、アルゴン等の非酸化性あるい
は非活性ガス中でアルミニウムワイヤ先咋に例えば数箱
、を行い、アルミニウムのボールを形成する。First, a thin aluminum wire is pulled out from the tip of a bonding capillary, and the tip of the aluminum wire is heated, for example, several times, in a non-oxidizing or inert gas such as argon to form an aluminum ball.

次に、半導体チップ上に既にウェーハエ程で形成された
′［ＩＬ電極ッド部にアルミニウムボールを熱圧着する
。このアルミニウムボールにつながったアルミニウムワ
イヤの他端はループを形成した上外部引出導体に超音波
ボンディングで接着される。Next, an aluminum ball is thermocompression bonded to the IL electrode pad portion already formed on the semiconductor chip during the wafer etching process. The other end of the aluminum wire connected to the aluminum ball is bonded to the looped upper external lead conductor by ultrasonic bonding.

これらの接続時の接続性を向上させるために、接続部を
加熱するとよい。In order to improve the connectivity during these connections, it is recommended to heat the connection portions.

第３図はアルミニウムワイヤを用いない実装法を示す中
央断面図であって、半導体チップ１２の引出用電極部に
設けられたアルミニウムボール１３をバンプとして使用
し、外部引出用導体１１と接続を行ったものである。FIG. 3 is a central sectional view showing a mounting method that does not use aluminum wire, in which aluminum balls 13 provided on the lead-out electrode portion of the semiconductor chip 12 are used as bumps to connect with the external lead-out conductor 11. It is something that

このようなバンプとしてのアルミニウムボールを形成す
るには次のようにする。To form such an aluminum ball as a bump, proceed as follows.

アルミニウムワイヤボンディングの場合と同様、１ず、
細いアルミニウムワイヤをボンディングキャピラリ先端
よ）引出し、アルゴン等の非酸化性ガス中でアルミニウ
ムワイヤ先端に例えば放電を行うとアルミニウムワイヤ
が凝縮してボール状となる。As in the case of aluminum wire bonding, 1.
When a thin aluminum wire is pulled out from the tip of a bonding capillary and a discharge is applied to the tip of the aluminum wire in a non-oxidizing gas such as argon, the aluminum wire condenses into a ball shape.

次にこのアルミニウムボールを半導体チップの所定位置
に形成されたアルミニウムパッドに超音波ボンディング
、熱圧着、超音波ボンディング等によシ接合する。Next, this aluminum ball is bonded to an aluminum pad formed at a predetermined position on the semiconductor chip by ultrasonic bonding, thermocompression bonding, ultrasonic bonding, or the like.

この状態ではアルミニウムボールにはアルミニウムワイ
ヤが接続されたままになっているので、カッターによシ
アルミニウムワイヤを切離すことによシ半導体チップ上
のアルミニウムボールが得られる。In this state, the aluminum wire remains connected to the aluminum ball, so the aluminum ball on the semiconductor chip can be obtained by cutting off the aluminum wire with a cutter.

このような工程を半導体チップ上の各パッドにライて行
い、半導体チップＩ２０表面を下（フェースダウン）に
してアルミニウムボール１３とリードフレームの外部引
出導体とを位置決めし、超音波ボンディング等によシ同
時に多数の導体における接続を行えばいわゆるフリップ
チップ方式の半導体装置が完成することになる。This process is performed on each pad on the semiconductor chip, the aluminum ball 13 and the external conductor of the lead frame are positioned with the semiconductor chip I20 surface facing down (face down), and bonded by ultrasonic bonding or the like. If a large number of conductors are connected at the same time, a so-called flip-chip type semiconductor device is completed.

以上の実施例におけるアルミニウム接合は熱圧着、超音
波ボンディング等ヲ使用しているが、これらに限られる
ものではなく、通常使用される各棟の接合方法を用いる
ことができる。Aluminum bonding in the above embodiments uses thermocompression bonding, ultrasonic bonding, etc., but is not limited to these, and any commonly used bonding method can be used.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明にかかる半導体装置においては、
半導体チップ上の電極とこの半導体チップの周囲に配設
された引出導体とを、前記電極上に形成されたピツカー
ヌ硬度２０と金よシも軟かく、しかも１延性の良いアル
ミニウムボー／Ｉ／ｌｌ−介して接続するようにしてい
るので、接合時および樹脂封止時にアルミニウムが変形
して応力を分散させ、半導体チップの下地クラック、樹
脂封止時のクラック等を発生させるととがない。As described above, in the semiconductor device according to the present invention,
The electrode on the semiconductor chip and the lead-out conductor disposed around the semiconductor chip are connected to an aluminum board formed on the electrode which has a Piccane hardness of 20, is softer than metal, and has good ductility. Since the connection is made through the aluminum plate, the aluminum deforms during bonding and resin sealing, dispersing stress, and causing cracks in the base of the semiconductor chip and cracks during resin sealing.

またアルミニウムボールはアルミニウムワイヤとの融合
性が良いためワイヤボンディング方式の半導体装置では
接合の信頼性を向上させ、また、上述したように変形の
容易性に伴う低応力からワイヤレスポンディング方式の
半導体装置にあってもバング形成にあたって複数の金蝿
層を形成する必要はなくコストの低減を図ることができ
る。In addition, since aluminum balls have good fusion properties with aluminum wires, they improve bonding reliability in wire bonding type semiconductor devices, and as mentioned above, they can be easily deformed and have low stress, so they can be used in wireless bonding type semiconductor devices. Even in this case, it is not necessary to form a plurality of metal fly layers when forming a bang, and costs can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第１図ないし第３図は本発明にかがる半導体装置の実施
例をそれぞれ示す中央断面図である。 １・・・ベラＦ−１２＋　１２・・・半導体チップ、３
．１３・・・外部引出用導体、４．１３・・・ア／Ｉ／
ミニウムボール、５・・・アルミニウムワイヤ。 出願人代理人　猪　股　清1 to 3 are central sectional views showing embodiments of a semiconductor device according to the present invention, respectively. 1...Vera F-12+ 12...Semiconductor chip, 3
．． 13...External drawer conductor, 4.13...A/I/
Mini ball, 5...aluminum wire. Applicant's agent Kiyoshi Inomata

Claims (1)

【特許請求の範囲】 １、半導体チップ上の電極とこの半導体チップの周囲に
配設された引出導体とを、前記′電極上に形成されたア
ルミニウムボールを介して接続したことを特徴とする半
導体装置。 ２アルミニウムボールがアルミニウム線をワイヤボンデ
ィングするためのボールとして機能するものである特許
請求の範囲ｉｔ項記載の半導体装置。 丸アルミニウムボー／ｌ／が半導体チップを直接引出導
体に接合する接合体として機能するものでらる特許請求
の範囲第１項記載の半導体装置。[Claims] 1. A semiconductor characterized in that an electrode on a semiconductor chip and a lead-out conductor arranged around the semiconductor chip are connected via an aluminum ball formed on the electrode. Device. 2. The semiconductor device according to claim 1, wherein the aluminum ball functions as a ball for wire bonding the aluminum wire. 2. The semiconductor device according to claim 1, wherein the round aluminum board/l/ functions as a bonding body for directly bonding the semiconductor chip to the lead-out conductor.
JP59036477A 1984-02-28 1984-02-28 Semiconductor device Pending JPS60182145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59036477A JPS60182145A (en) 1984-02-28 1984-02-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59036477A JPS60182145A (en) 1984-02-28 1984-02-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS60182145A true JPS60182145A (en) 1985-09-17

Family

ID=12470892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59036477A Pending JPS60182145A (en) 1984-02-28 1984-02-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS60182145A (en)

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