JPS60178543A - Interruption control system - Google Patents

Abstract

PURPOSE:To decrease the number of interruption equipment identification numbers, facilitate the extension of an I/O unit, and reduce hardware by allowing a monitor program to pass the right of execution to one of plural task programs according to an interruption from an interruption source and executing the program. CONSTITUTION:A task program is divided into groups previously and interruption equipment identification numbers are assigned to the respective groups. Then, a common interruption equipment identification number (a) is generated for interruptions from respective I/O units 1-(m). The interruption cntrol program of the monitor program performs control so that the right of execution is passed to respective task program 1-(m) successively for the interruption equipment identification number (a). Each task program when receiving the right of execution checks on the contents of the interruption register of the I/O unit which belongs to the program and decides whether an interruption factor is generated or not. When there is the interruption factor, the task program is executed to perform specific I/O processing, and when no, the right of execution is passed to a monitor.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an interrupt control method when a task program is executed under a processor or a monitor program, and particularly to an interrupt control method that reduces the number of interrupt lingers. Regarding.

[Conventional technology and problems]

In a computer system, a processor operates by executing a monitor program, and executes a task program under the control of the monitor to perform desired data processing.

In such a computer system, as shown in Figure 1, the main unit 1 has a processing request source 10 (input/output) unit 2.
Multiple 1~2rL are connected, ■10 units 21~2n
In response to an interrupt request, the task program of the main unit 1 or the I10 unit that received the interrupt is executed. The main body 1 includes a processor 10 that performs processing, a memory 11 that stores a monitor program, a task program for each I10 unit, etc., and an interrupt control section 12, and interrupt signals from each I10 unit 21 to 2FL are sent to the interrupt control section. 1
2, the interrupt controller 12 generates an interrupt linger for the corresponding task, and notifies the processor 10 of the interrupt. The processor 10 interrupts the task program currently being executed, executes the interrupt control program included in the monitor program, determines the requested task program from the interrupt residue, and executes the task program (I10 control program). , controls the requesting I10 unit.

That is, 1. In the conventional interrupt control system, as shown in FIG. 2, an interrupt residual value is assigned to each task, and an interrupt number is notified in response to an interrupt signal from the I10 unit.
The monitor determines this and controls the execution right to be passed to the task in question.

However, in such conventional methods, for each task, that is, I
Since interrupt lingering scent is required for every 10 units, if only a predetermined number of interrupt lingering scents can be set, it is not possible to add more I10 units, and furthermore, there is a problem in that it is not possible to connect more than 10 units. In addition, in order to set a large number of interrupt lingers, it is necessary to increase the number of registers, etc., which leads to an increase in the scale of the hardware, which causes an increase in costs.

[Purpose of the invention]

SUMMARY OF THE INVENTION The present invention provides an interrupt control system that can reduce the number of interrupt lingers, facilitate the addition of I10 units, and reduce hardware requirements.

[Structure of the invention]

To achieve the above object, the present invention includes a processor that executes a monitor program, a plurality of interrupt sources, and a memory storing a plurality of task programs for the interrupt sources, In response to this, the monitor program passes the execution right to one of the plurality of task programs to cause the processor to execute the task program, and also determines whether or not there is an interrupt factor for the corresponding interrupt source, and determines whether or not there is an interrupt factor. The present invention is characterized in that the task program returns the execution right to the monitor program after performing the corresponding processing, and the monitor program passes the execution right to the next task program.

Further, an embodiment of the present invention is characterized in that an interrupt lingering scent is notified as the interrupt, and the monitor program sequentially passes execution rights to a plurality of task programs corresponding to the interrupt lingering scent.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 3 is a diagram explaining the principle of the present invention. In the present invention, task programs (ie, I10 units) are divided into groups in advance, and interrupt residuals are assigned to each group. For example, task program 1-m for interrupt residual α
(I10 unit 1 to TIL) Task program (m+1) to 2 m (I10 unit m
+1~2m).

Then, a common interrupt residual α is generated in response to an interrupt from each i10 unit l-1-m, and the interrupt control program of the monitor program generates a common interrupt residual α for each task program in the corresponding group. Control is performed so that execution rights are sequentially passed to 1 to m. When each task program is given the execution right, it checks the contents of the interrupt register of the I10 unit belonging to it. It is determined whether an interrupt factor has occurred, and if there is an interrupt factor, a predetermined process (control of the I10 unit) is performed by executing a task program,
If there is no interrupt factor, the execution right is returned to the monitor program. When the execution right is returned, the monitor program passes the execution right to the next task program, and the task program performs the same process, repeating this for the number of task programs in the group, and then ends.

Therefore, as shown in FIG. 3, the monitor program sequentially passes the execution right to each task program lm in the group corresponding to the interrupt residual, and each task program checks the interrupt cause of its own I10 unit. It is designed to determine whether or not to execute it.

If the number m of task programs in this group is 2, it means that the interrupt residual signal is expanded twice, and the interrupt residual signal in this case has a meaning only as an interrupt signal, so there is no need to generate a residual signal. A simple interrupt signal is sufficient.

FIG. 4 is a block diagram of an embodiment of the present invention. In the figure, the same parts as in FIG. 14 is an interrupt controller, which is connected to each I10 unit) 21 to 2rL, and an interrupt register from the 10 units 21 to 2rL. This is to notify the processor 10 of an interrupt lingering scent in response to an interrupt signal having the contents of the interrupt lingering scent.In the case of the present invention, the interrupt lingering scent is generated in common to the I10 units in the same group.

Next, the operation of the embodiment shown in FIG. 4 will be explained based on the process flowcharts of FIGS. 5 and 6.

(2) First, it is assumed that the processor 10 executes a monitor program in the memory 11, executes a predetermined task program under its control, and controls the corresponding I10 unit.

■ For example, when an interrupt signal is generated from the I10 unit 21, the interrupt controller 14
1 is generated, and the processor 10 is notified of it.

(2) Since the processor 10 is under the control of the monitor program, it interrupts the task program being executed and starts the interrupt processing shown in FIG. That is, the processor 10 searches for the task program lm for the interrupt residual a. Since the task program name for each leftover scent is stored in advance in memory 1 as part of the monitor program, memory 11 is referred to to find the corresponding task program name 4.

(2) Next, the execution right is passed to the first task program of the task programs installed in the processor 10.

That is, the processor 10 executes the task program at the beginning of the memory 11.

■ As shown in Figure 6, the task program has an interrupt factor detection step added to it in addition to the normal execution program, and when it receives the execution right, the interrupt register of the I10 unit 1 corresponding to the processor IO or the task progera is sent to the task program. It operates to check the contents of. In this case I10
Since an interrupt has been generated from unit l-1, there is an interrupt factor, so the task program 1 is subsequently executed, and the I10 unit l is controlled by processor 0.

(2) On the other hand, if there is no interrupt factor, or if the execution of the task program ends, the task program returns the execution right to the monitor program.

■ Returning to FIG. 5, the monitor program checks whether the execution right has been returned, and when the execution right is returned, the processor passes the execution right to the next task program, and steps
Processing similar to (1) is performed. (1) In this manner, this is performed sequentially for the task programs in the group corresponding to the interrupt lingering, and the process ends. In this way, multiple sounds belonging to the same interruption lingering sound 1r 7hl + P 1 r 7hl + P 1 request - force 11.
＋: も#I The task is controlled so that each task checks the interrupt cause and if processing is necessary, it is executed, and if it is not necessary, the execution right is immediately returned to the monitor.

Although the present invention has been described above with reference to one embodiment, the present invention can be modified in various ways according to the spirit of the present invention, and these are not excluded from the present invention.

〔Effect of the invention〕

As described above, according to the present invention, the present invention includes a processor that executes a monitor program, a plurality of interrupt sources, and a memory that stores a plurality of task programs for the interrupt sources. In response to an interrupt, the monitor program passes the execution right to one of a plurality of task programs to cause the processor to execute the task program, and also determines whether or not there is an interrupt factor for the corresponding interrupt source, and determines whether or not there is an interrupt factor. After performing the corresponding processing, the task program returns the execution right to the monitor program,
The feature is that the monitor program executes and passes the information to the next task program, which has the effect of reducing the residual effect of interrupts. unit) can be connected, and the hardware can be reduced for the same number of interrupt sources as before. In addition, since it can be done by changing the program, it is easy and simple to implement, and is especially effective when applied to terminals and personal computers that combine printers, floppy disks, displays, etc. according to the user's requirements. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional interrupt control method, FIG. 2 is an explanatory diagram of a conventional interrupt control method, FIG. 3 is a detailed explanatory diagram of the present invention, and FIG. 4 is a block diagram of an embodiment of the present invention. Figure 5 is an interrupt processing flow diagram in the configuration shown in Figure 4, and Figure 6 is the interrupt processing flow diagram in the configuration shown in Figure 4.
It is a task processing flow diagram in a diagram configuration. In the figure, IO...processor, 11...memory, 14
... Interrupt controller, 21-2n... Input/output crab unit (interrupt source). Sai 1 Diagram 2 Diagram 3 Zucho 4 Diagram 7 5 Hi [-

Claims (2)

[Claims] (1) It has a processor that executes a monitor program, multiple interrupt sources, and a memory that stores multiple task programs for the interrupt sources, and the monitor program receives execution rights in response to an interrupt from the interrupt source. The task is passed to one of the plurality of task programs to cause the processor to execute the task program, determines whether or not there is an interrupt factor for the corresponding interrupt source, performs processing according to the presence or absence of the interrupt factor, and then executes the task program. An interrupt control method characterized in that a program returns the execution right to the monitor program, and the monitor program passes the execution right to the next task program. (2) A patent characterized in that a residual interrupt commonly assigned to a plurality of task programs is notified as the interrupt, and the monitor program sequentially passes execution rights to a plurality of task programs corresponding to the residual interrupt. An interrupt control method according to claim (1).