JPS60177627A - Formation of pattern - Google Patents

Formation of pattern

Info

Publication number
JPS60177627A
JPS60177627A JP3265884A JP3265884A JPS60177627A JP S60177627 A JPS60177627 A JP S60177627A JP 3265884 A JP3265884 A JP 3265884A JP 3265884 A JP3265884 A JP 3265884A JP S60177627 A JPS60177627 A JP S60177627A
Authority
JP
Japan
Prior art keywords
layer
pattern
substrate
density
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3265884A
Other languages
Japanese (ja)
Other versions
JPH0523049B2 (en
Inventor
Kazuyoshi Kamoshita
鴨志田 和良
Takahiro Makino
牧野 孝裕
Eiichi Yamamoto
栄一 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP3265884A priority Critical patent/JPS60177627A/en
Publication of JPS60177627A publication Critical patent/JPS60177627A/en
Publication of JPH0523049B2 publication Critical patent/JPH0523049B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To remove the influence of light reflected from a substrate, and to obtain a fine pattern of high precision by a method wherein exposure and development are performed according to light of 200-550nm wavelength through the light reflecting layer of an amorphous material mainly consisting of Si and having density of 1.9g/cm<3> or less. CONSTITUTION:A low density amorphous Si layer 2 is deposited to 0.2mum thickness in Ar gas of 12mTorr at the room temperature on a substrate 1 having an Al topmost layer according to the DC sputtering method, a resist 3 of 1mum thickness is put thereon, and exposure and development are performed to form a resist pattern. RIE according to SiCl4 gas is performed to etch the layer 2 and the substrate 1, and the resist 3 is removed. The amrophous Si layer of density of 1.9g/cm<3> or less can be obtained easily according to the DC sputtering method, and when the forming condition is selected, reflectivity becomes to 0.2 or less at the wavelength of 436nm to be used for the most part at an exposure process, becomes to 0.3 or less at the wavelength of 200nm, and the high absorption coefficiency of 10<5>/cm or more is obtained. Accordingly, a high precise and fine pattern can be formed even on the substrate of high reflectivity such as Al. Moreover a fine process according to RIE can be also performed in gas such as SiCl4, etc., and this method is convenient for formation of the pattern.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、半導体集積回路をはじめとする各種の固体デ
バイスの製造におけるパターン形成法に関するもので、
特に、基板からの反射光の影響を除去して高精度の微細
パターン形成を可能とすることを図ったものである。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a pattern forming method in the manufacture of various solid-state devices including semiconductor integrated circuits.
In particular, it is intended to eliminate the influence of reflected light from the substrate to enable highly accurate fine pattern formation.

〔発明の背景〕[Background of the invention]

光露光によるパターン形成において、レジスト直下の材
料がアルミニウムなどの反射率の高い材料である場合は
、レジスト中での光の干渉が著しいこと、さらに段差を
有する基板上のパターン形成においては隣接パターンか
らの側面反射が生じパターンの細まりという問題が生じ
るなど、微細パターン形成が困難である。そこで従来は
、レジスト直下層からの光反射を低減させるため、反射
率の低いチタン・タングステン、バナジウム、光吸収色
素を含んだ有機高分子膜、非晶質Ge−5e、非晶質シ
リコンなどから成る光反射低減層をまず被加工基板の面
上に形成し、この光反射低減層の上に光感光レジストを
形成する二層構成法が採用されてきた。
In pattern formation by light exposure, if the material directly under the resist is a highly reflective material such as aluminum, there will be significant light interference in the resist.Furthermore, in pattern formation on a substrate with steps, interference from adjacent patterns may occur. It is difficult to form fine patterns because side reflections occur and the pattern narrows. Conventionally, in order to reduce the light reflection from the layer directly under the resist, we used materials such as titanium/tungsten, vanadium, organic polymer films containing light-absorbing dyes, amorphous Ge-5e, and amorphous silicon, which have low reflectivity. A two-layer construction method has been adopted in which a light reflection reducing layer is first formed on the surface of a substrate to be processed, and a photosensitive resist is formed on this light reflection reducing layer.

しかし、光反射低減層に金属層を用いる方法では、金属
層と被加工基板層のエツチングを別々に行なう必要があ
ることから工程が複雑となる、工ッチング後の腐蝕現象
が生じやすい、などの問題点がある。光反射低減層に光
吸収色素を含んだ有機高分子膜を用いる方法は、形成後
のベーキング時間や温度に敏感であり再現性に乏しいと
いう問題がある。また、非晶質Ge−8eを用いる方法
は、空気に対する反射率は約0.3と低いが、プロセス
が複雑になるという問題がある。非晶質シリコンを用い
る方法は、汚染物質とならないこと、同時にエツチング
ができること、腐蝕が生じにくいなど、プロセスとの整
合性は良いが、通常の作成法では、単結晶シリコンの密
度(2,3)に近い高密度膜が形成され、反射率も波長
範囲550〜200nmで約0.4〜0.6と高いなど
、より低い反射率のシリコン系材料が光反射低減層とし
て要望されている。
However, with the method of using a metal layer as the light reflection reduction layer, the process is complicated because the metal layer and the substrate layer to be processed must be etched separately, and corrosion phenomena are likely to occur after etching. There is a problem. The method of using an organic polymer film containing a light-absorbing dye in the light reflection reducing layer has a problem in that it is sensitive to the baking time and temperature after formation and has poor reproducibility. Further, although the method using amorphous Ge-8e has a low reflectance to air of about 0.3, there is a problem in that the process becomes complicated. The method using amorphous silicon has good compatibility with the process, as it does not become a contaminant, can be etched at the same time, and is less prone to corrosion. ), and the reflectance is as high as about 0.4 to 0.6 in the wavelength range of 550 to 200 nm, and silicon-based materials with lower reflectance are desired as the light reflection reducing layer.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記要望に答えて、アルミニウムのよ
うな反射率の高い被加工基板の場合でも、基板からの反
射光の影響をほぼ完全に除去でき高精度の微細パターン
形成を可能とするパターン形成法を提供することにある
The purpose of the present invention is to meet the above-mentioned needs, and to make it possible to almost completely eliminate the influence of reflected light from the substrate, even when processing a substrate with high reflectance such as aluminum, and to form a fine pattern with high precision. The object of the present invention is to provide a pattern forming method.

〔発明の概要〕[Summary of the invention]

本発明の特徴は、上記目的を達成するために、基板面上
に有機高分子層を介しであるいは介さずに光反射低減層
を形成する工程と、この光反射低減層の上に光感光レジ
ストを形成する工程と、これに続く露光及び現像処理に
よりレジストパターンを形成する工程と、このレジスト
パターンをマスクとしてエツチングを行なう工程とを含
むパターン形成法において、露光に用いる光の波長範囲
が200nm〜550nmである場合の上記光反射低減
層として、シリコンを主成分とする密度1.9g/a+
?以下の非晶質材料を用いるパターン形成法とするにあ
る。
In order to achieve the above object, the present invention is characterized by a step of forming a light reflection reducing layer on a substrate surface with or without an organic polymer layer, and a process of forming a photoresist on the light reflection reducing layer. A pattern forming method including a step of forming a resist pattern, a step of forming a resist pattern by subsequent exposure and development treatment, and a step of etching using this resist pattern as a mask, the wavelength range of the light used for exposure is 200 nm to 200 nm. The light reflection reducing layer in the case of 550 nm has a density of 1.9 g/a+ mainly composed of silicon.
? The following is a pattern forming method using an amorphous material.

〔発明の実施例〕[Embodiments of the invention]

パターン形成時に用いる光反射低減層が具備すべき条件
は、光反射率が低く光吸収係数が大きく、かつ、微細加
工が可能であることである。シリコンを主成分とする密
度1.9g/cn?以下の非晶質材料(以下、低密度非
晶質シリコンと呼ぶ)は、上記の条件を全て満たし、か
つ、シリコンプロセスとの整合性も良く、室温で形成が
でき、簡単なプロセスで微細パターン形成が可能である
。低密度非晶質シリコンが低反射率であることを、非晶
質シリコン(密度2.2) 、非晶質G e S eと
比較して第1−図に示す。波長範囲が200〜550n
mの光に対して低密度非晶質シリコンは低い反射率を示
し、フォ1−リソグラフィで多用される波長436nm
においては、非晶質シリコン(密度2.2)の約1/2
、非晶質Ge−8eの約2/3であることがわかる。
The conditions that the light reflection reducing layer used during pattern formation must have are that it has a low light reflectance, a large light absorption coefficient, and is capable of microfabrication. Density 1.9g/cn, mainly composed of silicon? The following amorphous material (hereinafter referred to as low-density amorphous silicon) satisfies all of the above conditions, has good compatibility with silicon processes, can be formed at room temperature, and can be formed into fine patterns using a simple process. Formation is possible. The low reflectance of low-density amorphous silicon is shown in Figure 1 in comparison with amorphous silicon (density 2.2) and amorphous GeSe. Wavelength range is 200-550n
Low-density amorphous silicon exhibits a low reflectance for light at wavelengths of 436 nm, which is often used in photolithography.
is approximately 1/2 that of amorphous silicon (density 2.2).
, is about 2/3 that of amorphous Ge-8e.

第1図に示した密度1.9及び1.8の低密度非晶質シ
リコンは、いずれも波長436nmの光に対して105
印−”以上の吸収係数を有する。従って、アルミニウム
等の反射率の高い基板上でも基板からの反射光の影響を
ほぼ完全に除去することが可能で高精度パターン形成が
容易である。なお、密度をさらに低くすることにより、
さらに反射率の低いものは得られるが、実用的には、被
加工基板の反射率との関係から、採用する低密度非晶質
シリコン材料の密度を決めれば良い。低密度非晶質シリ
コンのエツチング法としては、CCD、4.5iCQ、
などを用いた反応性イオンエツチング法が適用でき、ア
ンダーカットを生じることなく高速エツチングすること
ができ、パターン変換差のないパターン形成が可能であ
る。
The low-density amorphous silicon with densities of 1.9 and 1.8 shown in Figure 1 both have 105
It has an absorption coefficient greater than or equal to "-". Therefore, even on a substrate with high reflectance such as aluminum, it is possible to almost completely eliminate the influence of reflected light from the substrate, making it easy to form a high-precision pattern. By further lowering the density,
Although it is possible to obtain a material with a lower reflectance, in practical terms, the density of the low-density amorphous silicon material to be employed may be determined based on the relationship with the reflectance of the substrate to be processed. Etching methods for low density amorphous silicon include CCD, 4.5iCQ,
A reactive ion etching method using, for example, etching can be applied, and high-speed etching can be performed without causing undercuts, and patterns can be formed without pattern conversion differences.

低密度非晶質シリコンの形成は直流スパッタリング法で
可能である。ターゲットと基板との距離が一定の時には
、アルゴン圧力を変化させることにより低密度非晶質シ
リコンの形成が可能である。
Formation of low-density amorphous silicon is possible by direct current sputtering. When the distance between the target and the substrate is constant, low density amorphous silicon can be formed by varying the argon pressure.

第1図の非晶質シリコン形成時のアルゴン圧力は、密度
2.2の非晶質シリコンは1.5mTorr、密度1.
9のものは5mTorr、密度−1,8のものは12m
Torrである。なお、直流電力は700Wでスパッタ
リングを行なった。ここで挙げた作成法は一例であり、
他の方法、例えばアルゴン以外のガスを用いる直流スパ
ッタリングあるいはRF(高周波)スパッタリングやプ
ラズマCVD (化学的気相析出)法、光CVD法を用
いて適切な形成条件を選ぶことにより、アルゴンを用い
る直流スパッタリングの場合と同様の低密度非晶質シリ
コン層を形成することができる。
The argon pressure during formation of the amorphous silicon shown in FIG. 1 is 1.5 mTorr for amorphous silicon with a density of 2.2;
9 is 5mTorr, density -1,8 is 12m
Torr. Note that sputtering was performed with a DC power of 700W. The creation method mentioned here is just an example.
Other methods, such as direct current sputtering using a gas other than argon, RF (radio frequency) sputtering, plasma CVD (chemical vapor deposition), or photo-CVD, can be used to create a direct current using argon. A low-density amorphous silicon layer similar to that obtained by sputtering can be formed.

次に、被加工基板上に低密度非晶質シリコン層を形成し
、その上に光感光レジスト層を形成する二層構成を採用
する場合のパターン形成の基本的工程を説明する。第2
図(a)〜(c)は、工程順を示す路線的断面図である
。まず、第2図(a)に示すように、被加工基板11例
えばアルミニウムが最上層として存在する被加工基板、
上に直流スパッタリング法により低密度非晶質シリコン
層2を室温、12mTorrのアルゴン圧力で0.2I
Irnの厚さに形成する。次に、光感光レジスト層3を
1.0岬の厚さに形成する。次に、図示されていないマ
スクパターンを介して露光、さらに現像処理を経て第2
図(b)のレジストパターンを形成する。
Next, the basic steps of pattern formation when a two-layer structure is adopted in which a low-density amorphous silicon layer is formed on a substrate to be processed and a photosensitive resist layer is formed thereon will be explained. Second
Figures (a) to (c) are linear sectional views showing the order of steps. First, as shown in FIG. 2(a), a substrate 11 to be processed, for example, a substrate to be processed in which aluminum is present as the top layer,
A low-density amorphous silicon layer 2 is deposited on top by direct current sputtering at room temperature and an argon pressure of 12 mTorr at 0.2I.
Formed to a thickness of Irn. Next, a photosensitive resist layer 3 is formed to a thickness of 1.0 cape. Next, the second film is exposed through a mask pattern (not shown), and then subjected to development processing.
A resist pattern shown in Figure (b) is formed.

次に、5iCQ4ガスの反応性イオンエツチングにより
低密度非晶質シリコン層2と被加工基板1を同時にエツ
チングし、第2図(c)に示すような、パターン変換差
のない基板パターン(アルミニウムが最上層に存在すれ
ばアルミニウムパターン)を形成できる。続いて、市販
のJ−100レジスト剥離液を用いて光感光レジスト層
3を剥離する。
Next, the low-density amorphous silicon layer 2 and the substrate 1 to be processed are simultaneously etched by reactive ion etching using 5iCQ4 gas, resulting in a substrate pattern with no difference in pattern conversion (aluminum If it exists in the top layer, an aluminum pattern) can be formed. Subsequently, the photosensitive resist layer 3 is stripped using a commercially available J-100 resist stripping solution.

残存する低密度非晶質シリコン層をも除去したい場合は
、さらにCF 4 + 02プラズマエツチングの工程
を加えれば良い。
If the remaining low-density amorphous silicon layer is also desired to be removed, a CF 4 + 02 plasma etching step may be added.

次に、被加工基板上に有機高分子層を形成し、その上に
低密度非晶質シリコン層を形成し、さらにその上に光感
光レジストを形成する三層構成を採用する場合のパター
ン形成の基本的工程を説明、する。第3図(a)〜(c
)は、工程順に示す路線的断面図である。まず、第3図
(a)に示すように、アルミニウムが最上層として存在
する被加工基板1上に有機高分子層2′を例えば2um
の厚さにスピンナーを用いて形成し、焼きしめを行なっ
た後、直流スパッタリング法により低密度非晶質シリコ
ン層2を室温、アルゴン圧力12 m ’T orrで
0.27mの厚さに形成し、さらに光感光レジスト層3
を例えば1.0岬の厚さに形成する。引き続き、露光装
置を用いて露光、さらに現像により、第3図(b)に示
すように、レジストパターンを形成する。次に、このレ
ジストパターンをマスクとして、5iCQ4ガスで低密
度非晶質シリコン層2をエツチングし、続いて02ガス
による反応性エツチングで有機高分子層2′をエツチン
グしてパター□ンを形成する〔第3図(C)〕。この時
、最上層のレジストパターンは、下層レジストエツチン
グ時に同時にエツチングされる。次に、低密度非晶質シ
リコン層2をCF4+02ガス中のプラズマエツチング
で除去する。さらに、被加工基板がアルミニウムの場合
は、下層レジストパターンをマスクにして、5iCQ4
ガスなどの反応性イオンエツチングにより微細なパター
ン形成ができる。最後に、J−100レジスト剥離液で
残存する有機高分子層を剥離する。
Next, pattern formation when adopting a three-layer structure in which an organic polymer layer is formed on the substrate to be processed, a low-density amorphous silicon layer is formed on top of that, and a photosensitive resist is further formed on top of that. Explain and explain the basic process. Figure 3(a)-(c)
) is a line cross-sectional view showing the steps in order. First, as shown in FIG. 3(a), an organic polymer layer 2' is deposited to a thickness of, for example, 2 um on a substrate 1 to be processed on which aluminum is present as the uppermost layer.
After baking and baking, a low-density amorphous silicon layer 2 was formed to a thickness of 0.27 m at room temperature and an argon pressure of 12 m' Torr by direct current sputtering. , and further a photosensitive resist layer 3
is formed to have a thickness of, for example, 1.0 cape. Subsequently, a resist pattern is formed by exposure using an exposure device and further development, as shown in FIG. 3(b). Next, using this resist pattern as a mask, the low-density amorphous silicon layer 2 is etched with 5iCQ4 gas, and then the organic polymer layer 2' is etched with reactive etching using 02 gas to form a pattern. [Figure 3 (C)]. At this time, the uppermost layer resist pattern is etched at the same time as the lower layer resist etching. Next, the low density amorphous silicon layer 2 is removed by plasma etching in CF4+02 gas. Furthermore, if the substrate to be processed is aluminum, using the lower resist pattern as a mask, 5iCQ4
Fine patterns can be formed using reactive ion etching such as gas. Finally, the remaining organic polymer layer is removed using J-100 resist removal solution.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は光反射低減層として低密
度非晶質シリコン層を採用することを特徴とするパター
ン形成法に関するもので、低密度非晶質シリコン制料の
特性に由来した以下に述べる多くの利点がある。低密度
非晶質シリコン材料は、直流スパッタリング法により室
温で容易に形r、I;−=(/七1り七、L1耳乙己)
久lIト犬−二卯セでマし1−上11にγ介謹處ゾ11
フォトリソグラフィで多用される波長’136nmの光
に対して0.2以下、波長200nmの光に対しても0
.3以下の低反射率、105■−1以上の高い光吸収係
数とすることができ、従ってアルミニウムのような反射
率の高い基板上でも本発明を適用することにより基板か
らの反射光の影響をほぼ完全に除去することができ高精
度の微細なパターン形成が可能である。また、CCD、
4や5iC11,などのガス中での反応性イオンエツチ
ングにより微細加工が可能であるとともに、従来のシリ
コンプロセスとの整合性もよく、簡便なパターン形成プ
ロセスとすることができる。
As explained above, the present invention relates to a pattern forming method characterized by employing a low-density amorphous silicon layer as a light reflection reducing layer. There are many benefits mentioned. Low-density amorphous silicon materials can be easily fabricated at room temperature by direct current sputtering.
Kuri Toinu - Two Use de Mashi 1 - Upper 11 and γ Kaikan Zo 11
0.2 or less for light with a wavelength of 136 nm, which is often used in photolithography, and 0 for light with a wavelength of 200 nm.
.. It is possible to achieve a low reflectance of 3 or less and a high light absorption coefficient of 105 -1 or more. Therefore, by applying the present invention to a substrate with a high reflectance such as aluminum, the influence of reflected light from the substrate can be reduced. It can be almost completely removed, making it possible to form fine patterns with high precision. Also, CCD,
Microfabrication is possible by reactive ion etching in a gas such as 4 or 5iC11, and it also has good compatibility with conventional silicon processes and can be a simple pattern forming process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はアルミニウム、非晶質シリコン(密度2.2)
 、非晶質Ge−8e及び低密度非晶質シリコン(密度
1.9以下)の光反射率の比較図、第2図及び第3図は
それぞれ本発明によるパターン形成法の基本工程を工程
順に示す路線的断面図である。 符号の説明 1・・・被加工基板 2・・・低密度非晶質シリコン層 2′・・・有機高分子層 3・・・光感光レジスト層特
許出願人 日本電信電話公社 代理人弁理士 中村 純之助 才1 図 追 五 体次) ′IP2図 第3図
Figure 1 shows aluminum and amorphous silicon (density 2.2)
, a comparison diagram of the light reflectance of amorphous Ge-8e and low-density amorphous silicon (density 1.9 or less), and FIGS. 2 and 3 respectively show the basic steps of the pattern forming method according to the present invention in order of process. FIG. Explanation of symbols 1...Substrate to be processed 2...Low density amorphous silicon layer 2'...Organic polymer layer 3...Photosensitive resist layer Patent applicant Nakamura, patent attorney representing Nippon Telegraph and Telephone Public Corporation Junnosuke Sai 1 Izuoi 5 Taiji) 'IP2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 基板面上に有機高分子層を介しであるいは介さずに光反
射低減層を形成する工程と、この光反射低減層の上に光
感光レジストを形成する工程と、これに続く露光及び現
像処理によりレジストパターンを形成する工程と、この
レジストパターンをマスクとしてエツチングを行なう工
程とを含むパターン形成法において、上記光反射低減層
がシリコンを主成分とする密度1.9g/a!以下の非
晶質材料から成り、上記露光に用いる光の波長範囲が2
00nm〜550nmであることを特徴とするパターン
形成法。
A process of forming a light reflection reducing layer on the substrate surface with or without an organic polymer layer, a process of forming a photosensitive resist on this light reflection reducing layer, and a subsequent exposure and development process. In a pattern forming method including a step of forming a resist pattern and a step of etching using the resist pattern as a mask, the light reflection reducing layer has a density of 1.9 g/a containing silicon as a main component! It is made of the following amorphous material, and the wavelength range of the light used for the exposure is 2.
A pattern forming method characterized in that the thickness is 00 nm to 550 nm.
JP3265884A 1984-02-24 1984-02-24 Formation of pattern Granted JPS60177627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3265884A JPS60177627A (en) 1984-02-24 1984-02-24 Formation of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3265884A JPS60177627A (en) 1984-02-24 1984-02-24 Formation of pattern

Publications (2)

Publication Number Publication Date
JPS60177627A true JPS60177627A (en) 1985-09-11
JPH0523049B2 JPH0523049B2 (en) 1993-03-31

Family

ID=12364961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3265884A Granted JPS60177627A (en) 1984-02-24 1984-02-24 Formation of pattern

Country Status (1)

Country Link
JP (1) JPS60177627A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011023710A (en) * 2009-06-19 2011-02-03 Semiconductor Energy Lab Co Ltd Method for manufacturing electric storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011023710A (en) * 2009-06-19 2011-02-03 Semiconductor Energy Lab Co Ltd Method for manufacturing electric storage device

Also Published As

Publication number Publication date
JPH0523049B2 (en) 1993-03-31

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