JPS60177387A - Large-scale integrated circuit for crt display - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] Industrial Field of Application The present invention generates a video signal for displaying so-called characters such as 9 numbers, 1 figure, etc. on a CRT screen, and also makes switching between these displays extremely efficient. The present invention relates to a large-scale integrated circuit for CR7 display that can be performed on a large scale.

Conventional configuration and its problems In order to display characters or patterns other than video signals on a TV screen, a launcher holds data such as display position, size, etc.

A method is known in which a microcomputer is used to control a CRT display LSI having a counter that performs counting in synchronization with a vertical synchronization signal and a horizontal synchronization signal. Using this type of method, for example, when changing the size of characters and figures for each line, the display area on the screen is determined for each line, as shown in the conceptual diagram in Figure 1 and the display diagram in Figure 2. It is necessary to output the good-pull signal in synchronization with the vertical synchronization signal and the horizontal synchronization signal.

In such cases, conventionally, the control microcomputer counts the number of reference clocks from the horizontal synchronization signal input by software, counts the number of horizontal synchronization signals from the vertical synchronization signal input, and then calculates By comparing the data in the RAM, an enable signal is generated for each row for a certain period of time.
Alternatively, an operation of outputting a disable signal is used.

There are the following problems when performing software counting from a microcomputer at Tokoguchi. First, a RAM for software counting and for holding the number of first and last horizontal synchronization signals that should output vertical enable signals.
Area is required.

Similarly, when outputting a horizontal enable signal, a RAM area for holding the number of clocks and a RAM area for software counting are required. Furthermore, the vertical synchronization signal, horizontal synchronization signal, and clock must be constantly monitored by the microcomputer program, which imposes restrictions on program creation and control operations. In order to output this enable signal, a vertical synchronization signal and a horizontal synchronization signal are required.

This requires a terminal for inputting the three clock signals and a terminal for outputting the positive and negative pull signals, which is extremely inconvenient as the number of input/output terminals that can be used for other purposes is limited.

OBJECTS OF THE INVENTION The present invention solves all of these problems and utilizes the fact that the CR7 display circuit has a built-in counter and RAM to control the character size of displayed characters and graphics for each line. The present invention provides a large-scale integrated circuit for a CRT display in which variable display clocks in the vertical and horizontal directions are output for each row by a memory and a simple control circuit that controls the memory.

Structure of the Invention In summary, the present invention includes a first memory that stores display data and screen control data for one screen, a second memory that stores characters, and a control circuit that controls these. a data memory section for displaying a character, and an output circuit section for using the data output from the data memory section as CR1 display data, and the data memory section has a circuit functional element for changing the display size of a character. This is a large-scale integrated circuit that variably divides the horizontal synchronization signal and oscillation clock according to data preset for each row in the second memory, and outputs an arbitrary horizontal display clock and vertical display clock. You can change the size of the characters for each line.

DESCRIPTION OF THE EMBODIMENTS FIG. 3 shows a circuit which is actually built into a large-scale integrated circuit for CRT display and which changes the size of five characters and graphics for each row.

Horizontal synchronization signal 1, data bus 2, horizontal display clock 3
, a vertical display clock 4, a clock generator 5, a vertical display clock generation counter 6, a horizontal display clock generation counter 7, a size RAM 8, and a row counter 9.

First, a character signal is written in advance into the size RAM 8 through a write address and write data through the data bus 2 using a control microcomputer. At this time, each write address corresponds to each row, and the write data corresponds to size data of each row. For example, if the write data is 2-bit data, four types of states (oo, ol, 1o, 11) are possible for one address of the size RAM 8.

That is, the size of each row can be programmed into four types depending on the value of the 2-bit data.

As described above, the size data for each row written in the size RAM 5 is read out by the row counter 9, and the read address is generated from the size data by the row counter 9.
Read out the contents of M8.

The row counter generates a read signal for the size RAM 5 by counting the vertical display clock 4 in hexadecimal.

The read size data becomes preset data for the vertical display clock generation counter 6 and the horizontal display clock generation counter 7. Vertical display clock generation counter 6
performs variable frequency division of the horizontal synchronizing signal 1 according to the preset data.

Similarly, the horizontal display clock generation counter also variably divides the clock from the clock generator 6.

The clock generator is composed of an oscillation circuit using a resistor and a capacitor, and generates a reference clock for a large-scale integrated circuit for CRT display.

Depending on the size data from the size RAM 8, the outputs of the counters 6 and 7 become the horizontal display clock 3 and the vertical display clock 4.

As described above, the size of characters and graphics on any line can be changed simply by changing the data in the built-in size RAM.

Effects of the Invention According to the present invention, control from a microcomputer can be performed by simply writing data to RAM, eliminating the need to monitor vertical synchronization signals, horizontal synchronization signals, and the clock of the clock generator. , you can change the size of any row. It is no longer necessary to use the RAM in the microcomputer, and the degree of freedom in programming increases.

[Brief explanation of the drawing]

Fig. 1 is a conceptual diagram showing the area displayed for each line, Fig. 2 is a display diagram showing the state when actual characters and background are displayed, and Fig. 3 is a circuit block diagram of an embodiment of the present invention. It is. 1...Horizontal synchronization signal, 2...Data bus, 3...Horizontal display clock, 4...Vertical display clock, 5...Clock Generator, 6.
...Vertical display clock generation counter, 7...
Horizontal display clock generation counter, 8... RAM for size, 9...4 line counter. Name of agent: Patent attorney Toshio Nakao (1st person)
Figure 2

Claims (1)

[Claims] a first memory that stores display data and screen control data for one screen; a second memory that stores characters;
A data memory section consisting of a control circuit that controls these and data output from the data memory section is
A large-scale integrated circuit for a CR7 display, comprising an output circuit section used as display data, and a circuit functional element for varying the display size of a character in the data memory section.