JPH0516716B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a counting circuit capable of counting input pulses and suspending input of the same pulses during a desired pulse counting period.

Conventional configuration and its problems In order to display characters or patterns other than video signals on a television (TV) screen, latches that hold data such as display position and size, vertical synchronization signals, and horizontal synchronization signals must be used. A configuration is known in which a microcomputer is used to control a CRT display LSI having a counter that performs synchronous counting.
At this time, as shown in FIG. 1, it is necessary to output an enable signal to a fixed portion of the image display position from a certain height to a certain height on the TV screen. For example, when displaying the date and time and title on a monitor screen during video recording, it is necessary to mask (disable signal) the date and time data in the signal sent to the video tape. In such cases, conventionally, a control microcomputer counts the number of horizontal synchronization signals from the vertical synchronization signal input, and compares it with preset data in the RAM in the microcomputer to generate my enable signal for a certain period of time. Alternatively, a control method is used in which a disable signal is output.

However, when selecting data using a microcomputer, there are the following problems. First, a RAM area is required to hold the number of first and last horizontal synchronization signals for which enable signals are to be output. Furthermore, the vertical synchronization signal and the horizontal synchronization signal must be constantly monitored by a microcomputer program, which imposes restrictions on program creation and control operations. In order to output this enable signal, a terminal for inputting two signals, a vertical synchronization signal and a horizontal synchronization signal, and a terminal for outputting the enable signal are required. The number of possible input/output terminals is reduced.

Purpose of the invention The present invention solves all of these problems,
Utilizing the fact that the CRT display circuit has a built-in counter, by adding a simple data latch, a comparison gate circuit, and an output latch, the counter can be reset by the first signal and counted by the second signal. This provides a counting circuit whose output is set only for a certain period of time.

Structure of the Invention To summarize, the present invention uses a gate circuit to compare a counter whose all bits are reset by a first signal and which performs counting by a second signal and the outputs of two types of data latches set in advance. This function sets the output latch in synchronization with the second signal from the time when the value of one data latch matches the value of the other data latch, and resets the output latch in synchronization with the second signal when the value matches the value of the other data latch. This is a counting circuit equipped with a counter circuit, which allows the output to be set only during a freely set fixed period of time, thereby avoiding an unnecessary increase in the number of input/output terminals in the control system.

DESCRIPTION OF THE EMBODIMENTS FIG. 2 is a block diagram of an enable signal generation circuit actually built into a CRT display LSI. Vertical synchronization signal 11, horizontal synchronization signal 12, horizontal synchronization signal counter 1, latch 2 for specifying enable signal rising position, latch 3 for specifying enable signal falling position, data bus 16, horizontal synchronization signal counter output 13, each latch output 14 , 15, a comparison gate circuit 4, an output latch 5, a set signal 17, a reset signal 18, and an enable signal 19. Next, the actual operation of the circuit will be explained.
First, data is set in advance in the latches 2 and 3 through the data bus 16 using a microcomputer. Latch 2 is set with the count value from the start of counting the vertical synchronization signal to the horizontal synchronization signal until the rise of the enable signal, and latch 3 is set with the count value from the start of counting the vertical synchronization signal to the horizontal synchronization signal until the fall of the enable signal. Set the count value. Horizontal synchronization signal counter 1 is reset by input of vertical synchronization signal 11, and horizontal synchronization signal 1
The count increases every time 2 is input. The comparison gate circuit 4 outputs a set signal 17 when the value of the horizontal synchronizing signal counter output 13 and the value of the output 14 of the enable signal rising position setting latch match, and the output enable signal 19 of the latch 5 rises. Furthermore, the horizontal synchronizing signal counter 1 continues counting, and when the value of the horizontal synchronizing signal counter output 13 and the value of the latch output 15 for setting the enable signal falling position match, the comparison gate circuit 4 outputs the reset signal 18, and the output latch is activated. The output enable signal 19 from 5 falls. The temporal relationship of this series of operations is shown in the timing diagram of FIG. 2
1 is the time when the horizontal synchronizing signal counter output and the latch output for setting the enable signal rising position coincide, and 22 is the time when the horizontal synchronizing signal counter output and the latch output for setting the enable signal falling position coincide.

As described above, by simply setting data in two latches, it is possible to output an enable signal or a disable signal to any vertical position on the TV screen.

Effects of the Invention According to the present invention, control from a microcomputer can be performed by simply writing data to the latch.
There is no need to monitor the vertical synchronization signal or the horizontal synchronization signal, and the enable signal or disable signal can be output during any vertical position on the TV screen according to the program data. It also eliminates the need to use the RAM in the microcomputer, increasing the degree of freedom in programming. Furthermore, by using the horizontal synchronization signal counter in common, it is possible to easily output a plurality of enable signals simply by adding latches.

[Brief explanation of drawings]

FIG. 1 is a pattern diagram showing the display state of a TV screen, FIG. 2 is a block diagram of a circuit according to an embodiment of the present invention, and FIG. 3 is a timing diagram of a circuit according to an embodiment of the present invention. 1...Horizontal synchronization signal counter, 2...Latch for setting enable signal rise position, 3...Latch for setting enable signal fall position, 4...Comparison gate circuit, 5...Output latch, 11...Vertical synchronization Signal, 12...Horizontal synchronization signal, 13...Horizontal synchronization signal counter output, 14...Latch output, 15...
...Latch output, 16...Data bus, 17...Set signal, 18...Reset signal, 19...Enable signal.

Claims (1)

[Claims] 1 A counter that is reset by a first signal and counts a second signal, a latch that holds two types of count values, and a comparison between the output of the counter and the output of the first latch or the output of the second latch. A counting circuit comprising: a gate circuit that outputs an output in synchronization with the second signal when the two signals match, and an output latch that is set and reset by the output of the gate circuit.