JPS6016491A - Wired substrate for electronic circuit - Google Patents
Wired substrate for electronic circuitInfo
- Publication number
- JPS6016491A JPS6016491A JP12338083A JP12338083A JPS6016491A JP S6016491 A JPS6016491 A JP S6016491A JP 12338083 A JP12338083 A JP 12338083A JP 12338083 A JP12338083 A JP 12338083A JP S6016491 A JPS6016491 A JP S6016491A
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- substrate
- present
- base material
- components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の利用９分野〕
本発明は電子回路用布線基板に係り、特に、高速ＬＳＩ
を高密度に実装するに好適な電子回路用布線基板に関す
る。DETAILED DESCRIPTION OF THE INVENTION [9 Fields of Application of the Invention] The present invention relates to a wiring board for electronic circuits, particularly for high-speed LSI
The present invention relates to a wiring board for electronic circuits suitable for high-density packaging.
従来の電子回路用布線基板は、高速ＬＳＩのリードレス
セラミックパッケージを面付は実装出来るものとして、
ケブラーエポキシを基材とする有機プリント板と、セラ
ミックを基材とする多層セラミック基板とがあるが・前
者は熱伝導率が低く・高速ＬＳＩの発熱を充分に冷却す
ることが出来ない。又、後者は焼結時の収縮が大きく、
反りが発生するため、大型基板の製作が難しく、大規模
高密度実装が出来ないという欠点がある。又、前者も、
後者も、回路パターン作成のため・ネガが必要であシ、
多品種小量生産に対しては、イニンヤルコストが高いと
いう欠点がある。Conventional wiring boards for electronic circuits are designed to be able to mount high-speed LSI leadless ceramic packages.
There are organic printed boards made of Kevlar epoxy as a base material and multilayer ceramic boards made of ceramic as a base material, but the former has low thermal conductivity and cannot sufficiently cool the heat generated by high-speed LSIs. In addition, the latter has a large shrinkage during sintering,
Since warping occurs, it is difficult to manufacture large substrates, and large-scale, high-density mounting is not possible. Also, the former
The latter also requires a negative to create a circuit pattern,
The disadvantage of high-mix, low-volume production is high initial costs.
本発明の目的は、高速ＬＳＩのセラミックＩＪ−ドレス
パッケージとほぼ熱膨張率の等しい高熱伝導率の基板を
マルチワイヤ布線回路の基板として用いることにより・
大規模高密度実装を行い得る電子回路用布線基板を提供
するにある。An object of the present invention is to use a high thermal conductivity substrate with almost the same coefficient of thermal expansion as a ceramic IJ-dress package of a high-speed LSI as a substrate of a multi-wire wiring circuit.
An object of the present invention is to provide a wiring board for electronic circuits that can be mounted on a large scale and with high density.
本発明は、従来のプリント板（ガラス−エポキシ）では
約３０ｍｍ角のリードレスセラミックパッケージをはん
だで面付けを行なうと一５５′ｃ〜１２５℃のヒートサ
イクル条件で５０サイクルではんだ接続部にクラックが
発生することを確認し。The present invention shows that when a conventional printed board (glass-epoxy) is soldered to an approximately 30 mm square leadless ceramic package, the solder joints crack after 50 cycles under heat cycle conditions of -55'C to 125C. Confirm that this occurs.
このヒートサイクルによるはんだ付は部の寿命を長くす
る手段として、コパールや４２７０イ等・はぼ、セラミ
ックと熱膨張係数が等しく（５，１〜７．４ ｘ １０
−’／ ’ｃ ） 、熱伝導率が大きい（０，０４ｃａ
ｌ ／Ｃ１ｎ、 ｓｅｅ 、 ′ｃ）材料を基材として
１両面にマルチワイヤを布線、独立に回路構成するよう
にしたものである。Soldering using this heat cycle is a means of prolonging the life of parts, such as copal, 4270I, etc., and ceramics, which have the same coefficient of thermal expansion (5.1 to 7.4 x 10
-'/'c), high thermal conductivity (0.04ca
1/C1n,see,'c) material is used as a base material, and multi-wires are wired on one side to form an independent circuit.
第１図に示すように、熱伝導のよい、低熱膨張の基材１
（１）の両面に未硬化の状態ＣＢステージ）で薄いプリ
プレーグ２に貼り付けた銅箔を基材に接着し、エツチン
グした下部の銅パターン３を設け（２）・その上に樹脂
コートして・極細のマルチワイヤ４をＣＡＤ情報によっ
て布線する（３）。その後・ワルチワイヤを表面からエ
ンドミル等で切断、露出させメッキを行なって基板表面
に面付は用パッド５を形成する（４）。出来上った基板
に、セラミックのリードレスパッケージ６をはんだ７で
面付は接続を行なう（５）。As shown in Figure 1, a base material 1 with good thermal conductivity and low thermal expansion.
On both sides of (1), the copper foil pasted on the thin prepreg 2 in an uncured state (CB stage) is adhered to the base material, and the etched lower copper pattern 3 is provided (2). - Wire the ultra-thin multi-wire 4 using CAD information (3). Thereafter, the Walch wire is cut from the surface with an end mill or the like, exposed, and plated to form a pad 5 for surface mounting on the substrate surface (4). A ceramic leadless package 6 is surface-mounted and connected to the completed board using solder 7 (5).
本発明はマルチワイヤ布線回路が薄く、且つ、高密度配
線（従来多層プリント板の８〜１０層分）が可能なため
、高速ＬＳＩ等の面付は部品からの熱を基材へ伝導し、
基板から効率よく外部へ放熱出来る。又、熱膨張係数が
、厚みの大半を占める基板で押えられ、それが面付はパ
ッケージのそれと近いため、ヒートサイクルによるはん
だ何部寿命が非常に長いという効果がある。In the present invention, the multi-wire wiring circuit is thin and high-density wiring (8 to 10 layers of conventional multilayer printed circuit boards) is possible, so when mounting high-speed LSI etc., heat from the components is conducted to the base material. ,
Heat can be efficiently dissipated from the board to the outside. In addition, the coefficient of thermal expansion is suppressed by the substrate, which accounts for most of the thickness, and the surface mounting is close to that of the package, so there is an effect that the life of the solder part due to heat cycles is extremely long.
特に、基板の両面に独立に回路を設けることにより、暴
利の厚みを自由に選べ、最も熱に厳しい場合、基材の中
に冷却水を通すことも可能となる。In particular, by providing circuits independently on both sides of the substrate, the thickness of the substrate can be freely selected, and in the case of the most severe heat resistance, it is also possible to pass cooling water through the substrate.
第２図は本発明の他の実施例を示すもので、第１図と異
なるのは、基板の片側の面のみで回路実装を構成してい
る。この実施例ではさらに、基羽の実装されてない面を
他のヒートシンクに押しつけることが出来、基板から外
部への放熱がやり易くなる。FIG. 2 shows another embodiment of the present invention, which differs from FIG. 1 in that the circuit is mounted only on one side of the board. Furthermore, in this embodiment, the unmounted surface of the base wing can be pressed against another heat sink, making it easier to dissipate heat from the board to the outside.
本発明によれば、高速ＬＳＩ等の高放熱、高集積回路の
パッケージを回路板に面付は接続して高効率冷却を行な
えるため、電子回路が高集積化。According to the present invention, high heat dissipation, high integration circuit packages such as high-speed LSIs can be surface-mounted and connected to circuit boards for highly efficient cooling, resulting in highly integrated electronic circuits.
高信頼性化となる効果がある。This has the effect of increasing reliability.
第１図は本発明の基板の製作プロセスの説明図・第２図
は本発明の変形例の断面図である。
ｌ・・・晶相、２・・・プリプレーグ、３・・・銅パタ
ーン。
４・・・マルチワイヤ、５・・・面付は用パッド、６・
・・す第１０
第２０FIG. 1 is an explanatory diagram of the manufacturing process of a substrate according to the present invention, and FIG. 2 is a sectional view of a modified example of the present invention. l...Crystal phase, 2...Prepreg, 3...Copper pattern. 4...Multi wire, 5...Pad for surface mounting, 6...
...Su 10th 20th
Claims (1)
ち、前記面付は部品からの発熱を効率よく伝導する材料
を用いたことを特徴とする電子回路用布線基板。[Scope of Claims] 1. In an electronic circuit wiring board on which components are mounted, the surface mounting as a base material has a coefficient of thermal expansion approximately equal to that of the components, and the surface mounting efficiently dissipates heat from the components. A wiring board for electronic circuits characterized by using a conductive material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12338083A JPS6016491A (en) | 1983-07-08 | 1983-07-08 | Wired substrate for electronic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12338083A JPS6016491A (en) | 1983-07-08 | 1983-07-08 | Wired substrate for electronic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6016491A true JPS6016491A (en) | 1985-01-28 |
Family
ID=14859144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12338083A Pending JPS6016491A (en) | 1983-07-08 | 1983-07-08 | Wired substrate for electronic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6016491A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6292495A (en) * | 1985-09-13 | 1987-04-27 | アドバンスト インターコネクション テクノロジー インコーポレイテッド | Manufacture of substrate for mutual connection of electronic parts and product manufactured by that method |
-
1983
- 1983-07-08 JP JP12338083A patent/JPS6016491A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6292495A (en) * | 1985-09-13 | 1987-04-27 | アドバンスト インターコネクション テクノロジー インコーポレイテッド | Manufacture of substrate for mutual connection of electronic parts and product manufactured by that method |
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