JPS60163831U - Slope signal generation circuit - Google Patents

Slope signal generation circuit

Info

Publication number
JPS60163831U
JPS60163831U JP5117684U JP5117684U JPS60163831U JP S60163831 U JPS60163831 U JP S60163831U JP 5117684 U JP5117684 U JP 5117684U JP 5117684 U JP5117684 U JP 5117684U JP S60163831 U JPS60163831 U JP S60163831U
Authority
JP
Japan
Prior art keywords
output data
slope
signal generation
generation circuit
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5117684U
Other languages
Japanese (ja)
Inventor
寛 大川
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP5117684U priority Critical patent/JPS60163831U/en
Publication of JPS60163831U publication Critical patent/JPS60163831U/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Studio Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による傾斜信号発生回路の一実施例を示
すブロック図、第2図はソフトワイプキー信号を示す信
号波形図、第3図は第1図の各部の信号を示す信号波形
図、第4図は第1図の傾斜信号発生回路をHDディジタ
ルスイッチヤニ適用した場合の構成を示すブロック図、
第5図はその各部の信号を示す信号波形図、第6図は第
1図によって得ることができる傾斜信号を示す信号波形
図である。 1・・・・・・差分データ発生回路、2A〜2D・・間
第1〜第4系列処理回路、3,13,16・・・・・・
乗算回路、5. 11. 14. 17・・・・・・加
算回路、6゜7.12,15,18・・・・・・ラッチ
回路。
FIG. 1 is a block diagram showing one embodiment of the slope signal generation circuit according to the present invention, FIG. 2 is a signal waveform diagram showing a soft wipe key signal, and FIG. 3 is a signal waveform diagram showing signals of each part of FIG. 1. , FIG. 4 is a block diagram showing the configuration when the slope signal generation circuit of FIG. 1 is applied to an HD digital switch,
FIG. 5 is a signal waveform diagram showing the signals of each part, and FIG. 6 is a signal waveform diagram showing the slope signal that can be obtained from FIG. 1...Difference data generation circuit, 2A to 2D...1st to 4th series processing circuit, 3, 13, 16...
Multiplication circuit, 5. 11. 14. 17... Addition circuit, 6°7.12, 15, 18... Latch circuit.

Claims (1)

【実用新案登録請求の範囲】 傾斜速度を決める基本差分データ令累算してn相の傾斜
出力データでなる傾斜信号を送出する傾斜信号発生回路
において、 上記基本差分データをそれぞれ1,2・・・(n −1
)、1倍した乗算出力データを得る乗算回路と、 上記1倍した乗算出力データを累算して当該累算出力を
第1相の傾斜出力データとして送出する累算回路と、 上記累算回路の累算出力を上記1,2・・・(n −1
)倍した乗算出力データと加算して第2相、第3相・・
・第1組の傾斜出力データとして送出する加算回路と、 を具えることを特徴とする傾斜信号発生回路。
[Claim for Utility Model Registration] In a slope signal generation circuit that accumulates basic difference data that determines the slope speed and sends out a slope signal consisting of n-phase slope output data, the basic difference data is 1, 2, . . .・(n −1
), a multiplication circuit that obtains multiplication output data multiplied by 1; an accumulation circuit that accumulates the multiplication output data multiplied by 1 and sends out the accumulated output as first phase slope output data; The cumulative output of 1, 2...(n -1
) is added to the multiplied output data and the second phase, third phase...
- An inclination signal generation circuit comprising: an adder circuit that sends out as a first set of inclination output data;
JP5117684U 1984-04-07 1984-04-07 Slope signal generation circuit Pending JPS60163831U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5117684U JPS60163831U (en) 1984-04-07 1984-04-07 Slope signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5117684U JPS60163831U (en) 1984-04-07 1984-04-07 Slope signal generation circuit

Publications (1)

Publication Number Publication Date
JPS60163831U true JPS60163831U (en) 1985-10-31

Family

ID=30569981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5117684U Pending JPS60163831U (en) 1984-04-07 1984-04-07 Slope signal generation circuit

Country Status (1)

Country Link
JP (1) JPS60163831U (en)

Similar Documents

Publication Publication Date Title
JPS60163831U (en) Slope signal generation circuit
JPS6128070U (en) digital frequency phase comparator
JPS60139377U (en) Video signal mix circuit
JPS6146485U (en) Radar equipment exciter
JPS6356430U (en)
JPS6355687U (en)
JPS6082845U (en) Digital temperature compensated crystal oscillator noise reduction circuit
JPS6114531U (en) Charge transfer delay circuit
JPS5854149U (en) FM stereo tuner
JPS6114534U (en) timer circuit
JPS5816932U (en) pulse delay circuit
JPS6025281U (en) mixing circuit
JPS6095737U (en) Clock frequency multiplier circuit
JPS6022044U (en) FM receiver multipath noise suppression device
JPS6059632U (en) phase comparator
JPS5882039U (en) phase comparison circuit
JPH0268584U (en)
JPS6025280U (en) Video signal processing circuit
JPS60167442U (en) Digital-analog conversion circuit
JPS58172247U (en) Stereo/monaural switching circuit of stereo receiver
JPS58164381U (en) Delay line for comb filter
JPS58129738U (en) delay circuit
JPS59168798U (en) audio tone effect device
JPH02116175U (en)
JPS6157751U (en)