JPS60143650A - Heat sink device - Google Patents

Heat sink device

Info

Publication number
JPS60143650A
JPS60143650A JP25128883A JP25128883A JPS60143650A JP S60143650 A JPS60143650 A JP S60143650A JP 25128883 A JP25128883 A JP 25128883A JP 25128883 A JP25128883 A JP 25128883A JP S60143650 A JPS60143650 A JP S60143650A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit element
heat
metal plate
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25128883A
Other languages
Japanese (ja)
Inventor
Susumu Saito
進 斉藤
Nobuaki Kajiura
梶浦 信昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP25128883A priority Critical patent/JPS60143650A/en
Publication of JPS60143650A publication Critical patent/JPS60143650A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To enable to improve the heat-dissipating effect of an integrated circuit element and to miniaturize the integrated circuit element by a method wherein a heat-sink is fixed on the surface of a resin molding package, where falls on the opposite side to the back surface of the package mutually opposing to the wiring substrate of the integrated circuit element, using an adhesive. CONSTITUTION:A metal plate 6 of aluminum, etc., having an excellent thermal conductivity is pasted together on the surface of a resin molding package 2, where falls on the opposite side to the back surface of the package 2 mutually opposing to the wiring substrate 4 of an integrated circuit element, using an adhesive 5. I is desirable that the size of this metal plate 6 is nearly equal to the pasting face of the integrated circuit element. By pasting directly the metal plate 6 on the integrated circuit element in such a way, the heat of the integrated circuit element is induced so as to dissipate through the metal plate 6. As a result, the temperature distribution of the integrated circuit element can be equalized and the temperature rise of a chip 1 in the resin molding package 2 can be suppressed.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、テレビジョン受像機等の電子機器に使用され
る集積回路素子の放熱装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a heat dissipation device for integrated circuit elements used in electronic equipment such as television receivers.

従来例の構成とその問題点 一般的に集積回路素子は、チップを樹脂モールドし、端
子を樹脂モールド外装体の外部に出しだ形状をしている
。特に、高電力を消費するものはチップと接続した金属
電極を樹脂モールド外装体の表面に露出せしめ、放熱板
等に取付けてテ、ノブの温度上昇を防止するようにして
いる。
Conventional Structures and Problems Generally, an integrated circuit element has a chip molded in resin, with terminals protruding from the resin molded exterior. In particular, for devices that consume high power, the metal electrode connected to the chip is exposed on the surface of the resin molded exterior body and attached to a heat sink or the like to prevent the temperature of the knob from rising.

一方、近年、捷すまず高密度実装化が進む中で2 \ 
On the other hand, in recent years, as high-density packaging is rapidly progressing, 2
.

集積回路素子のサイズも益々小形化の傾向にある。The size of integrated circuit devices is also becoming smaller and smaller.

しかるに、小形化していくと熱放散性が次第に悪くなり
、使用電力の比較的高いチップでは使用可能な温度を越
えてしまうことがあり、特に金属電極を露出させない形
態のものでは小形化に限界が生じるものであっだ。
However, as chips become smaller, their heat dissipation performance gradually deteriorates, and chips that consume relatively high power may exceed their usable temperature, and there is a limit to miniaturization, especially for chips that do not expose metal electrodes. It's something that happens.

第1図は従来の大形集積回路素子の配線基板への取付は
状態と表面温度の分布状態を示すものである。ここで1
はチップ、2は樹脂モールド外装体、3はリード端子、
4は配線基板である。温度分布図より明らか々ようにチ
ップ部分の温度が最も高く、チップ部分より遠ざかるに
したがい表面温度は低下してくるが、温度上昇を防止す
る手段は採られていない。また、第2図は小形のDIL
形集積回路素子の配線基板への取付は状態とその表面温
度の分布状態を示すものである。この場合小形化にとも
ない、チップ部分の温度が局部的に極めて高くなり、上
記したように限界温度を越えてしまい、集積回路素子の
劣化を招くものであった。
FIG. 1 shows the state of attachment of a conventional large integrated circuit element to a wiring board and the distribution of surface temperature. Here 1
is the chip, 2 is the resin molded exterior body, 3 is the lead terminal,
4 is a wiring board. As is clear from the temperature distribution diagram, the temperature at the chip portion is the highest, and the surface temperature decreases as the distance from the chip portion increases, but no means have been taken to prevent the temperature from rising. Also, Figure 2 shows a small DIL
The mounting of a shaped integrated circuit element on a wiring board indicates its condition and its surface temperature distribution. In this case, as miniaturization occurs, the temperature of the chip portion locally becomes extremely high, exceeding the temperature limit as described above, leading to deterioration of the integrated circuit element.

3 ゛・ 発明の目的 本発明は、上記従来の問題点を解決するものであり、集
積回路素子の放熱が十分に行え、集積回路素子のより小
形化が可能な手段を提供することを目的とする。
3. Purpose of the Invention The present invention solves the above-mentioned conventional problems, and aims to provide a means that can sufficiently dissipate heat from an integrated circuit element and further reduce the size of the integrated circuit element. do.

発明の構成 本発明は、集積回路素子の配線基板と相対向する面と反
対側の面に粘着剤を用いてアルミニウム等の放熱効果の
高い金属板を貼り合わせようとするものであり、特にリ
フロー炉まだはディップ半田槽に配線基板を通す前に、
集積回路素子の一面に放熱板を貼り付けておき、この放
熱板を貼り付けた集積回路素子を配線基板に載置してリ
フロー炉あるいはディップ半田層に配線基板を通して集
積回路素子の配線基板への半田付けを行うと、上記粘着
剤が溶融して放熱板の集積回路素子への取付けがより強
固となり、より良好な放熱が行えるものとなる。
Structure of the Invention The present invention attempts to bond a metal plate with high heat dissipation effect, such as aluminum, to the surface of an integrated circuit element facing the wiring board and the opposite surface using an adhesive. Before passing the wiring board through the dip solder bath in the furnace,
A heat sink is attached to one side of the integrated circuit element, the integrated circuit element with the heat sink attached is placed on a wiring board, and the integrated circuit element is passed through a reflow oven or a dip solder layer to the wiring board. When soldering is performed, the adhesive melts and the heat sink is more firmly attached to the integrated circuit element, allowing better heat radiation.

実施例の説明 以下、本発明の一実施例の放熱装置を、第3図〜第5図
を用いて説明する。
DESCRIPTION OF EMBODIMENTS A heat dissipation device according to an embodiment of the present invention will be described below with reference to FIGS. 3 to 5.

第3図において、1はチップ、2は樹脂モールド外装体
、3はリード端子であり、これらは第1図、第2図と同
様である。第3図では、ざらに樹脂モールド外装体2の
表面に粘着剤5、たとえば粘着テープを用いてアルミニ
ウム等の熱伝導性の良好な金属板6を貼り付ける。この
金属板6の大きさは、集積回路素子の貼付面とほぼ同等
の大きさが好ましい。このように集積回路素子に直接、
金属板6を貼り付けることにより集積回路素子の熱は金
属板6を通して放散されるようになり、集積回路素子の
より小形化が可能となる。
In FIG. 3, 1 is a chip, 2 is a resin molded exterior body, and 3 is a lead terminal, which are the same as in FIGS. 1 and 2. In FIG. 3, a metal plate 6 made of aluminum or the like having good thermal conductivity is roughly attached to the surface of the resin molded exterior body 2 using an adhesive 5, for example, an adhesive tape. The size of this metal plate 6 is preferably approximately the same as the surface to which the integrated circuit element is attached. In this way, directly on the integrated circuit element,
By attaching the metal plate 6, the heat of the integrated circuit element is dissipated through the metal plate 6, and the integrated circuit element can be made more compact.

まだ、このように金属板6を貼り付けた集積回路素子を
配線基板に半田付けすべく、配線基板をリフロー炉ある
いはディップ半田槽に通すことこより、その熱で上記粘
着剤5が溶融し、さらにその接着性が向上するものであ
り、まだ粘着剤5の流動により、金属板6および樹脂モ
ールド外装体2との界面に熱伝導をさ捷だける空隙がな
くなってくるだめ、樹脂モールド外装体2からの熱が金
載板6に、より効率よく伝わるようになり、放熱効果が
一層向上する。寸だ、上記金属板6ば、配線基板をリフ
ロー炉に通すとき、熱の反射体として働らき、熱が直接
、樹脂モールド外装体2に当るのを防止し、樹脂モール
ド外装体2の熱による劣化を防止する作用ももつ。
In order to solder the integrated circuit element to which the metal plate 6 is attached in this way, the wiring board is passed through a reflow oven or a dip soldering tank, so that the adhesive 5 is melted by the heat, and further This improves the adhesion, and since the adhesive 5 still flows, there are no gaps that can prevent heat conduction at the interface between the metal plate 6 and the resin molded exterior body 2. The heat from the metal plate 6 can be transmitted more efficiently to the metal mounting plate 6, and the heat dissipation effect can be further improved. In fact, when the wiring board is passed through a reflow oven, the metal plate 6 acts as a heat reflector, preventing the heat from directly hitting the resin mold exterior body 2, and preventing the heat from the resin mold exterior body 2 from directly hitting the resin mold exterior body 2. It also has the effect of preventing deterioration.

第4図に上記集積回路素子を配線基板4に半田付けした
状態を、また第5図に上記集積回路素子の温度分布特性
をおのおの示す。第6図より明らかなように第3図の集
積回路素子によれば局部的なピークをなくすことができ
て温度分布を均一化することができ、樹脂モールド外装
体2内のテップ1の温度上昇を抑えることができるもの
である。
FIG. 4 shows the integrated circuit element soldered to the wiring board 4, and FIG. 5 shows the temperature distribution characteristics of the integrated circuit element. As is clear from FIG. 6, according to the integrated circuit element shown in FIG. 3, local peaks can be eliminated and the temperature distribution can be made uniform. can be suppressed.

発明の効果 以上のように、本発明によれば、集積回路素子の配線基
板と相対向する面と反対側の面に粘着剤を用いて放熱板
を固定することより、集積回路素子の放熱効果を良好な
ものとすることができ、集積回路素子のより小形化が可
能となる。寸だ、放熱板を固定した集積回路素子を配線
基板への半田付けのだめにリフロー炉あるいはディップ
半田槽に通すことにより、上記粘着剤が溶融して接着性
がより高するとともに熱伝導性もさらに良好となり、放
熱効果がさらに高まるものである。きらに、集積回路素
子の半田付は時における熱に対して放熱板が熱反射板と
なり、熱が樹脂モールド外装体に直接、当って樹脂モー
ルド外装体を劣化させるといったことがないものである
Effects of the Invention As described above, according to the present invention, the heat dissipation effect of the integrated circuit element can be improved by fixing the heat dissipation plate using an adhesive to the surface opposite to the surface of the integrated circuit element that faces the wiring board. Therefore, it is possible to make the integrated circuit element more compact. By passing the integrated circuit element with the heat sink fixed to it through a reflow oven or dip soldering bath before soldering it to the wiring board, the adhesive melts, making it even more adhesive and improving its thermal conductivity. This results in better heat dissipation, and the heat dissipation effect is further enhanced. Additionally, when soldering integrated circuit elements, the heat sink serves as a heat reflector for the heat generated during soldering, and the heat does not directly hit the resin molded exterior body and cause the resin molded exterior body to deteriorate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図はおのおの従来例の集積回路素子の構成
と温度分布特性を示す図、第3図は本発明の一実施例に
おける放熱装置を採用した集積回路素子の斜視図、第4
図は同集積回路素子を配線基板に取付けだ状態の断面図
、第5図は温度分布特性を示す図である。 1・・・・・・チップ、2・・・・・樹脂モールド外装
体、3・・・・・・リード端子、5・・・・・・粘着剤
、6・・・・・・放熱板。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第3図 第2図 第4図
1 and 2 are diagrams showing the configuration and temperature distribution characteristics of conventional integrated circuit devices, respectively. FIG. 3 is a perspective view of an integrated circuit device employing a heat dissipation device according to an embodiment of the present invention, and FIG.
The figure is a sectional view of the integrated circuit element mounted on a wiring board, and FIG. 5 is a diagram showing temperature distribution characteristics. DESCRIPTION OF SYMBOLS 1... Chip, 2... Resin mold exterior body, 3... Lead terminal, 5... Adhesive, 6... Heat sink. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 3 Figure 2 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 集積回路素子の、配線基板と相対向する面と反対側の面
に、粘着剤を用いて放熱板を貼り合わせた放熱装置。
A heat dissipation device in which a heat dissipation plate is attached using an adhesive to the surface of an integrated circuit element opposite to the surface facing the wiring board.
JP25128883A 1983-12-29 1983-12-29 Heat sink device Pending JPS60143650A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25128883A JPS60143650A (en) 1983-12-29 1983-12-29 Heat sink device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25128883A JPS60143650A (en) 1983-12-29 1983-12-29 Heat sink device

Publications (1)

Publication Number Publication Date
JPS60143650A true JPS60143650A (en) 1985-07-29

Family

ID=17220571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25128883A Pending JPS60143650A (en) 1983-12-29 1983-12-29 Heat sink device

Country Status (1)

Country Link
JP (1) JPS60143650A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6576996B2 (en) * 1999-02-11 2003-06-10 International Business Machines Corporation Method for bonding heat sinks to overmolds and device formed thereby

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154054A (en) * 1983-02-23 1984-09-03 Hitachi Ltd Wire and semiconductor device using it

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154054A (en) * 1983-02-23 1984-09-03 Hitachi Ltd Wire and semiconductor device using it

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6576996B2 (en) * 1999-02-11 2003-06-10 International Business Machines Corporation Method for bonding heat sinks to overmolds and device formed thereby
US6719871B2 (en) * 1999-02-11 2004-04-13 International Business Machines Corporation Method for bonding heat sinks to overmolds and device formed thereby
US6770968B2 (en) 1999-02-11 2004-08-03 International Business Machines Corporation Method for bonding heat sinks to overmolds and device formed thereby

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