JPS60136841A - Storage control device - Google Patents

Abstract

PURPOSE:To control the busy state of a bank with simple constitution by forming a means for detecting overlap between a request bank group and a bank group in busy registration. CONSTITUTION:A block reading request sent from a storage control device 4 through an interface 101 is controlled by a request receiving circuit 10 so as to be checked at its bank busy every two banks (M=2) per cycle from bank ''0'' (A=0) and M-2 and A=0 are set up in a check register 11 at timing T=0. Since there is no using bank at the timing T=0 and T=1 in the shown example, ''0'' is set up in the bank number informtion N1-N4 of all the bank registeration register 21-24, so that no coincidence signal is outputted from the outputs of comparators 21-24. A storage access circuit 12 can send a reading request to the banks ''0'' and ''1'' through pathes 104, 105 at the succeeding timing T=2 and T=3 on the basis of address information 112 and bank information 113.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a device connected to a plurality of punctures which can each operate independently, and where one of the punctures or two of the punctures
a storage controller capable of simultaneously accessing the storage device; and a storage controller that generates one or more requests for punctures to the storage controller in order to access the storage device.
The present invention relates to the storage control device in a system having two or more processing devices.

In particular, it relates to puncture usage state management when multiple punctures are accessed within a certain period.

[Prior art]

In recent years, in the field of data processing, as the performance of processing devices has improved, there has been an increasing demand for a commensurate improvement in the throughput of storage devices. Although the storage capacity of storage devices is increasing year by year due to advances in semiconductor devices, improvements in cycle time to increase throughput have not yet been made.

Conventionally, in order to improve the through knot of a storage device, there have been methods such as increasing the amount of data that can be read and written simultaneously using a multi-byte configuration, and dividing the storage device into multiple punctures that can operate independently using a multiple-puncture configuration. Reduce the apparent cycle time.

In addition, methods have been taken to increase the number of parallel operation punctures through incremental access, thereby securing the throughput necessary for processing devices. Management of the usage status of each puncture in a multi-bank configuration is conventional.

When the number of banks is small, receiving the busy partner number directly from each punk is a way to access the non-busy punks, and when the number of banks increases somewhat, it is possible to have a busy flip flop so that it corresponds one-to-one with the punks. , set the flip-flop at the time of access and reset it after the puncture cycle time.

Punk access has been controlled in this busy flip-flop state. But in this way.

When attempting to realize a storage device with a high throughput that can simultaneously access a plurality of punctures and have a very large number of banks, there is a drawback that the puncture busy management requires multiple Mli- and the amount of hardware becomes large.

[Purpose of the invention]

An object of the present invention is to set a busy check period when managing the usage status (busy) of each puncture in a storage device that has a large number of punctures,
Even if the punk busy information of more than one punk set is treated as one and a different number of banks are accessed in each cycle,
By providing a means for detecting the overlap between the requested puncture pair and the plurality of puncture pairs registered as busy, it is possible to easily manage a large number of punctures with a small amount of hardware, thereby eliminating the above-mentioned drawbacks. An object of the present invention is to provide a storage control device with high throughput.

[Structure of the invention]

According to the invention.

A device comprising a plurality of independently operable punctures is connected to the storage device and connected to one of the punctures.

Or a storage control device that can access two or more of the punctures at the same time.

and one or more processing units that issue one or more requests for punctures to the storage controller in order to access the storage device.

At a predetermined cycle, a puncture to be processed within the one cycle is determined from J~1 punctures required by the request.

a request processing circuit that outputs puncture number information and puncture number information;

The used puncture information that is handled as being in the used state by the access in each cycle 1U is registered with the bank number information and the number of punctures information, and the registration period is guaranteed so that the puncture in the used state is not accessed again within the puncture cycle time of the puncture. and a bank registration register consisting of a number determined from the period and the puncture cycle time.

connected to each output of the bank registration register.

The puncture registration process uses the request puncture information from the request processing circuit as a common manual and individually detects whether or not the same puncture exists based on the usage state puncture information and the request puncture information registered in each bank registration register. With the same number of puncture detection circuits as registers.

Based on all the detection results of the puncture detection circuit.

and an access control circuit that controls access to the storage device.

At every predetermined cycle, it is detected whether or not all the punctures to be processed within the cycle are in use based on the puncture number information and the number of punctures.

There is obtained a storage control device characterized in that the puncture is accessed when all the punctures are not in use, and the puncture information is registered in one of the puncture registration registers.

〔Example〕

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a data processing system according to an embodiment of the present invention. The arithmetic processing device 1 shares the storage device 5 with other arithmetic processing devices 2 and input/output processing device 3 to perform data processing.

The arithmetic processing unit 1 uses the interface 101 to access the storage control unit 4 in order to access data to the storage unit 5.
send a request to. The interface 101 has the ability to transfer one word of data per machine cycle. Also,
The interface 102 has a transfer capacity of two words per machine cycle, and the interface 103 has a transfer capacity of one word per two machine cycles. The storage device 5 has three internal memory devices each capable of parallel operation.
Has 2 punctures and 4 access paths 104 to 10
7 is connected to the storage control device 4. As shown in FIG. 1, each access path 104 to 107 can access eight punctures in each of the corresponding units 5-1 to 5-4. Each path 104-107 has a transfer capacity of one word in two machine cycles, and each puncture requires a bank cycle time of nine machine cycles. Each puncture consists of 1 word x n, and addresses in the storage device 5 are assigned in the order of the puncture number. Each puncture is given an address on a 32-word boundary, and the selection of punctures is made within the 32-word boundary. It is carried out at the address of the word. Access to the storage device 5 issued by the plurality of request sources is performed by the storage control device 4 through the interfaces 101 to 103.
The storage control device 4 determines which punctures in the storage device 5 should be accessed at the same time, how many, and which path should be used, based on the type of request and the request address, and checks the usage status (busy) of the required puncture. It is done. Now, when an 8-word block read request comes from the arithmetic processing unit 1, the interface 101 has a transfer capacity of 1 word per machine cycle, while the 4 interfaces 104 to 107 each have a transfer capacity of 2 machine cycles. Since the transfer capacity is one word, the storage control device 4 accesses the storage device 5 four times at a rate of two punctures in every two machine cycles, and the data sent from the storage device 5 is two words every two machine cycles. It turns out that it is sufficient to return 8 times, one word per machine cycle.

Similarly, in the case of an 8-word block read request from the arithmetic processing unit 2, the interface 102
Because of its word transfer capability, the storage controller 4 transfers two banks to the storage device 5 simultaneously at a rate of four banks every two machine cycles.
It can be seen that it is sufficient to access the data once and return 4 words of data every 2 machine cycles and 2 words every machine cycle. Further, in response to a request for one word from a request source, one word is processed in two machine cycles. In this way, the number of banks to be processed simultaneously is determined by the request source and the type of request, and it is necessary to check for puncture busy for one or more punctures at the same time, and in this embodiment, the timing is once every two machine cycles. It is best to do it at a rate of once. If you still read the above pro.

Since the pro and quad addresses are on the 8-word boundary, the punctures that are accessed at the same time are every two or four consecutive punctures starting from the puncture number 0,8°16.24.

FIG. 2 is a block diagram of a portion of the storage control device 4 according to the present invention. Further, FIG. 3 is a timing chart 1 for explaining the operation of each part in FIG. 2.

In FIG. 3, there is a block read request from the arithmetic processing device 1 for data in banks 0 to 7, a block read request is made from the arithmetic processing device 2 to data in banks 24 to 31, and then the input/output processing device 3 There is a one-word write request from the arithmetic processing unit 1 to the puncture 25 for the puncture 7, and then there is a write request from the processing unit 2 for the punctures O to 7.

This figure shows the timing when there is a readout. (T in FIG. 3 is a numbered mason cycle for explanation.) Hereinafter, the operation of each part in FIG. 2 will be explained with reference to FIG. 3 as well.

A block read request sent to the storage control device 4 by the ink face 101 is processed by the request reception circuit 10 from byte 0 (i.e., A=O) by 2 punctures per cycle (i.e.,
M=2) It is determined that a puncture check should be performed, and the output 111 sets the check register 11 as M=2, A=0.
(indicating punctures 0 and 1) is set at timing output 0. The output 113 of the check register 11 is input to comparison circuits 31-34 for busy checking. Since there is no puncture in use at timings T=0 and T=1, O is registered in the gunk number information N1 to N4 of all bank registration registers 21 to 24.

Therefore, no match signal is output from the outputs 141-144 of the comparison circuits 21-24. The outputs 141 to 144 are input to the memory access circuit 12, and the memory access circuit 12 detects that none of the outputs 141 to 144 match, indicating that the punctures 0 and 1 remain unused. I understand. Therefore, the memory access circuit 12 outputs the timing output 110 (in this embodiment, odd number timing T=1,
3, 5.

At timing T=1 when the output (occurred in ...) is output, the output is 1.
14, the reception request circuit 10 is notified that a request for the /SS link can be issued to the storage device 5.

The memory access circuit 12 receives the address information (address within the bank) from the request reception circuit 1O.
Pass 104 at the next timing T=2 and T=3 using
．． 105 to send a read request to the iZ links 0 and 1. The registration control circuit 13 updates the registration registers 21 to 24 every eight machine cycles by sequentially outputting four outputs 121 to 124 each time the timing output 110 is output. Strobe input 1 of registration registers 21 to 24
, 21 to 124 are the output 11 when there is the notification 114.
Control is such that the contents of the check register 11 input at step 3 are set to N=0 as the number of banks when the contents are not present. At timing T=1, there is a notification output 114, so
The contents M and A of the check register 11 are set by the strobe 121 to Nl and Bl of the registered register ←order→. Notification 114
The request reception circuit 10 that received the request inputs the check register 11.
Since the request in the above has been processed, the output 111 is sent to the check reno star 11 to request the next two punctures (punk 2 and 3) at the secondary timing T=2.
, set A=2.

Similarly, Punk 4 and Punk 5. It makes a request to Panchrome 7 and processes the block read request from the arithmetic processing unit 1. The next block read request from the arithmetic processing unit 2 is to process 4 banks at the same time.

M=4 in check register 11 (pinot in units of 4 banks)
Perform the same operation except that the check box is set and l- is checked. At timing T-14, a one-word write request from the input/output processing device 3 to the puncture 7 requested by the ink face 103 is set to check register 1 as M-1゜A=7 for the puncture pinot check. Ru. Since the puncture 7 is currently in use due to the previous block read request from the arithmetic processing unit 1, the puncture 7 of the storage device 5 must not be accessed at the timing of 'I'=16. below.

The fact that the access is inhibited will be explained with reference to FIG.

FIG. 4 shows one of the comparison circuits 31 to 34 in FIG.
FIG. 2 is a block diagram showing one in detail. The output 113 (outputs 201 and 202 in FIG. 4) of the bank number M and the puncture number A of the check register 11 is sent to four comparison circuits 31.
.about.34. It's a size.

The comparison circuits 31 to 34 have outputs 131 to 131 of the bank number N and puncture number B of the corresponding registration registers 21 to 24, respectively.
134 (outputs 203 and 204 in FIG. 4) are input. In each of the comparison circuits 31 to 34, A'
=A0M-1 is calculated by the calculator 5], and B'=B+N-] is calculated by the calculator 52. A' output 211 of the arithmetic unit 51 indicates an end puncture, whereas A of the requested punctures indicates a starting puncture. Similarly, the output B' 213 of the arithmetic unit 52 is for the starting puncture B among the used punctures.

Indicates end puncture. Said request bank and use puncture start.

The value indicating the ending puncture is input to coincidence detection circuits 61 and 62. - In the number configuration circuit 61, (A,<B)・(A'<
B) and its output 221 shows the request puncture A.
-A' is both smaller than the starting puncture B (when there is no overlap), a logic 0 is output. The other coincidence detection circuit 62 checks (B<A) and (13'<A),
A logic 0 is output to the output 222 when the starting puncture A of the requested puncture is larger than any of the used punctures E - B' (when there is no overlap). (However, Punk 31 and 0
It is assumed that no request is made within the same period. ) - The outputs 221 and 222 of the number output circuit are input to the AND circuit 70, and the output 231 is a logic 0 when there is no matching puncture (overlapping #) between the requested puncture and the used puncture, and a logic 0 when there is an overlap. It becomes 1. If the output 231 is a logic 1 and there is an overlap, and the number of punctures used N is not O, the output 232 of the determination circuit 50 that determines the value of N using the output 203 is a logic 1. The match state signal that is the output of the AND circuit 80 becomes a logic circuit. Conversely, even if a match is detected in the relationship between 2A and 2B, if the number of banks N of the puncture registration register corresponding to the comparison circuit is 0.

Since the output 232 of the determination circuit 50 is logic O, the output of the AND circuit 80 is always Qf, and no matching state is detected.

Now, at timing T=14, the usage status of Punk 7 is registered in the registration register 24 as N4=2 and B4=6. Also, the check register 11 has M-1, A=7.
is set. In the comparator circuit 34, arithmetic units 51 and 52
So A'=70m-1=7(-A) and B'=6+2-1=
7 is seen. - In several output circuits 61, the condition does not hold, and the output 221 becomes logic 1, and in other coincidence detection circuits 62, the condition does not hold because B'2A is near (overlap is detected), and the output 222 becomes logic 1. Now, it is N-2, and the output 232 of the determination circuit 50 is logic 1.

The conditions of the AND circuits 70 and 80 are satisfied, and the output 144 becomes logic 1, indicating that there is a used state/gunk in the request bank. The memory access circuit 12 outputs the output 14
When a match is reported in step 4.

Access to the storage device 5 is suppressed and no notification 114 is issued. As can be seen from FIG. 3, at timing T=16, the bank registration register 24 has no access since the strobe timing has come, so the knock count becomes N4-0.

In this case, the output 232 of the determination circuit 50 in FIG. 4 becomes O, and the output 144 becomes O, resulting in a state where there is no match, so that the request for puncture 7 can be processed.

As explained above, the registration register holds the starting puncture number and the number of banks in order to register multiple punctures, and when comparing it with the requested puncture, it is necessary to compare the starting and ending puncture numbers. Weight can be detected. At timing T-22, contrary to timing T=14, one puncture 7 is registered in the first registration register 21, and check register 11KM=4, A=
This is a case where requested punctures of 4 banks (punks 4 to 7) are received. In this case, A = 4, A' = 4+
4-1=7゜B=7, B'=7+1-1=7=
When B and B overlap, the match detection circuit 61 of the comparison circuit 31 detects the overlap, and the output 141 of the comparison circuit 31 reports the match.

In FIG. 2, since the registration registers 21 to 24 are updated every 8 machine cycles, a busy puncture once registered in the nostar cannot be accessed for 10 machine cycles. Now, since the cycle time of each puncture in the storage device 5 is 9, it is guaranteed that accesses to the same puncture will not overlap. In this way, the required number of registered renostas can be determined from the cycle of puncture cycles and the puncture check cycle. or.

The number of bits in the check register 11 and in the register registers 21 to 240 is determined from the number of banks on which the puncture busy check is performed simultaneously and the number of banks in the storage device 5.

FIG. 5 is a block diagram showing another embodiment of the present invention,
The registration registers 21 to 24 in FIG. 2 are configured in the form of a shift register. In this case, the first notification 114 checks and the contents of the credit register 11 are always registered in the first register register 21, and this contents are transferred from the register register 21 to the register register 21 by the timing output 110 every two machine cycles.
They are transferred in the order of 2 → 23 → 24. Therefore, a puncture registered as busy for access will be registered for 8 cycles and 7 cycles, and the same effect as in the previous embodiment can be produced. However, since the contents are transferred sequentially, the registration control circuit 13 in FIG. 2 is not required, and control can be performed only by the timing output 110.

FIG. 6 is a block diagram showing still another embodiment of the present invention, in which the embodiment of FIG. Determine request punctuation for the original request,
Set in the corresponding check register 11. It's good to do this.

It becomes possible to perform a puncture busy check for request punctures from each request source at the same time, and it is possible to reduce bank busy waiting time. Comparison circuits 31-1 to 31-3.3
2-1 to 32-3.33. -1 to 33-3, 34. −
The test results for 1 to 34-3 are output 140-1 to 140-
3 is input to the memory access circuit 12, and if two or more can be accessed at the same time as a result of the inspection, one of them is selected and the memory device 5 is accessed, and a notification 1 is sent.
At step 14, the request reception circuit 10 is notified. To receive the request, the circuit 10 checks the notified request puncture check register 11.
Setting the next request/gunk is the same as in other embodiments. The notification 114 is also sent to the newly provided switching circuit 15, and the processed request puncture information is sent to the three checks, the outputs 113-1 to 113-1 of the Kurenostars 11-1 to 11-3.
113-3 and set the output 115 in the first registration register 21. [Notification 1] At the timing when 4 is not present, N1=0 is set as the number of banks in the first registered reno star 21, as in other embodiments.

Several embodiments of the present invention have been described above with reference to the drawings. 1. The puncture check period in the present invention may be selected as an optimal value depending on the system to which it is applied, and the method of accessing the storage device and the number of banks thereof. This should be determined by the individual.

Also, the number of registration registers and the number of bits at that time are adjusted to a value that guarantees the cycle time of each puncture.

It is not limited to the values in the examples.

In addition, in the above-mentioned embodiment, the portion including the request reception circuit 10 and the Che/Clenosta 11.11-1 to 11-3 corresponds to the "g water treatment circuit" described in the configuration of the present invention, and ~34.31-1~3]-3,32
-1~32-3.33-1~33-3.34-1~34
-3 “Puncture detection circuit” mentioned in the configuration of the present invention
Correspondingly, the storage access circuit 12 corresponds to the "access control circuit" described in the configuration of the present invention.

〔Effect of the invention〕

As explained above, the present invention manages a set of one or more banks accessed in a certain cycle as one piece of information and checks it every cycle, so that even when the number of banks increases, the number of banks is simple and small. This has the effect of enabling busy management based on the amount of gold.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a data processing system using a storage control device according to the present invention, and FIGS. 2, 5, and G are each a part of a storage control device according to an embodiment of the present invention. FIG. 3 is a timing chart for explaining the operation of each part in FIG. 2, and FIG. 4 is a detailed block diagram of the comparator circuit in FIG. 2. 1.2... Arithmetic processing unit, 3... Input/output processing unit. 4. Storage control device, 5. Storage device, 10. Request reception circuit, 11. Check recorder, 12. Memory access circuit, 13. Registration control circuit, 15. Switching circuit, 21-
24...Registered reno star, 31-34, comparison circuit, 50
... Judgment circuit, 51 and 52 ... Arithmetic unit, 61 and 6
2...-number construction circuit, 70 and 80... AND circuit. Figure 4 Figure 5 Figure 6

Claims (1)

Claims: 1. A device consisting of a plurality of independently operable punctures connected to the storage device and connected to one of the banks. Or a storage control device that can access two or more of the punctures at the same time. In order to access the storage device, one or more punctures are applied to the storage controller. and one or more processing units that generate requests. A bank to be processed within the one cycle is determined from the banks required by the request at a predetermined cycle. and a request processing circuit that outputs puncture number information and bank number information. The used bank information, which is treated as a used state in each cycle of the access, is registered with the puncture number information and bank number information, and the bank in the used state is registered so that it will not be accessed again within the puncture cycle time of the corresponding puncture. and a bank registration register consisting of a number determined from the period and the puncture cycle time, which are sufficient to guarantee the period. connected to each output of the bank registration register. The request bank information from the request processing circuit is used as a common input, and it is individually detected whether or not the same puncture exists based on the usage state bank information and the request puncture information registered in the respective gunk registration registers. With the same number of bank detection circuits as bank registration registers. Based on all the detection results of the puncture detection circuit. and an access control circuit that controls access to the storage device. At every predetermined period, it is detected whether or not the bank is in use for all the punctures to be processed within the period based on the puncture number information and the bank number information. A storage control device, characterized in that the bank is accessed when all the punctures are not in use, and the puncture information is registered in one of the puncture registration registers. 2. To keep the used puncture information in the puncture registration register for longer than the puncture cycle time. The puncture registration register is sequentially strobed in each cycle, and if all the requested punctures are in use in that cycle, the requested puncture information is registered as used puncture information in the puncture registration register corresponding to the cycle, and the requested puncture is registered in the puncture registration register corresponding to the cycle. If at least one of the banks is in use, the bank number information of the register is set to "No" or the puncture number information is set to a non-existent puncture number, and the output thereof is registered so as to be invalid when inspecting the puncture detection circuit. A storage control device according to claim 1. 3. The puncture registration registers are connected like a shift register in order from the first register that receives requested puncture information, and are controlled to transfer the contents to the next stage at each cycle, and are controlled to transfer the contents to the next stage at each cycle. registers the requested puncture information as used puncture information if the requested bank is not in the used state in each cycle, and deletes the bank number information in the register if at least one of the requested banks is in the used state in each cycle; Alternatively, the puncture number information is registered as a non-existing puncture number so that the output thereof becomes invalid in the inspection of the puncture detection circuit.
The storage control device described in Section 1. 4. A plurality of sets of the puncture detection circuits are connected to each output of the puncture registration register, and the plurality of request puncture information output from the request processing circuit are simultaneously inspected, and one of the requests passing the inspection is selected. Memory restriction 1 according to claim 2 or 3, wherein the requested puncture information is selected according to a predetermined priority order, the requested puncture information is registered as usage state puncture information, and the storage device is accessed. Device.