JPS60134676A - Method of driving solid-state image pickup device - Google Patents

Method of driving solid-state image pickup device

Info

Publication number
JPS60134676A
JPS60134676A JP58243521A JP24352183A JPS60134676A JP S60134676 A JPS60134676 A JP S60134676A JP 58243521 A JP58243521 A JP 58243521A JP 24352183 A JP24352183 A JP 24352183A JP S60134676 A JPS60134676 A JP S60134676A
Authority
JP
Japan
Prior art keywords
period
voltage
electrodes
light receiving
receiving element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58243521A
Other languages
Japanese (ja)
Inventor
Hideo Tanaka
秀夫 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP58243521A priority Critical patent/JPS60134676A/en
Publication of JPS60134676A publication Critical patent/JPS60134676A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent boundary level from becoming generating source of dark current by repeating action of sweeping out unnecessary charge and action of making the surface of peripheral area of a photo-detector accumulation state in each light receiving period at one horizontal period. CONSTITUTION:The photo-detector 1 at the time of reading is reset to voltage Vh (for instance +10V) of a reading gate section 3, and voltage of electrodes P1-P4 at the time of light receiving is made shallower voltage Vm1 (for instance +8V) than Vh, and signal charge is accumulated in the detector 1. At this time, generated charge exceeding Vm1 flows into vertical register side. In this case, scanning period out of one horizontal period makes voltage applied to vertical transfer electrodes P1-P4 to Vm1, however, in fly-back line period, electrodes P1-P4 are made low level, for instance -5V. Thus, dark current generated from a channel stopper 2 is reduced.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は新規な固体撮像装置の駆動方法に関し、特に垂
直レジスタを時分割で転送レジスタとして使用したりオ
ーバーフロードレインとして使用したりする固体撮像装
置の暗電流を低減することができる新規な固体撮像装置
の駆動方法を提供しようとするものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a novel method for driving a solid-state imaging device, and in particular to a method for driving a solid-state imaging device in which a vertical register is used as a transfer register in time division or as an overflow drain. The present invention aims to provide a novel method for driving a solid-state imaging device that can reduce current.

背景技術とその問題点 電荷結合素子(チャージ・カップルド・デバイ゛ス、以
下rccDJという。)等の電荷転送素子を用いた固体
撮像装置には受光素子を配列した感光部とそれに対応す
る転送レジスタを一対ずつ縦に配列してなる構成のもの
がある。垂直インターライン転送型のものがその好例で
あり、そのインターライン転送型のものに更に蓄積部(
フレーム転送型において感光部と並設される蓄積部と略
同じ役割を果す。)を付加したタイプのものもそれに含
まれる。
BACKGROUND TECHNOLOGY AND PROBLEMS A solid-state imaging device using a charge transfer device such as a charge coupled device (hereinafter referred to as RCCDJ) has a photosensitive section in which photodetectors are arranged and a transfer register corresponding to the photosensitive section. There is a configuration in which pairs of are arranged vertically. A good example is the vertical interline transfer type, which also has a storage section (
It plays almost the same role as the storage section installed in parallel with the photosensitive section in the frame transfer type. ) is also included.

ところで、そのような固体撮像装置費垂直レジスタの本
来の役割は感光部において受光された信号(電荷)を読
み出し、そして転送することである。しかしながら、感
光部において受光が為される受光期間中にはその転送レ
ジスタをブルーミング等の原因となる不用電荷を掃き出
すようにしたものが増えている。このようにすればオー
バーフロードレイン領域を設ける必要がなく集積度の向
上を図ることができるので好ましいといえる。
Incidentally, the original role of such a vertical register in a solid-state imaging device is to read out and transfer a signal (charge) received by a photosensitive section. However, an increasing number of devices are designed to sweep out unnecessary charges that cause blooming and the like from the transfer register during the light reception period when the photosensitive section receives light. This is preferable because there is no need to provide an overflow drain region and the degree of integration can be improved.

しかしながら、このようにした場合には暗電流が多くな
るという問題があった。この問題について第1図に従っ
て具体的に説明する。第1図は1つの受光素子及びその
周辺部の平面構造を示す構成図であり、同図において、
lは受光素子(梨地模様の部分より内側の部分)で、例
えばP型半導体基板表面部にn型半導体領域を選択的に
形成することによって基板との間に形成されるフォトダ
イオードからなる。2はチャンネルストッパ(梨地模様
で示す)で、半導体基板表面部において受光素子lの周
囲の矩形環状領域の不純物濃度を半導体基板の濃度より
も高くすることによって形成されている。該チャンネル
ストッパ2は一部(斜線で示す)3が他の部分より適宜
不純物濃度を低くされ、その部分3が読み出しゲート部
となるようにされている。4は垂直レジスタで、受光素
子lの隣り合う垂直列の中間部に垂直転送方向に沿って
延びるように形成されたn型半導体領域からなる。
However, in this case, there is a problem that dark current increases. This problem will be specifically explained with reference to FIG. FIG. 1 is a configuration diagram showing the planar structure of one light-receiving element and its surrounding area.
1 is a light-receiving element (the part inside the satin-finished pattern part), which is composed of, for example, a photodiode formed between the substrate and the substrate by selectively forming an n-type semiconductor region on the surface of the P-type semiconductor substrate. Reference numeral 2 denotes a channel stopper (shown with a matte pattern), which is formed by making the impurity concentration in a rectangular annular region around the light receiving element 1 higher than that of the semiconductor substrate on the surface of the semiconductor substrate. In the channel stopper 2, a part (indicated by diagonal lines) 3 has an impurity concentration lower than the other part, so that the part 3 becomes a read gate part. Reference numeral 4 denotes a vertical register, which is composed of an n-type semiconductor region formed in the middle of adjacent vertical columns of light-receiving elements 1 so as to extend along the vertical transfer direction.

P 1−P4は半導体基板表面上に絶縁膜を介して水平
方向に延びるように形成された垂直転送電極で、垂直転
送方向に向ってPi、P2、P3、P4の順序で配列さ
れている。各垂直転送電極P1、P2、P3、P4はそ
れぞれ帯状ではなく受光素子lと重なり合わないように
櫛歯状に形成されている。又、Pl、!1−P2とが、
そして、P3とP4とがそれぞれ一部において重なり合
っているが、P2及びP4は下層で、Pl及びP3が上
層になるようにされている。そして、電極P3は前記読
み出しゲート部2と一部においてオーバーラツプしてい
る。
P1-P4 are vertical transfer electrodes formed on the surface of the semiconductor substrate to extend horizontally through an insulating film, and are arranged in the order of Pi, P2, P3, and P4 in the vertical transfer direction. Each of the vertical transfer electrodes P1, P2, P3, and P4 is formed not in a band shape but in a comb-like shape so as not to overlap with the light receiving element l. Also, Pl! 1-P2 and
Although P3 and P4 partially overlap each other, P2 and P4 are in the lower layer, and Pl and P3 are in the upper layer. The electrode P3 partially overlaps with the readout gate section 2.

第2図は従来において各垂直転送電極P1、P2、P3
.P4に印加された信号φl、φ2、φ3、φ4の波形
図である。
Figure 2 shows the conventional vertical transfer electrodes P1, P2, P3.
.. 3 is a waveform diagram of signals φl, φ2, φ3, and φ4 applied to P4. FIG.

この固体撮像装置において、不用電荷の掃き出し及び信
号転送は4相駆動刃式により行われ、従って、信号φl
〜φ4は掃出期間及び転送期間においては例えば+5v
から一5Vの範囲で4相駆動することのできるようなり
ロックパルスとなる。又、読み出しゲート部3を通して
の垂直レジスタ4への信号の読み川しは転送電極P1及
びP2を例えば+IOVに高め転送電極P2及びP4を
一5vに低くすることにより行われる。そして、受光期
間中は垂直レジスタ4内の不要電荷を速やかに掃き出す
ためその垂直レジスタ4をオーバードレインとして機能
させる必要がある。従って、少なくとも電極PL、P3
を高いレベルにすることが必要であるが、電極PI、P
3にのみ高いレベルにし、P2、P4を低いレベルにし
た場合には電極PiとP3との間の部分下における電荷
は掃き出しきれない。電荷をよりスムースに掃き出すた
めには全電極Pi、P2、P3、P4を同じように高い
レベルにすることが必要である。
In this solid-state imaging device, sweeping out unnecessary charges and signal transfer are performed by a four-phase drive blade type, and therefore the signal φl
~φ4 is, for example, +5v during the sweep period and transfer period.
It becomes a lock pulse that can be driven in four phases in the range of -5V. Further, reading of the signal to the vertical register 4 through the read gate section 3 is performed by raising the transfer electrodes P1 and P2 to, for example, +IOV and lowering the transfer electrodes P2 and P4 to -5V. During the light reception period, the vertical register 4 must function as an overdrain in order to quickly sweep out unnecessary charges within the vertical register 4. Therefore, at least the electrodes PL, P3
It is necessary to make the electrodes PI, P
If only P2 and P4 are set to a high level and P2 and P4 are set to a low level, the charge under the part between electrodes Pi and P3 cannot be completely swept out. In order to sweep out the charge more smoothly, it is necessary to set all electrodes Pi, P2, P3, and P4 to the same high level.

そこで、受光期間中は全電極P1〜P4を例えば+8V
の高いレベルにするということが行われる。
Therefore, during the light reception period, all electrodes P1 to P4 are set to +8V, for example.
This is done to raise the level of performance to a high level.

ところで、そのように全電極P1、P2、P3、P4を
高くすると受光素子1の周りのチャンネルストッパ2が
デプレッションモードになり、チャンネルストッパ2の
界面準位が全て開いた状態になる。すると、その空乏化
した準位を再結合中心として暗電流が発生してしまう。
By the way, when all the electrodes P1, P2, P3, and P4 are made high in this way, the channel stopper 2 around the light receiving element 1 enters the depletion mode, and all the interface states of the channel stopper 2 become open. Then, a dark current is generated using the depleted level as a recombination center.

発明の目的 しかして、本発明は受光期間中において受光素子の周辺
の電極下に存在する界面準位が暗電流の発生源となるこ
とを防止することを目的とする。
OBJECTS OF THE INVENTION Accordingly, an object of the present invention is to prevent interface levels existing under an electrode around a light-receiving element from becoming a source of dark current during a light-receiving period.

発明の構成 上記目的を達成するため本考案固体撮像装置の駆動方法
は、垂直レジスタを受光素子で得た信号を読み出し転送
する転送レジスタとしてと余剰電荷を掃き出すオーバー
フロードレインとしてとで時分割で使用する固体撮像装
置の駆動方法であつて、各受光期間において垂直転送電
極に所定の電圧を加えて不要電荷を掃き出す状態にする
動作と受光素子の周辺領域表面をその周辺領域の多数キ
ャリアのアキンテーション状態にする動作とを1水平周
期と同じ時間を周期として交互に繰返されるように駆動
することを特徴とするものである。
Structure of the Invention In order to achieve the above object, the driving method of the solid-state imaging device of the present invention uses a vertical register in a time-sharing manner as a transfer register for reading and transferring signals obtained by a light receiving element and as an overflow drain for discharging excess charge. A method for driving a solid-state imaging device, which involves applying a predetermined voltage to a vertical transfer electrode during each light reception period to sweep out unnecessary charges, and bringing the surface of a peripheral region of a light receiving element into an atoning state of majority carriers in the peripheral region. The invention is characterized in that the operation is driven in such a way that the operations of 1 and 2 are alternately repeated with the same period of time as one horizontal period.

実施例 以下に、本発明固体撮像装置の駆動方法を添附図面に示
した実施例に従って詳細に説明する。
Embodiments Below, a method for driving a solid-state imaging device of the present invention will be explained in detail according to embodiments shown in the accompanying drawings.

第3図は本発明固体撮像装置の駆動方法の実施の一例に
おける各転送電極に対して加える各信号φ1、φ2、φ
3、φ4のタイムチャートである。この転送電極Pi、
P2、P3、P4に加えられる信号φ1、φ2、φ3、
φ4は第2図に示す従来の場合とは受光期間における波
形のみが異なる。即ち、第1図に示す構造の固体撮像装
置において、読み出し時における受光素子lは、第3の
電極により支配される読み出しゲート部3の電圧vh(
例えば+l0V)に相当するポテンシャルにリセットさ
れ、そして、受光時には読み出しゲート部3を支配する
各電極P1〜P4の電圧は上記電圧vhより若干浅い電
圧Vml(例えば+8V)にされ、受光素子1において
信号電荷の蓄積が為される。又、そのときその電圧Vm
lに相当するポテンシャルを越える発生電荷は垂直レジ
スタ4側に流れ込む。
FIG. 3 shows signals φ1, φ2, φ applied to each transfer electrode in an example of the driving method of the solid-state imaging device of the present invention.
3. This is a time chart of φ4. This transfer electrode Pi,
Signals φ1, φ2, φ3, applied to P2, P3, P4
φ4 differs from the conventional case shown in FIG. 2 only in the waveform during the light reception period. That is, in the solid-state imaging device having the structure shown in FIG.
For example, the voltage of each electrode P1 to P4 governing the readout gate section 3 is set to a voltage Vml (for example, +8V) slightly shallower than the above voltage vh during light reception, and a signal is generated at the light receiving element 1. Accumulation of charge takes place. Also, at that time, the voltage Vm
The generated charge exceeding the potential corresponding to l flows into the vertical register 4 side.

ところで、本発明においては受光中各垂直転送電極P1
〜P4が電圧V m 1を受ける状態が1水平周期(H
)以上継続1〜ないようにされている。
By the way, in the present invention, each vertical transfer electrode P1 during light reception
The state in which ~P4 receives voltage V m 1 is one horizontal period (H
) or more continues from 1 to no more.

即ち、l水平周期のうち走査期間は各垂直転送電極P 
1−P4に加える電圧をVmlにするが、帰線期間は各
垂直転送電極PI−P4を例えば−5Vの低レベルにす
ることとし、それによってチャンネルストッパ2から発
生する暗電流を少なくする。このように、一時的に各垂
直転送電極P1〜P4を低レベルにすることによって暗
電流を少なくすることができる理由は次のとおりである
That is, in the scanning period of l horizontal period, each vertical transfer electrode P
Although the voltage applied to 1-P4 is set to Vml, each vertical transfer electrode PI-P4 is set to a low level of, for example, -5V during the retrace period, thereby reducing the dark current generated from the channel stopper 2. The reason why the dark current can be reduced by temporarily lowering the vertical transfer electrodes P1 to P4 to a low level is as follows.

即ち、P型半導体領域はその上方の電極を負のレベルに
することにより表面をホール(正孔)のアキ、W−ジョ
ン状態にすることができる。そのようにアキ党−ション
状態になると界面準位がホールによって占有される。と
ころで、そのようなアキメソ−ジョン状態のときに電極
に正の電圧を印加してそのP型半導体領域を空乏化させ
ると、界面準位を占有していたホールはある時定数をも
ってその界面準位から放出される。その時定数はその準
位のレベルの関数となり、再結合中心となるミツドギャ
ップ近傍においては10 = s eC程度となる。
That is, by setting the upper electrode to a negative level, the surface of the P-type semiconductor region can be brought into a hole-free or W-joon state. In such an empty state, the interface states are occupied by holes. By the way, if a positive voltage is applied to the electrode to deplete the P-type semiconductor region in such an akime solution state, the holes occupying the interface state will deplete the interface state with a certain time constant. released from. The time constant is a function of the level of the level, and is approximately 10 = s eC near the midgap, which is the center of recombination.

しかして、各垂直転送電極P1〜P4に正の電圧を印加
し続ける時間をその再結合中心となるミツドギャップ近
傍の準位の時定数より短くすることにより実効的な再結
合中心数を減少せしめることができる。従って、受光素
子lのチャンネルストッパ2から発生する暗電流を減少
することができるのである。
Therefore, by making the time during which a positive voltage is continuously applied to each vertical transfer electrode P1 to P4 shorter than the time constant of the level near the midgap, which is the recombination center, the effective number of recombination centers is reduced. be able to. Therefore, the dark current generated from the channel stopper 2 of the light receiving element 1 can be reduced.

要約すれば、電極P1〜P4を例えばlフィールドの間
高いままの状態にしておくと暗電流が大量に発生するの
で、例えば水平帰線期間毎にホールのアキメヒーション
状態にするのである。そして、受光素子lに集まる暗電
流のうち受光素子l自身で発生するものとその周辺で発
生するものとの比が171 N1.: 10であるので
、本発明駆動方法によって暗電流を従来の0.5〜0.
1に少なくすることができる。
In summary, if the electrodes P1-P4 are kept high for example during the l field, a large amount of dark current will be generated, so that the holes are brought into a state of heaping, for example every horizontal retrace period. Of the dark currents that collect in the light-receiving element l, the ratio of that generated within the light-receiving element l itself to that generated around it is 171 N1. : 10, the driving method of the present invention reduces the dark current by 0.5 to 0.
It can be reduced to 1.

第4図は受光期間中において通常、即ち水平走査(トレ
ース)期間中は各電極Pi−P4を低いレベルにし、水
平帰線(リトレース)期間のみ高いレベルにすること、
即ち第3図に示した場合とは逆にした実施例を示すもの
である。本発明はこのような態様においても実施するこ
とができるものである。
FIG. 4 shows that each electrode Pi-P4 is set to a low level during the light reception period, that is, during the horizontal scanning (trace) period, and is set to a high level only during the horizontal retrace period;
That is, this shows an embodiment that is opposite to the case shown in FIG. The present invention can also be implemented in such an embodiment.

発明の効果 以上に述べたように、本発明固体撮像装置の駆動方法!
±、垂直レジスタを受光素子で得た信号を読み出し転送
する転送レジスタとしてと余剰電荷を掃き出すオーバー
フロードレインとしてとで時分割で使用する固体撮像装
置の駆動方法であって、各受光期間において垂直転送電
極に所定の電圧を加えて不要電荷を掃き出す状態にする
動作と受光素子の周辺領域表面をその周辺領域の多数キ
ャリアのアキ7−シヨン状態にする動作とが1水平周期
と同じ時間を周期として交互に繰返されるように駆動す
ることを特徴とするものである。
Effects of the Invention As described above, the method for driving the solid-state imaging device of the present invention!
± is a driving method for a solid-state imaging device in which a vertical register is used time-divisionally as a transfer register for reading and transferring signals obtained by a light-receiving element and as an overflow drain for discharging surplus charge, in which a vertical transfer register is used in each light-receiving period. The operation of applying a predetermined voltage to a state where unnecessary charges are swept out and the operation of bringing the surface of the peripheral area of the light receiving element into a state of acquisition of majority carriers in that peripheral area are alternated with a period equal to one horizontal period. It is characterized by being driven repeatedly.

従って、本発明によれば、受光期間中において不要電荷
を掃き出す状態は、受光素子の周辺領域を空乏化させた
ときその多数キャリアが放出される時定数よりも長い時
間続くことがなく、l水平周期に1回は受光素子の周辺
領域表面がその周辺領域の多数キャリアのアキ党−ショ
ン状態にされるので、暗電流の原因となる実効的再結合
中心の数を減らすことができる。依って、本発明によれ
ば暗電流を減らすことができる。
Therefore, according to the present invention, during the light receiving period, the state in which unnecessary charges are swept out does not continue for a time longer than the time constant at which majority carriers are released when the peripheral region of the light receiving element is depleted, and Since the surface of the peripheral region of the light-receiving element is brought into a state of ablation of majority carriers in the peripheral region once every period, the number of effective recombination centers that cause dark current can be reduced. Therefore, according to the present invention, dark current can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は固体撮像装置の一例の受光素子及びその周辺を
示す構成図、第2図は従来の駆動方法を1 説明するための各垂直転送電極に加える信号のタイムチ
ャート、第3図及び第4図はそれぞれ本発明駆動方法の
各別の実施例を説明するための各垂直転送電極に加える
信号のタイムチャートである。 符号の説明 l・−−受光素子、211・・受光素子の周辺領域、4
・・・垂直レジスタ、 p 1−P4・0・垂直転送電極 出 願 人 ソニー株式会社 代理人弁理士 小 松 祐 治 同 尾 川 秀 昭 2
Fig. 1 is a configuration diagram showing a light receiving element and its surroundings in an example of a solid-state imaging device, Fig. 2 is a time chart of signals applied to each vertical transfer electrode to explain a conventional driving method, and Figs. FIG. 4 is a time chart of signals applied to each vertical transfer electrode for explaining different embodiments of the driving method of the present invention. Explanation of symbols 1 -- Light-receiving element, 211 -- Peripheral area of light-receiving element, 4
・・・Vertical register, p1-P4・0・Vertical transfer electrode Applicant: Sony Corporation Representative Patent Attorney Haruto Komatsu Hideo Ogawa 2

Claims (1)

【特許請求の範囲】[Claims] (1)垂直レジスタを受光素子で得た信号を読み出し転
送する転送レジスタとしてと余剰電荷を掃き出すオーバ
ーフロードレインとしてとで時分割で使用する固体撮像
装置の駆動方法であって、各受光期間において垂直転送
電極に所定の電圧を加えて不要電荷を掃き出す状態にす
る動作と受光素子の周辺領域表面をその周辺領域の多数
キャリアのアキュムレーション状態にする動作とが1水
平周期と同じ時間を周期として交互に繰返されるように
駆動することを特徴とする固体撮像装置の駆動方法
(1) A driving method for a solid-state imaging device in which a vertical register is used time-divisionally as a transfer register for reading and transferring signals obtained by a light receiving element and as an overflow drain for sweeping out excess charge, in which vertical registers are transferred during each light receiving period. The operation of applying a predetermined voltage to the electrode to sweep out unnecessary charges and the operation of bringing the peripheral surface of the light-receiving element into a state of accumulation of majority carriers in the peripheral area are alternately repeated with a period equal to one horizontal period. A method for driving a solid-state imaging device, characterized in that the device is driven so as to
JP58243521A 1983-12-23 1983-12-23 Method of driving solid-state image pickup device Pending JPS60134676A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58243521A JPS60134676A (en) 1983-12-23 1983-12-23 Method of driving solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58243521A JPS60134676A (en) 1983-12-23 1983-12-23 Method of driving solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS60134676A true JPS60134676A (en) 1985-07-17

Family

ID=17105139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58243521A Pending JPS60134676A (en) 1983-12-23 1983-12-23 Method of driving solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS60134676A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02161879A (en) * 1988-12-14 1990-06-21 Matsushita Electron Corp Driving method for solid-state image pickup device
JPH02161880A (en) * 1988-12-14 1990-06-21 Matsushita Electron Corp Driving method for solid-state image pickup device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02161879A (en) * 1988-12-14 1990-06-21 Matsushita Electron Corp Driving method for solid-state image pickup device
JPH02161880A (en) * 1988-12-14 1990-06-21 Matsushita Electron Corp Driving method for solid-state image pickup device

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