JPS60133732A - Semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a crack in a passivation film by coating the both ends of a semiconductor chip with polycrystalline Si containing oxygen, and reaction- bonding the layer to be coated and the layers of the chip. CONSTITUTION:Polycrystalline silicons 9 which contain oxygen are bonded onto both ends of a semiconductor chip 1, and passivated. Small amount of B or P is diffused from P type layers 3, 4 or N type layers 2, 5, 6 of the chip 1 into the silicon 9 at a high temperature, and no crack occurs in case of cutting the chip 1. In this case, this can be applied to 4'' wafer, and exhibits no warpage of the wafer observed when performing the passivation of the normal glass in an experiment.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a highly reliable semiconductor device in which a semiconductor chip is coated with polycrystalline silicon or glass.

[Prior art and its problems]

BACKGROUND ART Conventionally, a pad vasation method for semiconductor devices that makes full use of electrical turbulence phenomena has been considered and put into practical use. However, when increasing the diameter of the wafer to 4" or more, the glass crank is inserted when the wafer is warped and cuts the chip after cutting the chip. In other words, as long as there is glass wafer, this type of device (such as thyristor etc.) ) had some inconveniences, such as a limited yield and the inability to use a brainer.

[Purpose of the invention]

The present invention has been made in order to completely improve such inconveniences, and its purpose is to be applicable to devices larger than 4", and to utilize the electrophoresis method in which a crank is inserted into the passivation film. The purpose of the present invention is to provide a highly reliable device coated with passivation with a higher yield.

[Summary of the invention]

In the present invention, both end surfaces of a semiconductor chip are coated with polycrystalline silicon containing oxygen, and a part of the deposited polycrystalline silicon layer is bonded by total reaction to the P layer or the n layer in the chip through heat treatment. Another object of the present invention is to provide a highly reliable semiconductor device, which is characterized in that glass is poured thereon to adhere and stabilize it.

〔Effect of the invention〕

When this kind of passivation is applied to semiconductor devices, glass passivation formed by conventional electrophoresis can only be applied to 3" wafers, whereas it can be applied to large diameter 4" wafers or larger. It is possible to obtain a highly reliable device with no film cracks and low leakage current.

[Embodiments of the invention]

(Example 1) Both end faces of a semiconductor chip 1 as shown in FIG. 1 are stingy passivated with polycrystalline silicon 9 containing oxygen to a thickness of 1.5 μm. Polycrystalline '/') Core 9 ID Normal LP-CVD at 650℃ while supplying oxygen gas
covered by law. A small amount of B or P diffused from the P layer 3.4 or the N layer 2.5.6 of the chip 1 into the polycrystalline silicon 9 at high temperature, and no cracks were observed when the chip 1 was cut. This method can also be applied to 4" wafers, and there was no unino-warpage that is seen when performing normal glass passivation. In Figure 1, 7 is an aluminum electrode, and 8 is a V- It is a Ni-Au layer.The breakdown voltage of this device was 1500V.

(Example 2) LP-CVD was applied to both end surfaces of the chip 1 as shown in Fig. 2.
Polycrystalline silicon 9 with a thickness of 2 μm was applied at 700°C for 20 min.
After the heat treatment for several minutes, a PSG film 13'i of about 0.5 .mu.m thick is further applied thereon. This glass is not just phosphoric acid silica glass, but may also be any glass such as borosilicate phosphoric acid glass, lead glass, or ZnO glass, and may flow and solidify on the polycrystalline silicon 9 at low temperatures. Bye. Passivation using this method further stabilized the device, with some devices having a breakdown voltage of about 1600V. This passivation method was also applied to 4" wafers without warping and was useful for increasing the diameter. In Figure 2, 11 is the 1st layer and 12 is the V-Ni-Au layer. This is the layer that was applied.

(Example 3) Oxygen f and soft polycrystalline silicon 9 is applied to a thickness of 1 μm on both end faces of the chip 1 as shown in FIG. Ta. There was no crank when chipping this device. It was also applied to 4" wafers without warping of the wafers. The withstand voltage of this device was 1550V.

As detailed above, the passivated device of the present invention has a high breakdown voltage and can be applied to large-diameter wafers, so it can be said to be an industrially excellent device.

[Brief explanation of drawings]

1 and 2 are cross-sectional views showing each embodiment of the present invention. 1... Semiconductor chip, 9... Polycrystalline silicon layer. 13...PSG film. (7317) Patent Attorney Kensuke Chika (and 1 other person) Figure 1

Claims (2)

[Claims] (1) Both end faces of a semiconductor chip are coated with oxygen-containing polycrystalline silicon, and a part of the coated polycrystalline silicon layer and the P layer or n layer in the chip are bonded by reaction through heat treatment. semiconductor devices. (2) The semiconductor device according to claim 1, characterized in that a thin film of glass is completely deposited on the polycrystalline silicon to stabilize it.